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Diffstat (limited to 'arch/arm/mach-mx5/mm.c')
-rw-r--r--arch/arm/mach-mx5/mm.c71
1 files changed, 65 insertions, 6 deletions
diff --git a/arch/arm/mach-mx5/mm.c b/arch/arm/mach-mx5/mm.c
index ff557301b42b..baea6e5cddd9 100644
--- a/arch/arm/mach-mx5/mm.c
+++ b/arch/arm/mach-mx5/mm.c
@@ -18,6 +18,7 @@
18 18
19#include <mach/hardware.h> 19#include <mach/hardware.h>
20#include <mach/common.h> 20#include <mach/common.h>
21#include <mach/devices-common.h>
21#include <mach/iomux-v3.h> 22#include <mach/iomux-v3.h>
22 23
23/* 24/*
@@ -69,8 +70,6 @@ void __init imx53_init_early(void)
69 mxc_arch_reset_init(MX53_IO_ADDRESS(MX53_WDOG1_BASE_ADDR)); 70 mxc_arch_reset_init(MX53_IO_ADDRESS(MX53_WDOG1_BASE_ADDR));
70} 71}
71 72
72int imx51_register_gpios(void);
73
74void __init mx51_init_irq(void) 73void __init mx51_init_irq(void)
75{ 74{
76 unsigned long tzic_addr; 75 unsigned long tzic_addr;
@@ -86,11 +85,8 @@ void __init mx51_init_irq(void)
86 panic("unable to map TZIC interrupt controller\n"); 85 panic("unable to map TZIC interrupt controller\n");
87 86
88 tzic_init_irq(tzic_virt); 87 tzic_init_irq(tzic_virt);
89 imx51_register_gpios();
90} 88}
91 89
92int imx53_register_gpios(void);
93
94void __init mx53_init_irq(void) 90void __init mx53_init_irq(void)
95{ 91{
96 unsigned long tzic_addr; 92 unsigned long tzic_addr;
@@ -103,5 +99,68 @@ void __init mx53_init_irq(void)
103 panic("unable to map TZIC interrupt controller\n"); 99 panic("unable to map TZIC interrupt controller\n");
104 100
105 tzic_init_irq(tzic_virt); 101 tzic_init_irq(tzic_virt);
106 imx53_register_gpios(); 102}
103
104static struct sdma_script_start_addrs imx51_sdma_script __initdata = {
105 .ap_2_ap_addr = 642,
106 .uart_2_mcu_addr = 817,
107 .mcu_2_app_addr = 747,
108 .mcu_2_shp_addr = 961,
109 .ata_2_mcu_addr = 1473,
110 .mcu_2_ata_addr = 1392,
111 .app_2_per_addr = 1033,
112 .app_2_mcu_addr = 683,
113 .shp_2_per_addr = 1251,
114 .shp_2_mcu_addr = 892,
115};
116
117static struct sdma_platform_data imx51_sdma_pdata __initdata = {
118 .fw_name = "sdma-imx51.bin",
119 .script_addrs = &imx51_sdma_script,
120};
121
122static struct sdma_script_start_addrs imx53_sdma_script __initdata = {
123 .ap_2_ap_addr = 642,
124 .app_2_mcu_addr = 683,
125 .mcu_2_app_addr = 747,
126 .uart_2_mcu_addr = 817,
127 .shp_2_mcu_addr = 891,
128 .mcu_2_shp_addr = 960,
129 .uartsh_2_mcu_addr = 1032,
130 .spdif_2_mcu_addr = 1100,
131 .mcu_2_spdif_addr = 1134,
132 .firi_2_mcu_addr = 1193,
133 .mcu_2_firi_addr = 1290,
134};
135
136static struct sdma_platform_data imx53_sdma_pdata __initdata = {
137 .fw_name = "sdma-imx53.bin",
138 .script_addrs = &imx53_sdma_script,
139};
140
141void __init imx51_soc_init(void)
142{
143 /* i.mx51 has the i.mx31 type gpio */
144 mxc_register_gpio("imx31-gpio", 0, MX51_GPIO1_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO1_LOW, MX51_MXC_INT_GPIO1_HIGH);
145 mxc_register_gpio("imx31-gpio", 1, MX51_GPIO2_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO2_LOW, MX51_MXC_INT_GPIO2_HIGH);
146 mxc_register_gpio("imx31-gpio", 2, MX51_GPIO3_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO3_LOW, MX51_MXC_INT_GPIO3_HIGH);
147 mxc_register_gpio("imx31-gpio", 3, MX51_GPIO4_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO4_LOW, MX51_MXC_INT_GPIO4_HIGH);
148
149 /* i.mx51 has the i.mx35 type sdma */
150 imx_add_imx_sdma("imx35-sdma", MX51_SDMA_BASE_ADDR, MX51_INT_SDMA, &imx51_sdma_pdata);
151}
152
153void __init imx53_soc_init(void)
154{
155 /* i.mx53 has the i.mx31 type gpio */
156 mxc_register_gpio("imx31-gpio", 0, MX53_GPIO1_BASE_ADDR, SZ_16K, MX53_INT_GPIO1_LOW, MX53_INT_GPIO1_HIGH);
157 mxc_register_gpio("imx31-gpio", 1, MX53_GPIO2_BASE_ADDR, SZ_16K, MX53_INT_GPIO2_LOW, MX53_INT_GPIO2_HIGH);
158 mxc_register_gpio("imx31-gpio", 2, MX53_GPIO3_BASE_ADDR, SZ_16K, MX53_INT_GPIO3_LOW, MX53_INT_GPIO3_HIGH);
159 mxc_register_gpio("imx31-gpio", 3, MX53_GPIO4_BASE_ADDR, SZ_16K, MX53_INT_GPIO4_LOW, MX53_INT_GPIO4_HIGH);
160 mxc_register_gpio("imx31-gpio", 4, MX53_GPIO5_BASE_ADDR, SZ_16K, MX53_INT_GPIO5_LOW, MX53_INT_GPIO5_HIGH);
161 mxc_register_gpio("imx31-gpio", 5, MX53_GPIO6_BASE_ADDR, SZ_16K, MX53_INT_GPIO6_LOW, MX53_INT_GPIO6_HIGH);
162 mxc_register_gpio("imx31-gpio", 6, MX53_GPIO7_BASE_ADDR, SZ_16K, MX53_INT_GPIO7_LOW, MX53_INT_GPIO7_HIGH);
163
164 /* i.mx53 has the i.mx35 type sdma */
165 imx_add_imx_sdma("imx35-sdma", MX53_SDMA_BASE_ADDR, MX53_INT_SDMA, &imx53_sdma_pdata);
107} 166}