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Diffstat (limited to 'arch/arm/mach-mx5/mm-mx50.c')
-rw-r--r--arch/arm/mach-mx5/mm-mx50.c21
1 files changed, 10 insertions, 11 deletions
diff --git a/arch/arm/mach-mx5/mm-mx50.c b/arch/arm/mach-mx5/mm-mx50.c
index b9c363b514a9..28c3f60f734f 100644
--- a/arch/arm/mach-mx5/mm-mx50.c
+++ b/arch/arm/mach-mx5/mm-mx50.c
@@ -26,7 +26,6 @@
26#include <mach/hardware.h> 26#include <mach/hardware.h>
27#include <mach/common.h> 27#include <mach/common.h>
28#include <mach/iomux-v3.h> 28#include <mach/iomux-v3.h>
29#include <mach/gpio.h>
30#include <mach/irqs.h> 29#include <mach/irqs.h>
31 30
32/* 31/*
@@ -56,17 +55,17 @@ void __init imx50_init_early(void)
56 mxc_arch_reset_init(MX50_IO_ADDRESS(MX50_WDOG_BASE_ADDR)); 55 mxc_arch_reset_init(MX50_IO_ADDRESS(MX50_WDOG_BASE_ADDR));
57} 56}
58 57
59static struct mxc_gpio_port imx50_gpio_ports[] = {
60 DEFINE_IMX_GPIO_PORT_IRQ_HIGH(MX50, 0, 1, MX50_INT_GPIO1_LOW, MX50_INT_GPIO1_HIGH),
61 DEFINE_IMX_GPIO_PORT_IRQ_HIGH(MX50, 1, 2, MX50_INT_GPIO2_LOW, MX50_INT_GPIO2_HIGH),
62 DEFINE_IMX_GPIO_PORT_IRQ_HIGH(MX50, 2, 3, MX50_INT_GPIO3_LOW, MX50_INT_GPIO3_HIGH),
63 DEFINE_IMX_GPIO_PORT_IRQ_HIGH(MX50, 3, 4, MX50_INT_GPIO3_LOW, MX50_INT_GPIO3_HIGH),
64 DEFINE_IMX_GPIO_PORT_IRQ_HIGH(MX50, 4, 5, MX50_INT_GPIO3_LOW, MX50_INT_GPIO3_HIGH),
65 DEFINE_IMX_GPIO_PORT_IRQ_HIGH(MX50, 5, 6, MX50_INT_GPIO3_LOW, MX50_INT_GPIO3_HIGH),
66};
67
68void __init mx50_init_irq(void) 58void __init mx50_init_irq(void)
69{ 59{
70 tzic_init_irq(MX50_IO_ADDRESS(MX50_TZIC_BASE_ADDR)); 60 tzic_init_irq(MX50_IO_ADDRESS(MX50_TZIC_BASE_ADDR));
71 mxc_gpio_init(imx50_gpio_ports, ARRAY_SIZE(imx50_gpio_ports)); 61}
62
63void __init imx50_soc_init(void)
64{
65 mxc_register_gpio(0, MX50_GPIO1_BASE_ADDR, SZ_16K, MX50_INT_GPIO1_LOW, MX50_INT_GPIO1_HIGH);
66 mxc_register_gpio(1, MX50_GPIO2_BASE_ADDR, SZ_16K, MX50_INT_GPIO2_LOW, MX50_INT_GPIO2_HIGH);
67 mxc_register_gpio(2, MX50_GPIO3_BASE_ADDR, SZ_16K, MX50_INT_GPIO3_LOW, MX50_INT_GPIO3_HIGH);
68 mxc_register_gpio(3, MX50_GPIO4_BASE_ADDR, SZ_16K, MX50_INT_GPIO4_LOW, MX50_INT_GPIO4_HIGH);
69 mxc_register_gpio(4, MX50_GPIO5_BASE_ADDR, SZ_16K, MX50_INT_GPIO5_LOW, MX50_INT_GPIO5_HIGH);
70 mxc_register_gpio(5, MX50_GPIO6_BASE_ADDR, SZ_16K, MX50_INT_GPIO6_LOW, MX50_INT_GPIO6_HIGH);
72} 71}