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-rw-r--r--arch/arm/mach-msm/Kconfig17
-rw-r--r--arch/arm/mach-msm/Makefile7
-rw-r--r--arch/arm/mach-msm/board-halibut.c38
-rw-r--r--arch/arm/mach-msm/clock-7x01a.c126
-rw-r--r--arch/arm/mach-msm/clock.c218
-rw-r--r--arch/arm/mach-msm/clock.h48
-rw-r--r--arch/arm/mach-msm/common.c116
-rw-r--r--arch/arm/mach-msm/devices.c267
-rw-r--r--arch/arm/mach-msm/devices.h36
-rw-r--r--arch/arm/mach-msm/dma.c72
-rw-r--r--arch/arm/mach-msm/include/mach/board.h1
-rw-r--r--arch/arm/mach-msm/include/mach/debug-macro.S8
-rw-r--r--arch/arm/mach-msm/include/mach/dma.h24
-rw-r--r--arch/arm/mach-msm/include/mach/msm_iomap.h69
-rw-r--r--arch/arm/mach-msm/include/mach/vreg.h29
-rw-r--r--arch/arm/mach-msm/io.c12
-rw-r--r--arch/arm/mach-msm/irq.c10
-rw-r--r--arch/arm/mach-msm/proc_comm.c110
-rw-r--r--arch/arm/mach-msm/proc_comm.h165
-rw-r--r--arch/arm/mach-msm/timer.c2
-rw-r--r--arch/arm/mach-msm/vreg.c143
21 files changed, 1289 insertions, 229 deletions
diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
index 3553babbbf05..d140abca690a 100644
--- a/arch/arm/mach-msm/Kconfig
+++ b/arch/arm/mach-msm/Kconfig
@@ -1,18 +1,13 @@
1if ARCH_MSM7X00A 1if ARCH_MSM
2 2
3comment "MSM7X00A Board Type" 3comment "MSM Board Type"
4 depends on ARCH_MSM7X00A 4 depends on ARCH_MSM
5 5
6config MACH_HALIBUT 6config MACH_HALIBUT
7 depends on ARCH_MSM7X00A 7 depends on ARCH_MSM
8 default y 8 default y
9 bool "Halibut Board (QCT SURF7200A)" 9 bool "Halibut Board (QCT SURF7201A)"
10 help 10 help
11 Support for the Qualcomm SURF7200A eval board. 11 Support for the Qualcomm SURF7201A eval board.
12
13config MSM7X00A_IDLE
14 depends on ARCH_MSM7X00A
15 default y
16 bool "Idle Support for MSM7X00A"
17 12
18endif 13endif
diff --git a/arch/arm/mach-msm/Makefile b/arch/arm/mach-msm/Makefile
index d12f23655850..1aa47001aa3b 100644
--- a/arch/arm/mach-msm/Makefile
+++ b/arch/arm/mach-msm/Makefile
@@ -1,7 +1,8 @@
1obj-y += io.o idle.o irq.o timer.o dma.o 1obj-y += io.o idle.o irq.o timer.o dma.o
2 2obj-y += devices.o
3# Common code for board init 3obj-y += proc_comm.o
4obj-y += common.o 4obj-y += vreg.o
5obj-y += clock.o clock-7x01a.o
5 6
6obj-$(CONFIG_MACH_HALIBUT) += board-halibut.o 7obj-$(CONFIG_MACH_HALIBUT) += board-halibut.o
7 8
diff --git a/arch/arm/mach-msm/board-halibut.c b/arch/arm/mach-msm/board-halibut.c
index a24259133e07..c2a96e3965a6 100644
--- a/arch/arm/mach-msm/board-halibut.c
+++ b/arch/arm/mach-msm/board-halibut.c
@@ -33,6 +33,8 @@
33#include <linux/mtd/nand.h> 33#include <linux/mtd/nand.h>
34#include <linux/mtd/partitions.h> 34#include <linux/mtd/partitions.h>
35 35
36#include "devices.h"
37
36static struct resource smc91x_resources[] = { 38static struct resource smc91x_resources[] = {
37 [0] = { 39 [0] = {
38 .start = 0x9C004300, 40 .start = 0x9C004300,
@@ -53,31 +55,12 @@ static struct platform_device smc91x_device = {
53 .resource = smc91x_resources, 55 .resource = smc91x_resources,
54}; 56};
55 57
56static void mddi0_panel_power(int on)
57{
58}
59
60static struct msm_mddi_platform_data msm_mddi0_pdata = {
61 .panel_power = mddi0_panel_power,
62 .has_vsync_irq = 0,
63};
64
65static struct platform_device msm_mddi0_device = {
66 .name = "msm_mddi",
67 .id = 0,
68 .dev = {
69 .platform_data = &msm_mddi0_pdata
70 },
71};
72
73static struct platform_device msm_serial0_device = {
74 .name = "msm_serial",
75 .id = 0,
76};
77
78static struct platform_device *devices[] __initdata = { 58static struct platform_device *devices[] __initdata = {
79 &msm_serial0_device, 59 &msm_device_uart3,
80 &msm_mddi0_device, 60 &msm_device_smd,
61 &msm_device_nand,
62 &msm_device_hsusb,
63 &msm_device_i2c,
81 &smc91x_device, 64 &smc91x_device,
82}; 65};
83 66
@@ -91,20 +74,15 @@ static void __init halibut_init_irq(void)
91static void __init halibut_init(void) 74static void __init halibut_init(void)
92{ 75{
93 platform_add_devices(devices, ARRAY_SIZE(devices)); 76 platform_add_devices(devices, ARRAY_SIZE(devices));
94 msm_add_devices();
95} 77}
96 78
97static void __init halibut_map_io(void) 79static void __init halibut_map_io(void)
98{ 80{
99 msm_map_common_io(); 81 msm_map_common_io();
82 msm_clock_init();
100} 83}
101 84
102MACHINE_START(HALIBUT, "Halibut Board (QCT SURF7200A)") 85MACHINE_START(HALIBUT, "Halibut Board (QCT SURF7200A)")
103
104/* UART for LL DEBUG */
105 .phys_io = MSM_UART1_PHYS,
106 .io_pg_offst = ((MSM_UART1_BASE) >> 18) & 0xfffc,
107
108 .boot_params = 0x10000100, 86 .boot_params = 0x10000100,
109 .map_io = halibut_map_io, 87 .map_io = halibut_map_io,
110 .init_irq = halibut_init_irq, 88 .init_irq = halibut_init_irq,
diff --git a/arch/arm/mach-msm/clock-7x01a.c b/arch/arm/mach-msm/clock-7x01a.c
new file mode 100644
index 000000000000..62230a3428ee
--- /dev/null
+++ b/arch/arm/mach-msm/clock-7x01a.c
@@ -0,0 +1,126 @@
1/* arch/arm/mach-msm/clock-7x01a.c
2 *
3 * Clock tables for MSM7X01A
4 *
5 * Copyright (C) 2007 Google, Inc.
6 * Copyright (c) 2007 QUALCOMM Incorporated
7 *
8 * This software is licensed under the terms of the GNU General Public
9 * License version 2, as published by the Free Software Foundation, and
10 * may be copied, distributed, and modified under those terms.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 */
18
19#include <linux/kernel.h>
20#include <linux/platform_device.h>
21
22#include "clock.h"
23#include "devices.h"
24
25/* clock IDs used by the modem processor */
26
27#define ACPU_CLK 0 /* Applications processor clock */
28#define ADM_CLK 1 /* Applications data mover clock */
29#define ADSP_CLK 2 /* ADSP clock */
30#define EBI1_CLK 3 /* External bus interface 1 clock */
31#define EBI2_CLK 4 /* External bus interface 2 clock */
32#define ECODEC_CLK 5 /* External CODEC clock */
33#define EMDH_CLK 6 /* External MDDI host clock */
34#define GP_CLK 7 /* General purpose clock */
35#define GRP_CLK 8 /* Graphics clock */
36#define I2C_CLK 9 /* I2C clock */
37#define ICODEC_RX_CLK 10 /* Internal CODEX RX clock */
38#define ICODEC_TX_CLK 11 /* Internal CODEX TX clock */
39#define IMEM_CLK 12 /* Internal graphics memory clock */
40#define MDC_CLK 13 /* MDDI client clock */
41#define MDP_CLK 14 /* Mobile display processor clock */
42#define PBUS_CLK 15 /* Peripheral bus clock */
43#define PCM_CLK 16 /* PCM clock */
44#define PMDH_CLK 17 /* Primary MDDI host clock */
45#define SDAC_CLK 18 /* Stereo DAC clock */
46#define SDC1_CLK 19 /* Secure Digital Card clocks */
47#define SDC1_PCLK 20
48#define SDC2_CLK 21
49#define SDC2_PCLK 22
50#define SDC3_CLK 23
51#define SDC3_PCLK 24
52#define SDC4_CLK 25
53#define SDC4_PCLK 26
54#define TSIF_CLK 27 /* Transport Stream Interface clocks */
55#define TSIF_REF_CLK 28
56#define TV_DAC_CLK 29 /* TV clocks */
57#define TV_ENC_CLK 30
58#define UART1_CLK 31 /* UART clocks */
59#define UART2_CLK 32
60#define UART3_CLK 33
61#define UART1DM_CLK 34
62#define UART2DM_CLK 35
63#define USB_HS_CLK 36 /* High speed USB core clock */
64#define USB_HS_PCLK 37 /* High speed USB pbus clock */
65#define USB_OTG_CLK 38 /* Full speed USB clock */
66#define VDC_CLK 39 /* Video controller clock */
67#define VFE_CLK 40 /* Camera / Video Front End clock */
68#define VFE_MDC_CLK 41 /* VFE MDDI client clock */
69
70#define NR_CLKS 42
71
72#define CLOCK(clk_name, clk_id, clk_dev, clk_flags) { \
73 .name = clk_name, \
74 .id = clk_id, \
75 .flags = clk_flags, \
76 .dev = clk_dev, \
77 }
78
79#define OFF CLKFLAG_AUTO_OFF
80#define MINMAX CLKFLAG_USE_MIN_MAX_TO_SET
81
82struct clk msm_clocks[] = {
83 CLOCK("adm_clk", ADM_CLK, NULL, 0),
84 CLOCK("adsp_clk", ADSP_CLK, NULL, 0),
85 CLOCK("ebi1_clk", EBI1_CLK, NULL, 0),
86 CLOCK("ebi2_clk", EBI2_CLK, NULL, 0),
87 CLOCK("ecodec_clk", ECODEC_CLK, NULL, 0),
88 CLOCK("emdh_clk", EMDH_CLK, NULL, OFF),
89 CLOCK("gp_clk", GP_CLK, NULL, 0),
90 CLOCK("grp_clk", GRP_CLK, NULL, OFF),
91 CLOCK("i2c_clk", I2C_CLK, &msm_device_i2c.dev, 0),
92 CLOCK("icodec_rx_clk", ICODEC_RX_CLK, NULL, 0),
93 CLOCK("icodec_tx_clk", ICODEC_TX_CLK, NULL, 0),
94 CLOCK("imem_clk", IMEM_CLK, NULL, OFF),
95 CLOCK("mdc_clk", MDC_CLK, NULL, 0),
96 CLOCK("mdp_clk", MDP_CLK, NULL, OFF),
97 CLOCK("pbus_clk", PBUS_CLK, NULL, 0),
98 CLOCK("pcm_clk", PCM_CLK, NULL, 0),
99 CLOCK("pmdh_clk", PMDH_CLK, NULL, OFF | MINMAX),
100 CLOCK("sdac_clk", SDAC_CLK, NULL, OFF),
101 CLOCK("sdc_clk", SDC1_CLK, &msm_device_sdc1.dev, OFF),
102 CLOCK("sdc_pclk", SDC1_PCLK, &msm_device_sdc1.dev, OFF),
103 CLOCK("sdc_clk", SDC2_CLK, &msm_device_sdc2.dev, OFF),
104 CLOCK("sdc_pclk", SDC2_PCLK, &msm_device_sdc2.dev, OFF),
105 CLOCK("sdc_clk", SDC3_CLK, &msm_device_sdc3.dev, OFF),
106 CLOCK("sdc_pclk", SDC3_PCLK, &msm_device_sdc3.dev, OFF),
107 CLOCK("sdc_clk", SDC4_CLK, &msm_device_sdc4.dev, OFF),
108 CLOCK("sdc_pclk", SDC4_PCLK, &msm_device_sdc4.dev, OFF),
109 CLOCK("tsif_clk", TSIF_CLK, NULL, 0),
110 CLOCK("tsif_ref_clk", TSIF_REF_CLK, NULL, 0),
111 CLOCK("tv_dac_clk", TV_DAC_CLK, NULL, 0),
112 CLOCK("tv_enc_clk", TV_ENC_CLK, NULL, 0),
113 CLOCK("uart_clk", UART1_CLK, &msm_device_uart1.dev, OFF),
114 CLOCK("uart_clk", UART2_CLK, &msm_device_uart2.dev, 0),
115 CLOCK("uart_clk", UART3_CLK, &msm_device_uart3.dev, OFF),
116 CLOCK("uart1dm_clk", UART1DM_CLK, NULL, OFF),
117 CLOCK("uart2dm_clk", UART2DM_CLK, NULL, 0),
118 CLOCK("usb_hs_clk", USB_HS_CLK, &msm_device_hsusb.dev, OFF),
119 CLOCK("usb_hs_pclk", USB_HS_PCLK, &msm_device_hsusb.dev, OFF),
120 CLOCK("usb_otg_clk", USB_OTG_CLK, NULL, 0),
121 CLOCK("vdc_clk", VDC_CLK, NULL, OFF | MINMAX),
122 CLOCK("vfe_clk", VFE_CLK, NULL, OFF),
123 CLOCK("vfe_mdc_clk", VFE_MDC_CLK, NULL, OFF),
124};
125
126unsigned msm_num_clocks = ARRAY_SIZE(msm_clocks);
diff --git a/arch/arm/mach-msm/clock.c b/arch/arm/mach-msm/clock.c
new file mode 100644
index 000000000000..3b1ce36f1032
--- /dev/null
+++ b/arch/arm/mach-msm/clock.c
@@ -0,0 +1,218 @@
1/* arch/arm/mach-msm/clock.c
2 *
3 * Copyright (C) 2007 Google, Inc.
4 * Copyright (c) 2007 QUALCOMM Incorporated
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16
17#include <linux/version.h>
18#include <linux/kernel.h>
19#include <linux/init.h>
20#include <linux/module.h>
21#include <linux/list.h>
22#include <linux/err.h>
23#include <linux/clk.h>
24#include <linux/spinlock.h>
25
26#include "clock.h"
27#include "proc_comm.h"
28
29static DEFINE_MUTEX(clocks_mutex);
30static DEFINE_SPINLOCK(clocks_lock);
31static LIST_HEAD(clocks);
32
33/*
34 * glue for the proc_comm interface
35 */
36static inline int pc_clk_enable(unsigned id)
37{
38 return msm_proc_comm(PCOM_CLKCTL_RPC_ENABLE, &id, NULL);
39}
40
41static inline void pc_clk_disable(unsigned id)
42{
43 msm_proc_comm(PCOM_CLKCTL_RPC_DISABLE, &id, NULL);
44}
45
46static inline int pc_clk_set_rate(unsigned id, unsigned rate)
47{
48 return msm_proc_comm(PCOM_CLKCTL_RPC_SET_RATE, &id, &rate);
49}
50
51static inline int pc_clk_set_min_rate(unsigned id, unsigned rate)
52{
53 return msm_proc_comm(PCOM_CLKCTL_RPC_MIN_RATE, &id, &rate);
54}
55
56static inline int pc_clk_set_max_rate(unsigned id, unsigned rate)
57{
58 return msm_proc_comm(PCOM_CLKCTL_RPC_MAX_RATE, &id, &rate);
59}
60
61static inline int pc_clk_set_flags(unsigned id, unsigned flags)
62{
63 return msm_proc_comm(PCOM_CLKCTL_RPC_SET_FLAGS, &id, &flags);
64}
65
66static inline unsigned pc_clk_get_rate(unsigned id)
67{
68 if (msm_proc_comm(PCOM_CLKCTL_RPC_RATE, &id, NULL))
69 return 0;
70 else
71 return id;
72}
73
74static inline unsigned pc_clk_is_enabled(unsigned id)
75{
76 if (msm_proc_comm(PCOM_CLKCTL_RPC_ENABLED, &id, NULL))
77 return 0;
78 else
79 return id;
80}
81
82static inline int pc_pll_request(unsigned id, unsigned on)
83{
84 on = !!on;
85 return msm_proc_comm(PCOM_CLKCTL_RPC_PLL_REQUEST, &id, &on);
86}
87
88/*
89 * Standard clock functions defined in include/linux/clk.h
90 */
91struct clk *clk_get(struct device *dev, const char *id)
92{
93 struct clk *clk;
94
95 mutex_lock(&clocks_mutex);
96
97 list_for_each_entry(clk, &clocks, list)
98 if (!strcmp(id, clk->name) && clk->dev == dev)
99 goto found_it;
100
101 list_for_each_entry(clk, &clocks, list)
102 if (!strcmp(id, clk->name) && clk->dev == NULL)
103 goto found_it;
104
105 clk = ERR_PTR(-ENOENT);
106found_it:
107 mutex_unlock(&clocks_mutex);
108 return clk;
109}
110EXPORT_SYMBOL(clk_get);
111
112void clk_put(struct clk *clk)
113{
114}
115EXPORT_SYMBOL(clk_put);
116
117int clk_enable(struct clk *clk)
118{
119 unsigned long flags;
120 spin_lock_irqsave(&clocks_lock, flags);
121 clk->count++;
122 if (clk->count == 1)
123 pc_clk_enable(clk->id);
124 spin_unlock_irqrestore(&clocks_lock, flags);
125 return 0;
126}
127EXPORT_SYMBOL(clk_enable);
128
129void clk_disable(struct clk *clk)
130{
131 unsigned long flags;
132 spin_lock_irqsave(&clocks_lock, flags);
133 BUG_ON(clk->count == 0);
134 clk->count--;
135 if (clk->count == 0)
136 pc_clk_disable(clk->id);
137 spin_unlock_irqrestore(&clocks_lock, flags);
138}
139EXPORT_SYMBOL(clk_disable);
140
141unsigned long clk_get_rate(struct clk *clk)
142{
143 return pc_clk_get_rate(clk->id);
144}
145EXPORT_SYMBOL(clk_get_rate);
146
147int clk_set_rate(struct clk *clk, unsigned long rate)
148{
149 int ret;
150 if (clk->flags & CLKFLAG_USE_MIN_MAX_TO_SET) {
151 ret = pc_clk_set_max_rate(clk->id, rate);
152 if (ret)
153 return ret;
154 return pc_clk_set_min_rate(clk->id, rate);
155 }
156 return pc_clk_set_rate(clk->id, rate);
157}
158EXPORT_SYMBOL(clk_set_rate);
159
160int clk_set_parent(struct clk *clk, struct clk *parent)
161{
162 return -ENOSYS;
163}
164EXPORT_SYMBOL(clk_set_parent);
165
166struct clk *clk_get_parent(struct clk *clk)
167{
168 return ERR_PTR(-ENOSYS);
169}
170EXPORT_SYMBOL(clk_get_parent);
171
172int clk_set_flags(struct clk *clk, unsigned long flags)
173{
174 if (clk == NULL || IS_ERR(clk))
175 return -EINVAL;
176 return pc_clk_set_flags(clk->id, flags);
177}
178EXPORT_SYMBOL(clk_set_flags);
179
180
181void __init msm_clock_init(void)
182{
183 unsigned n;
184
185 spin_lock_init(&clocks_lock);
186 mutex_lock(&clocks_mutex);
187 for (n = 0; n < msm_num_clocks; n++)
188 list_add_tail(&msm_clocks[n].list, &clocks);
189 mutex_unlock(&clocks_mutex);
190}
191
192/* The bootloader and/or AMSS may have left various clocks enabled.
193 * Disable any clocks that belong to us (CLKFLAG_AUTO_OFF) but have
194 * not been explicitly enabled by a clk_enable() call.
195 */
196static int __init clock_late_init(void)
197{
198 unsigned long flags;
199 struct clk *clk;
200 unsigned count = 0;
201
202 mutex_lock(&clocks_mutex);
203 list_for_each_entry(clk, &clocks, list) {
204 if (clk->flags & CLKFLAG_AUTO_OFF) {
205 spin_lock_irqsave(&clocks_lock, flags);
206 if (!clk->count) {
207 count++;
208 pc_clk_disable(clk->id);
209 }
210 spin_unlock_irqrestore(&clocks_lock, flags);
211 }
212 }
213 mutex_unlock(&clocks_mutex);
214 pr_info("clock_late_init() disabled %d unused clocks\n", count);
215 return 0;
216}
217
218late_initcall(clock_late_init);
diff --git a/arch/arm/mach-msm/clock.h b/arch/arm/mach-msm/clock.h
new file mode 100644
index 000000000000..f875e1544e5f
--- /dev/null
+++ b/arch/arm/mach-msm/clock.h
@@ -0,0 +1,48 @@
1/* arch/arm/mach-msm/clock.h
2 *
3 * Copyright (C) 2007 Google, Inc.
4 * Copyright (c) 2007 QUALCOMM Incorporated
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16
17#ifndef __ARCH_ARM_MACH_MSM_CLOCK_H
18#define __ARCH_ARM_MACH_MSM_CLOCK_H
19
20#include <linux/list.h>
21
22#define CLKFLAG_INVERT 0x00000001
23#define CLKFLAG_NOINVERT 0x00000002
24#define CLKFLAG_NONEST 0x00000004
25#define CLKFLAG_NORESET 0x00000008
26
27#define CLK_FIRST_AVAILABLE_FLAG 0x00000100
28#define CLKFLAG_USE_MIN_MAX_TO_SET 0x00000200
29#define CLKFLAG_AUTO_OFF 0x00000400
30
31struct clk {
32 uint32_t id;
33 uint32_t count;
34 uint32_t flags;
35 const char *name;
36 struct list_head list;
37 struct device *dev;
38};
39
40#define A11S_CLK_CNTL_ADDR (MSM_CSR_BASE + 0x100)
41#define A11S_CLK_SEL_ADDR (MSM_CSR_BASE + 0x104)
42#define A11S_VDD_SVS_PLEVEL_ADDR (MSM_CSR_BASE + 0x124)
43
44extern struct clk msm_clocks[];
45extern unsigned msm_num_clocks;
46
47#endif
48
diff --git a/arch/arm/mach-msm/common.c b/arch/arm/mach-msm/common.c
deleted file mode 100644
index 604f8ade9587..000000000000
--- a/arch/arm/mach-msm/common.c
+++ /dev/null
@@ -1,116 +0,0 @@
1/* linux/arch/arm/mach-msm/common.c
2 *
3 * Common setup code for MSM7K Boards
4 *
5 * Copyright (C) 2007 Google, Inc.
6 * Author: Brian Swetland <swetland@google.com>
7 *
8 * This software is licensed under the terms of the GNU General Public
9 * License version 2, as published by the Free Software Foundation, and
10 * may be copied, distributed, and modified under those terms.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 */
18
19#include <linux/kernel.h>
20#include <linux/init.h>
21#include <linux/platform_device.h>
22#include <linux/io.h>
23
24#include <asm/mach/flash.h>
25
26#include <asm/setup.h>
27
28#include <linux/mtd/nand.h>
29#include <linux/mtd/partitions.h>
30
31#include <mach/msm_iomap.h>
32
33#include <mach/board.h>
34
35struct flash_platform_data msm_nand_data = {
36 .parts = 0,
37 .nr_parts = 0,
38};
39
40static struct resource msm_nand_resources[] = {
41 [0] = {
42 .start = 7,
43 .end = 7,
44 .flags = IORESOURCE_DMA,
45 },
46};
47
48static struct platform_device msm_nand_device = {
49 .name = "msm_nand",
50 .id = -1,
51 .num_resources = ARRAY_SIZE(msm_nand_resources),
52 .resource = msm_nand_resources,
53 .dev = {
54 .platform_data = &msm_nand_data,
55 },
56};
57
58static struct platform_device msm_smd_device = {
59 .name = "msm_smd",
60 .id = -1,
61};
62
63static struct resource msm_i2c_resources[] = {
64 {
65 .start = MSM_I2C_BASE,
66 .end = MSM_I2C_BASE + MSM_I2C_SIZE - 1,
67 .flags = IORESOURCE_MEM,
68 },
69 {
70 .start = INT_PWB_I2C,
71 .end = INT_PWB_I2C,
72 .flags = IORESOURCE_IRQ,
73 },
74};
75
76static struct platform_device msm_i2c_device = {
77 .name = "msm_i2c",
78 .id = 0,
79 .num_resources = ARRAY_SIZE(msm_i2c_resources),
80 .resource = msm_i2c_resources,
81};
82
83static struct resource usb_resources[] = {
84 {
85 .start = MSM_HSUSB_PHYS,
86 .end = MSM_HSUSB_PHYS + MSM_HSUSB_SIZE,
87 .flags = IORESOURCE_MEM,
88 },
89 {
90 .start = INT_USB_HS,
91 .end = INT_USB_HS,
92 .flags = IORESOURCE_IRQ,
93 },
94};
95
96static struct platform_device msm_hsusb_device = {
97 .name = "msm_hsusb",
98 .id = -1,
99 .num_resources = ARRAY_SIZE(usb_resources),
100 .resource = usb_resources,
101 .dev = {
102 .coherent_dma_mask = 0xffffffff,
103 },
104};
105
106static struct platform_device *devices[] __initdata = {
107 &msm_nand_device,
108 &msm_smd_device,
109 &msm_i2c_device,
110 &msm_hsusb_device,
111};
112
113void __init msm_add_devices(void)
114{
115 platform_add_devices(devices, ARRAY_SIZE(devices));
116}
diff --git a/arch/arm/mach-msm/devices.c b/arch/arm/mach-msm/devices.c
new file mode 100644
index 000000000000..f2a74b92a97f
--- /dev/null
+++ b/arch/arm/mach-msm/devices.c
@@ -0,0 +1,267 @@
1/* linux/arch/arm/mach-msm/devices.c
2 *
3 * Copyright (C) 2008 Google, Inc.
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 */
15
16#include <linux/kernel.h>
17#include <linux/platform_device.h>
18
19#include <mach/msm_iomap.h>
20#include "devices.h"
21
22#include <asm/mach/flash.h>
23#include <linux/mtd/nand.h>
24#include <linux/mtd/partitions.h>
25
26static struct resource resources_uart1[] = {
27 {
28 .start = INT_UART1,
29 .end = INT_UART1,
30 .flags = IORESOURCE_IRQ,
31 },
32 {
33 .start = MSM_UART1_PHYS,
34 .end = MSM_UART1_PHYS + MSM_UART1_SIZE - 1,
35 .flags = IORESOURCE_MEM,
36 },
37};
38
39static struct resource resources_uart2[] = {
40 {
41 .start = INT_UART2,
42 .end = INT_UART2,
43 .flags = IORESOURCE_IRQ,
44 },
45 {
46 .start = MSM_UART2_PHYS,
47 .end = MSM_UART2_PHYS + MSM_UART2_SIZE - 1,
48 .flags = IORESOURCE_MEM,
49 },
50};
51
52static struct resource resources_uart3[] = {
53 {
54 .start = INT_UART3,
55 .end = INT_UART3,
56 .flags = IORESOURCE_IRQ,
57 },
58 {
59 .start = MSM_UART3_PHYS,
60 .end = MSM_UART3_PHYS + MSM_UART3_SIZE - 1,
61 .flags = IORESOURCE_MEM,
62 },
63};
64
65struct platform_device msm_device_uart1 = {
66 .name = "msm_serial",
67 .id = 0,
68 .num_resources = ARRAY_SIZE(resources_uart1),
69 .resource = resources_uart1,
70};
71
72struct platform_device msm_device_uart2 = {
73 .name = "msm_serial",
74 .id = 1,
75 .num_resources = ARRAY_SIZE(resources_uart2),
76 .resource = resources_uart2,
77};
78
79struct platform_device msm_device_uart3 = {
80 .name = "msm_serial",
81 .id = 2,
82 .num_resources = ARRAY_SIZE(resources_uart3),
83 .resource = resources_uart3,
84};
85
86static struct resource resources_i2c[] = {
87 {
88 .start = MSM_I2C_PHYS,
89 .end = MSM_I2C_PHYS + MSM_I2C_SIZE - 1,
90 .flags = IORESOURCE_MEM,
91 },
92 {
93 .start = INT_PWB_I2C,
94 .end = INT_PWB_I2C,
95 .flags = IORESOURCE_IRQ,
96 },
97};
98
99struct platform_device msm_device_i2c = {
100 .name = "msm_i2c",
101 .id = 0,
102 .num_resources = ARRAY_SIZE(resources_i2c),
103 .resource = resources_i2c,
104};
105
106static struct resource resources_hsusb[] = {
107 {
108 .start = MSM_HSUSB_PHYS,
109 .end = MSM_HSUSB_PHYS + MSM_HSUSB_SIZE,
110 .flags = IORESOURCE_MEM,
111 },
112 {
113 .start = INT_USB_HS,
114 .end = INT_USB_HS,
115 .flags = IORESOURCE_IRQ,
116 },
117};
118
119struct platform_device msm_device_hsusb = {
120 .name = "msm_hsusb",
121 .id = -1,
122 .num_resources = ARRAY_SIZE(resources_hsusb),
123 .resource = resources_hsusb,
124 .dev = {
125 .coherent_dma_mask = 0xffffffff,
126 },
127};
128
129struct flash_platform_data msm_nand_data = {
130 .parts = NULL,
131 .nr_parts = 0,
132};
133
134static struct resource resources_nand[] = {
135 [0] = {
136 .start = 7,
137 .end = 7,
138 .flags = IORESOURCE_DMA,
139 },
140};
141
142struct platform_device msm_device_nand = {
143 .name = "msm_nand",
144 .id = -1,
145 .num_resources = ARRAY_SIZE(resources_nand),
146 .resource = resources_nand,
147 .dev = {
148 .platform_data = &msm_nand_data,
149 },
150};
151
152struct platform_device msm_device_smd = {
153 .name = "msm_smd",
154 .id = -1,
155};
156
157static struct resource resources_sdc1[] = {
158 {
159 .start = MSM_SDC1_PHYS,
160 .end = MSM_SDC1_PHYS + MSM_SDC1_SIZE - 1,
161 .flags = IORESOURCE_MEM,
162 },
163 {
164 .start = INT_SDC1_0,
165 .end = INT_SDC1_1,
166 .flags = IORESOURCE_IRQ,
167 },
168 {
169 .start = 8,
170 .end = 8,
171 .flags = IORESOURCE_DMA,
172 },
173};
174
175static struct resource resources_sdc2[] = {
176 {
177 .start = MSM_SDC2_PHYS,
178 .end = MSM_SDC2_PHYS + MSM_SDC2_SIZE - 1,
179 .flags = IORESOURCE_MEM,
180 },
181 {
182 .start = INT_SDC2_0,
183 .end = INT_SDC2_1,
184 .flags = IORESOURCE_IRQ,
185 },
186 {
187 .start = 8,
188 .end = 8,
189 .flags = IORESOURCE_DMA,
190 },
191};
192
193static struct resource resources_sdc3[] = {
194 {
195 .start = MSM_SDC3_PHYS,
196 .end = MSM_SDC3_PHYS + MSM_SDC3_SIZE - 1,
197 .flags = IORESOURCE_MEM,
198 },
199 {
200 .start = INT_SDC3_0,
201 .end = INT_SDC3_1,
202 .flags = IORESOURCE_IRQ,
203 },
204 {
205 .start = 8,
206 .end = 8,
207 .flags = IORESOURCE_DMA,
208 },
209};
210
211static struct resource resources_sdc4[] = {
212 {
213 .start = MSM_SDC4_PHYS,
214 .end = MSM_SDC4_PHYS + MSM_SDC4_SIZE - 1,
215 .flags = IORESOURCE_MEM,
216 },
217 {
218 .start = INT_SDC4_0,
219 .end = INT_SDC4_1,
220 .flags = IORESOURCE_IRQ,
221 },
222 {
223 .start = 8,
224 .end = 8,
225 .flags = IORESOURCE_DMA,
226 },
227};
228
229struct platform_device msm_device_sdc1 = {
230 .name = "msm_sdcc",
231 .id = 1,
232 .num_resources = ARRAY_SIZE(resources_sdc1),
233 .resource = resources_sdc1,
234 .dev = {
235 .coherent_dma_mask = 0xffffffff,
236 },
237};
238
239struct platform_device msm_device_sdc2 = {
240 .name = "msm_sdcc",
241 .id = 2,
242 .num_resources = ARRAY_SIZE(resources_sdc2),
243 .resource = resources_sdc2,
244 .dev = {
245 .coherent_dma_mask = 0xffffffff,
246 },
247};
248
249struct platform_device msm_device_sdc3 = {
250 .name = "msm_sdcc",
251 .id = 3,
252 .num_resources = ARRAY_SIZE(resources_sdc3),
253 .resource = resources_sdc3,
254 .dev = {
255 .coherent_dma_mask = 0xffffffff,
256 },
257};
258
259struct platform_device msm_device_sdc4 = {
260 .name = "msm_sdcc",
261 .id = 4,
262 .num_resources = ARRAY_SIZE(resources_sdc4),
263 .resource = resources_sdc4,
264 .dev = {
265 .coherent_dma_mask = 0xffffffff,
266 },
267};
diff --git a/arch/arm/mach-msm/devices.h b/arch/arm/mach-msm/devices.h
new file mode 100644
index 000000000000..0744c4a27d6a
--- /dev/null
+++ b/arch/arm/mach-msm/devices.h
@@ -0,0 +1,36 @@
1/* linux/arch/arm/mach-msm/devices.h
2 *
3 * Copyright (C) 2008 Google, Inc.
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 */
15
16#ifndef __ARCH_ARM_MACH_MSM_DEVICES_H
17#define __ARCH_ARM_MACH_MSM_DEVICES_H
18
19extern struct platform_device msm_device_uart1;
20extern struct platform_device msm_device_uart2;
21extern struct platform_device msm_device_uart3;
22
23extern struct platform_device msm_device_sdc1;
24extern struct platform_device msm_device_sdc2;
25extern struct platform_device msm_device_sdc3;
26extern struct platform_device msm_device_sdc4;
27
28extern struct platform_device msm_device_hsusb;
29
30extern struct platform_device msm_device_i2c;
31
32extern struct platform_device msm_device_smd;
33
34extern struct platform_device msm_device_nand;
35
36#endif
diff --git a/arch/arm/mach-msm/dma.c b/arch/arm/mach-msm/dma.c
index 0c8f252637e1..f5420f9585c5 100644
--- a/arch/arm/mach-msm/dma.c
+++ b/arch/arm/mach-msm/dma.c
@@ -26,7 +26,7 @@ enum {
26}; 26};
27 27
28static DEFINE_SPINLOCK(msm_dmov_lock); 28static DEFINE_SPINLOCK(msm_dmov_lock);
29static struct msm_dmov_cmd active_command; 29static unsigned int channel_active;
30static struct list_head ready_commands[MSM_DMOV_CHANNEL_COUNT]; 30static struct list_head ready_commands[MSM_DMOV_CHANNEL_COUNT];
31static struct list_head active_commands[MSM_DMOV_CHANNEL_COUNT]; 31static struct list_head active_commands[MSM_DMOV_CHANNEL_COUNT];
32unsigned int msm_dmov_print_mask = MSM_DMOV_PRINT_ERRORS; 32unsigned int msm_dmov_print_mask = MSM_DMOV_PRINT_ERRORS;
@@ -43,6 +43,11 @@ unsigned int msm_dmov_print_mask = MSM_DMOV_PRINT_ERRORS;
43#define PRINT_FLOW(format, args...) \ 43#define PRINT_FLOW(format, args...) \
44 MSM_DMOV_DPRINTF(MSM_DMOV_PRINT_FLOW, format, args); 44 MSM_DMOV_DPRINTF(MSM_DMOV_PRINT_FLOW, format, args);
45 45
46void msm_dmov_stop_cmd(unsigned id, struct msm_dmov_cmd *cmd, int graceful)
47{
48 writel((graceful << 31), DMOV_FLUSH0(id));
49}
50
46void msm_dmov_enqueue_cmd(unsigned id, struct msm_dmov_cmd *cmd) 51void msm_dmov_enqueue_cmd(unsigned id, struct msm_dmov_cmd *cmd)
47{ 52{
48 unsigned long irq_flags; 53 unsigned long irq_flags;
@@ -60,6 +65,9 @@ void msm_dmov_enqueue_cmd(unsigned id, struct msm_dmov_cmd *cmd)
60#endif 65#endif
61 PRINT_IO("msm_dmov_enqueue_cmd(%d), start command, status %x\n", id, status); 66 PRINT_IO("msm_dmov_enqueue_cmd(%d), start command, status %x\n", id, status);
62 list_add_tail(&cmd->list, &active_commands[id]); 67 list_add_tail(&cmd->list, &active_commands[id]);
68 if (!channel_active)
69 enable_irq(INT_ADM_AARM);
70 channel_active |= 1U << id;
63 writel(cmd->cmdptr, DMOV_CMD_PTR(id)); 71 writel(cmd->cmdptr, DMOV_CMD_PTR(id));
64 } else { 72 } else {
65 if (list_empty(&active_commands[id])) 73 if (list_empty(&active_commands[id]))
@@ -76,21 +84,19 @@ struct msm_dmov_exec_cmdptr_cmd {
76 struct completion complete; 84 struct completion complete;
77 unsigned id; 85 unsigned id;
78 unsigned int result; 86 unsigned int result;
79 unsigned int flush[6]; 87 struct msm_dmov_errdata err;
80}; 88};
81 89
82static void dmov_exec_cmdptr_complete_func(struct msm_dmov_cmd *_cmd, unsigned int result) 90static void
91dmov_exec_cmdptr_complete_func(struct msm_dmov_cmd *_cmd,
92 unsigned int result,
93 struct msm_dmov_errdata *err)
83{ 94{
84 struct msm_dmov_exec_cmdptr_cmd *cmd = container_of(_cmd, struct msm_dmov_exec_cmdptr_cmd, dmov_cmd); 95 struct msm_dmov_exec_cmdptr_cmd *cmd = container_of(_cmd, struct msm_dmov_exec_cmdptr_cmd, dmov_cmd);
85 cmd->result = result; 96 cmd->result = result;
86 if (result != 0x80000002) { 97 if (result != 0x80000002 && err)
87 cmd->flush[0] = readl(DMOV_FLUSH0(cmd->id)); 98 memcpy(&cmd->err, err, sizeof(struct msm_dmov_errdata));
88 cmd->flush[1] = readl(DMOV_FLUSH1(cmd->id)); 99
89 cmd->flush[2] = readl(DMOV_FLUSH2(cmd->id));
90 cmd->flush[3] = readl(DMOV_FLUSH3(cmd->id));
91 cmd->flush[4] = readl(DMOV_FLUSH4(cmd->id));
92 cmd->flush[5] = readl(DMOV_FLUSH5(cmd->id));
93 }
94 complete(&cmd->complete); 100 complete(&cmd->complete);
95} 101}
96 102
@@ -111,7 +117,7 @@ int msm_dmov_exec_cmd(unsigned id, unsigned int cmdptr)
111 if (cmd.result != 0x80000002) { 117 if (cmd.result != 0x80000002) {
112 PRINT_ERROR("dmov_exec_cmdptr(%d): ERROR, result: %x\n", id, cmd.result); 118 PRINT_ERROR("dmov_exec_cmdptr(%d): ERROR, result: %x\n", id, cmd.result);
113 PRINT_ERROR("dmov_exec_cmdptr(%d): flush: %x %x %x %x\n", 119 PRINT_ERROR("dmov_exec_cmdptr(%d): flush: %x %x %x %x\n",
114 id, cmd.flush[0], cmd.flush[1], cmd.flush[2], cmd.flush[3]); 120 id, cmd.err.flush[0], cmd.err.flush[1], cmd.err.flush[2], cmd.err.flush[3]);
115 return -EIO; 121 return -EIO;
116 } 122 }
117 PRINT_FLOW("dmov_exec_cmdptr(%d, %x) done\n", id, cmdptr); 123 PRINT_FLOW("dmov_exec_cmdptr(%d, %x) done\n", id, cmdptr);
@@ -159,25 +165,40 @@ static irqreturn_t msm_datamover_irq_handler(int irq, void *dev_id)
159 "for %p, result %x\n", id, cmd, ch_result); 165 "for %p, result %x\n", id, cmd, ch_result);
160 if (cmd) { 166 if (cmd) {
161 list_del(&cmd->list); 167 list_del(&cmd->list);
162 cmd->complete_func(cmd, ch_result); 168 cmd->complete_func(cmd, ch_result, NULL);
163 } 169 }
164 } 170 }
165 if (ch_result & DMOV_RSLT_FLUSH) { 171 if (ch_result & DMOV_RSLT_FLUSH) {
166 unsigned int flush0 = readl(DMOV_FLUSH0(id)); 172 struct msm_dmov_errdata errdata;
173
174 errdata.flush[0] = readl(DMOV_FLUSH0(id));
175 errdata.flush[1] = readl(DMOV_FLUSH1(id));
176 errdata.flush[2] = readl(DMOV_FLUSH2(id));
177 errdata.flush[3] = readl(DMOV_FLUSH3(id));
178 errdata.flush[4] = readl(DMOV_FLUSH4(id));
179 errdata.flush[5] = readl(DMOV_FLUSH5(id));
167 PRINT_FLOW("msm_datamover_irq_handler id %d, status %x\n", id, ch_status); 180 PRINT_FLOW("msm_datamover_irq_handler id %d, status %x\n", id, ch_status);
168 PRINT_FLOW("msm_datamover_irq_handler id %d, flush, result %x, flush0 %x\n", id, ch_result, flush0); 181 PRINT_FLOW("msm_datamover_irq_handler id %d, flush, result %x, flush0 %x\n", id, ch_result, errdata.flush[0]);
169 if (cmd) { 182 if (cmd) {
170 list_del(&cmd->list); 183 list_del(&cmd->list);
171 cmd->complete_func(cmd, ch_result); 184 cmd->complete_func(cmd, ch_result, &errdata);
172 } 185 }
173 } 186 }
174 if (ch_result & DMOV_RSLT_ERROR) { 187 if (ch_result & DMOV_RSLT_ERROR) {
175 unsigned int flush0 = readl(DMOV_FLUSH0(id)); 188 struct msm_dmov_errdata errdata;
189
190 errdata.flush[0] = readl(DMOV_FLUSH0(id));
191 errdata.flush[1] = readl(DMOV_FLUSH1(id));
192 errdata.flush[2] = readl(DMOV_FLUSH2(id));
193 errdata.flush[3] = readl(DMOV_FLUSH3(id));
194 errdata.flush[4] = readl(DMOV_FLUSH4(id));
195 errdata.flush[5] = readl(DMOV_FLUSH5(id));
196
176 PRINT_ERROR("msm_datamover_irq_handler id %d, status %x\n", id, ch_status); 197 PRINT_ERROR("msm_datamover_irq_handler id %d, status %x\n", id, ch_status);
177 PRINT_ERROR("msm_datamover_irq_handler id %d, error, result %x, flush0 %x\n", id, ch_result, flush0); 198 PRINT_ERROR("msm_datamover_irq_handler id %d, error, result %x, flush0 %x\n", id, ch_result, errdata.flush[0]);
178 if (cmd) { 199 if (cmd) {
179 list_del(&cmd->list); 200 list_del(&cmd->list);
180 cmd->complete_func(cmd, ch_result); 201 cmd->complete_func(cmd, ch_result, &errdata);
181 } 202 }
182 /* this does not seem to work, once we get an error */ 203 /* this does not seem to work, once we get an error */
183 /* the datamover will no longer accept commands */ 204 /* the datamover will no longer accept commands */
@@ -193,8 +214,14 @@ static irqreturn_t msm_datamover_irq_handler(int irq, void *dev_id)
193 writel(cmd->cmdptr, DMOV_CMD_PTR(id)); 214 writel(cmd->cmdptr, DMOV_CMD_PTR(id));
194 } 215 }
195 } while (ch_status & DMOV_STATUS_RSLT_VALID); 216 } while (ch_status & DMOV_STATUS_RSLT_VALID);
217 if (list_empty(&active_commands[id]) && list_empty(&ready_commands[id]))
218 channel_active &= ~(1U << id);
196 PRINT_FLOW("msm_datamover_irq_handler id %d, status %x\n", id, ch_status); 219 PRINT_FLOW("msm_datamover_irq_handler id %d, status %x\n", id, ch_status);
197 } 220 }
221
222 if (!channel_active)
223 disable_irq(INT_ADM_AARM);
224
198 spin_unlock_irqrestore(&msm_dmov_lock, irq_flags); 225 spin_unlock_irqrestore(&msm_dmov_lock, irq_flags);
199 return IRQ_HANDLED; 226 return IRQ_HANDLED;
200} 227}
@@ -202,12 +229,17 @@ static irqreturn_t msm_datamover_irq_handler(int irq, void *dev_id)
202static int __init msm_init_datamover(void) 229static int __init msm_init_datamover(void)
203{ 230{
204 int i; 231 int i;
232 int ret;
205 for (i = 0; i < MSM_DMOV_CHANNEL_COUNT; i++) { 233 for (i = 0; i < MSM_DMOV_CHANNEL_COUNT; i++) {
206 INIT_LIST_HEAD(&ready_commands[i]); 234 INIT_LIST_HEAD(&ready_commands[i]);
207 INIT_LIST_HEAD(&active_commands[i]); 235 INIT_LIST_HEAD(&active_commands[i]);
208 writel(DMOV_CONFIG_IRQ_EN | DMOV_CONFIG_FORCE_TOP_PTR_RSLT | DMOV_CONFIG_FORCE_FLUSH_RSLT, DMOV_CONFIG(i)); 236 writel(DMOV_CONFIG_IRQ_EN | DMOV_CONFIG_FORCE_TOP_PTR_RSLT | DMOV_CONFIG_FORCE_FLUSH_RSLT, DMOV_CONFIG(i));
209 } 237 }
210 return request_irq(INT_ADM_AARM, msm_datamover_irq_handler, 0, "msmdatamover", NULL); 238 ret = request_irq(INT_ADM_AARM, msm_datamover_irq_handler, 0, "msmdatamover", NULL);
239 if (ret)
240 return ret;
241 disable_irq(INT_ADM_AARM);
242 return 0;
211} 243}
212 244
213arch_initcall(msm_init_datamover); 245arch_initcall(msm_init_datamover);
diff --git a/arch/arm/mach-msm/include/mach/board.h b/arch/arm/mach-msm/include/mach/board.h
index a7639493c095..264d62e519f3 100644
--- a/arch/arm/mach-msm/include/mach/board.h
+++ b/arch/arm/mach-msm/include/mach/board.h
@@ -33,5 +33,6 @@ void __init msm_add_devices(void);
33void __init msm_map_common_io(void); 33void __init msm_map_common_io(void);
34void __init msm_init_irq(void); 34void __init msm_init_irq(void);
35void __init msm_init_gpio(void); 35void __init msm_init_gpio(void);
36void __init msm_clock_init(void);
36 37
37#endif 38#endif
diff --git a/arch/arm/mach-msm/include/mach/debug-macro.S b/arch/arm/mach-msm/include/mach/debug-macro.S
index 528eef4b605c..1db3c97dbc49 100644
--- a/arch/arm/mach-msm/include/mach/debug-macro.S
+++ b/arch/arm/mach-msm/include/mach/debug-macro.S
@@ -22,18 +22,22 @@
22 mrc p15, 0, \rx, c1, c0 22 mrc p15, 0, \rx, c1, c0
23 tst \rx, #1 23 tst \rx, #1
24 ldreq \rx, =MSM_UART1_PHYS 24 ldreq \rx, =MSM_UART1_PHYS
25 ldrne \rx, =MSM_UART1_BASE 25 movne \rx, #0
26 .endm 26 .endm
27 27
28 .macro senduart,rd,rx 28 .macro senduart,rd,rx
29 str \rd, [\rx, #0x0C] 29 teq \rx, #0
30 strne \rd, [\rx, #0x0C]
30 .endm 31 .endm
31 32
32 .macro waituart,rd,rx 33 .macro waituart,rd,rx
33 @ wait for TX_READY 34 @ wait for TX_READY
35 teq \rx, #0
36 bne 2f
341: ldr \rd, [\rx, #0x08] 371: ldr \rd, [\rx, #0x08]
35 tst \rd, #0x04 38 tst \rd, #0x04
36 beq 1b 39 beq 1b
402:
37 .endm 41 .endm
38 42
39 .macro busyuart,rd,rx 43 .macro busyuart,rd,rx
diff --git a/arch/arm/mach-msm/include/mach/dma.h b/arch/arm/mach-msm/include/mach/dma.h
index ad1c87f86d10..5ab5bdffab07 100644
--- a/arch/arm/mach-msm/include/mach/dma.h
+++ b/arch/arm/mach-msm/include/mach/dma.h
@@ -1,4 +1,4 @@
1/* arch/arm/mach-msm/include/mach/dma.h 1/* linux/include/asm-arm/arch-msm/dma.h
2 * 2 *
3 * Copyright (C) 2007 Google, Inc. 3 * Copyright (C) 2007 Google, Inc.
4 * 4 *
@@ -18,17 +18,21 @@
18#include <linux/list.h> 18#include <linux/list.h>
19#include <mach/msm_iomap.h> 19#include <mach/msm_iomap.h>
20 20
21struct msm_dmov_errdata {
22 uint32_t flush[6];
23};
24
21struct msm_dmov_cmd { 25struct msm_dmov_cmd {
22 struct list_head list; 26 struct list_head list;
23 unsigned int cmdptr; 27 unsigned int cmdptr;
24 void (*complete_func)(struct msm_dmov_cmd *cmd, unsigned int result); 28 void (*complete_func)(struct msm_dmov_cmd *cmd,
25/* void (*user_result_func)(struct msm_dmov_cmd *cmd); */ 29 unsigned int result,
30 struct msm_dmov_errdata *err);
26}; 31};
27 32
28void msm_dmov_enqueue_cmd(unsigned id, struct msm_dmov_cmd *cmd); 33void msm_dmov_enqueue_cmd(unsigned id, struct msm_dmov_cmd *cmd);
29void msm_dmov_stop_cmd(unsigned id, struct msm_dmov_cmd *cmd); 34void msm_dmov_stop_cmd(unsigned id, struct msm_dmov_cmd *cmd, int graceful);
30int msm_dmov_exec_cmd(unsigned id, unsigned int cmdptr); 35int msm_dmov_exec_cmd(unsigned id, unsigned int cmdptr);
31/* int msm_dmov_exec_cmd_etc(unsigned id, unsigned int cmdptr, int timeout, int interruptible); */
32 36
33 37
34 38
@@ -122,6 +126,16 @@ typedef struct {
122 unsigned _reserved; 126 unsigned _reserved;
123} dmov_sg; 127} dmov_sg;
124 128
129/* Box mode */
130typedef struct {
131 uint32_t cmd;
132 uint32_t src_row_addr;
133 uint32_t dst_row_addr;
134 uint32_t src_dst_len;
135 uint32_t num_rows;
136 uint32_t row_offset;
137} dmov_box;
138
125/* bits for the cmd field of the above structures */ 139/* bits for the cmd field of the above structures */
126 140
127#define CMD_LC (1 << 31) /* last command */ 141#define CMD_LC (1 << 31) /* last command */
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap.h b/arch/arm/mach-msm/include/mach/msm_iomap.h
index e221f58ceea3..2f7b4c8620d9 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap.h
@@ -37,11 +37,17 @@
37 * 37 *
38 */ 38 */
39 39
40#define MSM_VIC_BASE 0xE0000000 40#ifdef __ASSEMBLY__
41#define IOMEM(x) x
42#else
43#define IOMEM(x) ((void __force __iomem *)(x))
44#endif
45
46#define MSM_VIC_BASE IOMEM(0xE0000000)
41#define MSM_VIC_PHYS 0xC0000000 47#define MSM_VIC_PHYS 0xC0000000
42#define MSM_VIC_SIZE SZ_4K 48#define MSM_VIC_SIZE SZ_4K
43 49
44#define MSM_CSR_BASE 0xE0001000 50#define MSM_CSR_BASE IOMEM(0xE0001000)
45#define MSM_CSR_PHYS 0xC0100000 51#define MSM_CSR_PHYS 0xC0100000
46#define MSM_CSR_SIZE SZ_4K 52#define MSM_CSR_SIZE SZ_4K
47 53
@@ -49,56 +55,67 @@
49#define MSM_GPT_BASE MSM_CSR_BASE 55#define MSM_GPT_BASE MSM_CSR_BASE
50#define MSM_GPT_SIZE SZ_4K 56#define MSM_GPT_SIZE SZ_4K
51 57
52#define MSM_DMOV_BASE 0xE0002000 58#define MSM_DMOV_BASE IOMEM(0xE0002000)
53#define MSM_DMOV_PHYS 0xA9700000 59#define MSM_DMOV_PHYS 0xA9700000
54#define MSM_DMOV_SIZE SZ_4K 60#define MSM_DMOV_SIZE SZ_4K
55 61
56#define MSM_UART1_BASE 0xE0003000 62#define MSM_GPIO1_BASE IOMEM(0xE0003000)
63#define MSM_GPIO1_PHYS 0xA9200000
64#define MSM_GPIO1_SIZE SZ_4K
65
66#define MSM_GPIO2_BASE IOMEM(0xE0004000)
67#define MSM_GPIO2_PHYS 0xA9300000
68#define MSM_GPIO2_SIZE SZ_4K
69
70#define MSM_CLK_CTL_BASE IOMEM(0xE0005000)
71#define MSM_CLK_CTL_PHYS 0xA8600000
72#define MSM_CLK_CTL_SIZE SZ_4K
73
74#define MSM_SHARED_RAM_BASE IOMEM(0xE0100000)
75#define MSM_SHARED_RAM_PHYS 0x01F00000
76#define MSM_SHARED_RAM_SIZE SZ_1M
77
57#define MSM_UART1_PHYS 0xA9A00000 78#define MSM_UART1_PHYS 0xA9A00000
58#define MSM_UART1_SIZE SZ_4K 79#define MSM_UART1_SIZE SZ_4K
59 80
60#define MSM_UART2_BASE 0xE0004000
61#define MSM_UART2_PHYS 0xA9B00000 81#define MSM_UART2_PHYS 0xA9B00000
62#define MSM_UART2_SIZE SZ_4K 82#define MSM_UART2_SIZE SZ_4K
63 83
64#define MSM_UART3_BASE 0xE0005000
65#define MSM_UART3_PHYS 0xA9C00000 84#define MSM_UART3_PHYS 0xA9C00000
66#define MSM_UART3_SIZE SZ_4K 85#define MSM_UART3_SIZE SZ_4K
67 86
68#define MSM_I2C_BASE 0xE0006000 87#define MSM_SDC1_PHYS 0xA0400000
69#define MSM_I2C_PHYS 0xA9900000 88#define MSM_SDC1_SIZE SZ_4K
70#define MSM_I2C_SIZE SZ_4K
71 89
72#define MSM_GPIO1_BASE 0xE0007000 90#define MSM_SDC2_PHYS 0xA0500000
73#define MSM_GPIO1_PHYS 0xA9200000 91#define MSM_SDC2_SIZE SZ_4K
74#define MSM_GPIO1_SIZE SZ_4K
75 92
76#define MSM_GPIO2_BASE 0xE0008000 93#define MSM_SDC3_PHYS 0xA0600000
77#define MSM_GPIO2_PHYS 0xA9300000 94#define MSM_SDC3_SIZE SZ_4K
78#define MSM_GPIO2_SIZE SZ_4K 95
96#define MSM_SDC4_PHYS 0xA0700000
97#define MSM_SDC4_SIZE SZ_4K
98
99#define MSM_I2C_PHYS 0xA9900000
100#define MSM_I2C_SIZE SZ_4K
79 101
80#define MSM_HSUSB_BASE 0xE0009000
81#define MSM_HSUSB_PHYS 0xA0800000 102#define MSM_HSUSB_PHYS 0xA0800000
82#define MSM_HSUSB_SIZE SZ_4K 103#define MSM_HSUSB_SIZE SZ_4K
83 104
84#define MSM_CLK_CTL_BASE 0xE000A000
85#define MSM_CLK_CTL_PHYS 0xA8600000
86#define MSM_CLK_CTL_SIZE SZ_4K
87
88#define MSM_PMDH_BASE 0xE000B000
89#define MSM_PMDH_PHYS 0xAA600000 105#define MSM_PMDH_PHYS 0xAA600000
90#define MSM_PMDH_SIZE SZ_4K 106#define MSM_PMDH_SIZE SZ_4K
91 107
92#define MSM_EMDH_BASE 0xE000C000
93#define MSM_EMDH_PHYS 0xAA700000 108#define MSM_EMDH_PHYS 0xAA700000
94#define MSM_EMDH_SIZE SZ_4K 109#define MSM_EMDH_SIZE SZ_4K
95 110
96#define MSM_MDP_BASE 0xE0010000
97#define MSM_MDP_PHYS 0xAA200000 111#define MSM_MDP_PHYS 0xAA200000
98#define MSM_MDP_SIZE 0x000F0000 112#define MSM_MDP_SIZE 0x000F0000
99 113
100#define MSM_SHARED_RAM_BASE 0xE0100000 114#define MSM_MDC_PHYS 0xAA500000
101#define MSM_SHARED_RAM_PHYS 0x01F00000 115#define MSM_MDC_SIZE SZ_1M
102#define MSM_SHARED_RAM_SIZE SZ_1M 116
117#define MSM_AD5_PHYS 0xAC000000
118#define MSM_AD5_SIZE (SZ_1M*13)
119
103 120
104#endif 121#endif
diff --git a/arch/arm/mach-msm/include/mach/vreg.h b/arch/arm/mach-msm/include/mach/vreg.h
new file mode 100644
index 000000000000..9f9e25cb718e
--- /dev/null
+++ b/arch/arm/mach-msm/include/mach/vreg.h
@@ -0,0 +1,29 @@
1/* linux/include/asm-arm/arch-msm/vreg.h
2 *
3 * Copyright (C) 2008 Google, Inc.
4 * Author: Brian Swetland <swetland@google.com>
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16
17#ifndef __ARCH_ARM_MACH_MSM_VREG_H
18#define __ARCH_ARM_MACH_MSM_VREG_H
19
20struct vreg;
21
22struct vreg *vreg_get(struct device *dev, const char *id);
23void vreg_put(struct vreg *vreg);
24
25int vreg_enable(struct vreg *vreg);
26void vreg_disable(struct vreg *vreg);
27int vreg_set_level(struct vreg *vreg, unsigned mv);
28
29#endif
diff --git a/arch/arm/mach-msm/io.c b/arch/arm/mach-msm/io.c
index 7999e4ba8e20..6e7692ff6f2c 100644
--- a/arch/arm/mach-msm/io.c
+++ b/arch/arm/mach-msm/io.c
@@ -28,7 +28,7 @@
28#include <mach/board.h> 28#include <mach/board.h>
29 29
30#define MSM_DEVICE(name) { \ 30#define MSM_DEVICE(name) { \
31 .virtual = MSM_##name##_BASE, \ 31 .virtual = (unsigned long) MSM_##name##_BASE, \
32 .pfn = __phys_to_pfn(MSM_##name##_PHYS), \ 32 .pfn = __phys_to_pfn(MSM_##name##_PHYS), \
33 .length = MSM_##name##_SIZE, \ 33 .length = MSM_##name##_SIZE, \
34 .type = MT_DEVICE_NONSHARED, \ 34 .type = MT_DEVICE_NONSHARED, \
@@ -39,19 +39,11 @@ static struct map_desc msm_io_desc[] __initdata = {
39 MSM_DEVICE(CSR), 39 MSM_DEVICE(CSR),
40 MSM_DEVICE(GPT), 40 MSM_DEVICE(GPT),
41 MSM_DEVICE(DMOV), 41 MSM_DEVICE(DMOV),
42 MSM_DEVICE(UART1),
43 MSM_DEVICE(UART2),
44 MSM_DEVICE(UART3),
45 MSM_DEVICE(I2C),
46 MSM_DEVICE(GPIO1), 42 MSM_DEVICE(GPIO1),
47 MSM_DEVICE(GPIO2), 43 MSM_DEVICE(GPIO2),
48 MSM_DEVICE(HSUSB),
49 MSM_DEVICE(CLK_CTL), 44 MSM_DEVICE(CLK_CTL),
50 MSM_DEVICE(PMDH),
51 MSM_DEVICE(EMDH),
52 MSM_DEVICE(MDP),
53 { 45 {
54 .virtual = MSM_SHARED_RAM_BASE, 46 .virtual = (unsigned long) MSM_SHARED_RAM_BASE,
55 .pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS), 47 .pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS),
56 .length = MSM_SHARED_RAM_SIZE, 48 .length = MSM_SHARED_RAM_SIZE,
57 .type = MT_DEVICE, 49 .type = MT_DEVICE,
diff --git a/arch/arm/mach-msm/irq.c b/arch/arm/mach-msm/irq.c
index 04b8d182ff8a..69ca0dd79bdf 100644
--- a/arch/arm/mach-msm/irq.c
+++ b/arch/arm/mach-msm/irq.c
@@ -66,20 +66,20 @@
66 66
67static void msm_irq_ack(unsigned int irq) 67static void msm_irq_ack(unsigned int irq)
68{ 68{
69 unsigned reg = VIC_INT_CLEAR0 + ((irq & 32) ? 4 : 0); 69 void __iomem *reg = VIC_INT_CLEAR0 + ((irq & 32) ? 4 : 0);
70 irq = 1 << (irq & 31); 70 irq = 1 << (irq & 31);
71 writel(irq, reg); 71 writel(irq, reg);
72} 72}
73 73
74static void msm_irq_mask(unsigned int irq) 74static void msm_irq_mask(unsigned int irq)
75{ 75{
76 unsigned reg = VIC_INT_ENCLEAR0 + ((irq & 32) ? 4 : 0); 76 void __iomem *reg = VIC_INT_ENCLEAR0 + ((irq & 32) ? 4 : 0);
77 writel(1 << (irq & 31), reg); 77 writel(1 << (irq & 31), reg);
78} 78}
79 79
80static void msm_irq_unmask(unsigned int irq) 80static void msm_irq_unmask(unsigned int irq)
81{ 81{
82 unsigned reg = VIC_INT_ENSET0 + ((irq & 32) ? 4 : 0); 82 void __iomem *reg = VIC_INT_ENSET0 + ((irq & 32) ? 4 : 0);
83 writel(1 << (irq & 31), reg); 83 writel(1 << (irq & 31), reg);
84} 84}
85 85
@@ -90,8 +90,8 @@ static int msm_irq_set_wake(unsigned int irq, unsigned int on)
90 90
91static int msm_irq_set_type(unsigned int irq, unsigned int flow_type) 91static int msm_irq_set_type(unsigned int irq, unsigned int flow_type)
92{ 92{
93 unsigned treg = VIC_INT_TYPE0 + ((irq & 32) ? 4 : 0); 93 void __iomem *treg = VIC_INT_TYPE0 + ((irq & 32) ? 4 : 0);
94 unsigned preg = VIC_INT_POLARITY0 + ((irq & 32) ? 4 : 0); 94 void __iomem *preg = VIC_INT_POLARITY0 + ((irq & 32) ? 4 : 0);
95 int b = 1 << (irq & 31); 95 int b = 1 << (irq & 31);
96 96
97 if (flow_type & (IRQF_TRIGGER_FALLING | IRQF_TRIGGER_LOW)) 97 if (flow_type & (IRQF_TRIGGER_FALLING | IRQF_TRIGGER_LOW))
diff --git a/arch/arm/mach-msm/proc_comm.c b/arch/arm/mach-msm/proc_comm.c
new file mode 100644
index 000000000000..915ee704ed3c
--- /dev/null
+++ b/arch/arm/mach-msm/proc_comm.c
@@ -0,0 +1,110 @@
1/* arch/arm/mach-msm/proc_comm.c
2 *
3 * Copyright (C) 2007-2008 Google, Inc.
4 * Author: Brian Swetland <swetland@google.com>
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16
17#include <linux/delay.h>
18#include <linux/errno.h>
19#include <linux/io.h>
20#include <linux/spinlock.h>
21#include <mach/msm_iomap.h>
22#include <mach/system.h>
23
24#include "proc_comm.h"
25
26#define MSM_A2M_INT(n) (MSM_CSR_BASE + 0x400 + (n) * 4)
27
28static inline void notify_other_proc_comm(void)
29{
30 writel(1, MSM_A2M_INT(6));
31}
32
33#define APP_COMMAND 0x00
34#define APP_STATUS 0x04
35#define APP_DATA1 0x08
36#define APP_DATA2 0x0C
37
38#define MDM_COMMAND 0x10
39#define MDM_STATUS 0x14
40#define MDM_DATA1 0x18
41#define MDM_DATA2 0x1C
42
43static DEFINE_SPINLOCK(proc_comm_lock);
44
45/* The higher level SMD support will install this to
46 * provide a way to check for and handle modem restart.
47 */
48int (*msm_check_for_modem_crash)(void);
49
50/* Poll for a state change, checking for possible
51 * modem crashes along the way (so we don't wait
52 * forever while the ARM9 is blowing up).
53 *
54 * Return an error in the event of a modem crash and
55 * restart so the msm_proc_comm() routine can restart
56 * the operation from the beginning.
57 */
58static int proc_comm_wait_for(void __iomem *addr, unsigned value)
59{
60 for (;;) {
61 if (readl(addr) == value)
62 return 0;
63
64 if (msm_check_for_modem_crash)
65 if (msm_check_for_modem_crash())
66 return -EAGAIN;
67 }
68}
69
70int msm_proc_comm(unsigned cmd, unsigned *data1, unsigned *data2)
71{
72 void __iomem *base = MSM_SHARED_RAM_BASE;
73 unsigned long flags;
74 int ret;
75
76 spin_lock_irqsave(&proc_comm_lock, flags);
77
78 for (;;) {
79 if (proc_comm_wait_for(base + MDM_STATUS, PCOM_READY))
80 continue;
81
82 writel(cmd, base + APP_COMMAND);
83 writel(data1 ? *data1 : 0, base + APP_DATA1);
84 writel(data2 ? *data2 : 0, base + APP_DATA2);
85
86 notify_other_proc_comm();
87
88 if (proc_comm_wait_for(base + APP_COMMAND, PCOM_CMD_DONE))
89 continue;
90
91 if (readl(base + APP_STATUS) != PCOM_CMD_FAIL) {
92 if (data1)
93 *data1 = readl(base + APP_DATA1);
94 if (data2)
95 *data2 = readl(base + APP_DATA2);
96 ret = 0;
97 } else {
98 ret = -EIO;
99 }
100 break;
101 }
102
103 writel(PCOM_CMD_IDLE, base + APP_COMMAND);
104
105 spin_unlock_irqrestore(&proc_comm_lock, flags);
106
107 return ret;
108}
109
110
diff --git a/arch/arm/mach-msm/proc_comm.h b/arch/arm/mach-msm/proc_comm.h
new file mode 100644
index 000000000000..834760f25692
--- /dev/null
+++ b/arch/arm/mach-msm/proc_comm.h
@@ -0,0 +1,165 @@
1/* arch/arm/mach-msm/proc_comm.h
2 *
3 * Copyright (c) 2007 QUALCOMM Incorporated
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 */
15
16#ifndef _ARCH_ARM_MACH_MSM_PROC_COMM_H_
17#define _ARCH_ARM_MACH_MSM_PROC_COMM_H_
18
19enum {
20 PCOM_CMD_IDLE = 0x0,
21 PCOM_CMD_DONE,
22 PCOM_RESET_APPS,
23 PCOM_RESET_CHIP,
24 PCOM_CONFIG_NAND_MPU,
25 PCOM_CONFIG_USB_CLKS,
26 PCOM_GET_POWER_ON_STATUS,
27 PCOM_GET_WAKE_UP_STATUS,
28 PCOM_GET_BATT_LEVEL,
29 PCOM_CHG_IS_CHARGING,
30 PCOM_POWER_DOWN,
31 PCOM_USB_PIN_CONFIG,
32 PCOM_USB_PIN_SEL,
33 PCOM_SET_RTC_ALARM,
34 PCOM_NV_READ,
35 PCOM_NV_WRITE,
36 PCOM_GET_UUID_HIGH,
37 PCOM_GET_UUID_LOW,
38 PCOM_GET_HW_ENTROPY,
39 PCOM_RPC_GPIO_TLMM_CONFIG_REMOTE,
40 PCOM_CLKCTL_RPC_ENABLE,
41 PCOM_CLKCTL_RPC_DISABLE,
42 PCOM_CLKCTL_RPC_RESET,
43 PCOM_CLKCTL_RPC_SET_FLAGS,
44 PCOM_CLKCTL_RPC_SET_RATE,
45 PCOM_CLKCTL_RPC_MIN_RATE,
46 PCOM_CLKCTL_RPC_MAX_RATE,
47 PCOM_CLKCTL_RPC_RATE,
48 PCOM_CLKCTL_RPC_PLL_REQUEST,
49 PCOM_CLKCTL_RPC_ENABLED,
50 PCOM_VREG_SWITCH,
51 PCOM_VREG_SET_LEVEL,
52 PCOM_GPIO_TLMM_CONFIG_GROUP,
53 PCOM_GPIO_TLMM_UNCONFIG_GROUP,
54 PCOM_NV_WRITE_BYTES_4_7,
55 PCOM_CONFIG_DISP,
56 PCOM_GET_FTM_BOOT_COUNT,
57 PCOM_RPC_GPIO_TLMM_CONFIG_EX,
58 PCOM_PM_MPP_CONFIG,
59 PCOM_GPIO_IN,
60 PCOM_GPIO_OUT,
61 PCOM_RESET_MODEM,
62 PCOM_RESET_CHIP_IMM,
63 PCOM_PM_VID_EN,
64 PCOM_VREG_PULLDOWN,
65 PCOM_NUM_CMDS,
66};
67
68enum {
69 PCOM_INVALID_STATUS = 0x0,
70 PCOM_READY,
71 PCOM_CMD_RUNNING,
72 PCOM_CMD_SUCCESS,
73 PCOM_CMD_FAIL,
74};
75
76/* List of VREGs that support the Pull Down Resistor setting. */
77enum {
78 PM_VREG_PDOWN_MSMA_ID,
79 PM_VREG_PDOWN_MSMP_ID,
80 PM_VREG_PDOWN_MSME1_ID, /* Not supported in Panoramix */
81 PM_VREG_PDOWN_MSMC1_ID, /* Not supported in PM6620 */
82 PM_VREG_PDOWN_MSMC2_ID, /* Supported in PM7500 only */
83 PM_VREG_PDOWN_GP3_ID, /* Supported in PM7500 only */
84 PM_VREG_PDOWN_MSME2_ID, /* Supported in PM7500 and Panoramix only */
85 PM_VREG_PDOWN_GP4_ID, /* Supported in PM7500 only */
86 PM_VREG_PDOWN_GP1_ID, /* Supported in PM7500 only */
87 PM_VREG_PDOWN_TCXO_ID,
88 PM_VREG_PDOWN_PA_ID,
89 PM_VREG_PDOWN_RFTX_ID,
90 PM_VREG_PDOWN_RFRX1_ID,
91 PM_VREG_PDOWN_RFRX2_ID,
92 PM_VREG_PDOWN_SYNT_ID,
93 PM_VREG_PDOWN_WLAN_ID,
94 PM_VREG_PDOWN_USB_ID,
95 PM_VREG_PDOWN_MMC_ID,
96 PM_VREG_PDOWN_RUIM_ID,
97 PM_VREG_PDOWN_MSMC0_ID, /* Supported in PM6610 only */
98 PM_VREG_PDOWN_GP2_ID, /* Supported in PM7500 only */
99 PM_VREG_PDOWN_GP5_ID, /* Supported in PM7500 only */
100 PM_VREG_PDOWN_GP6_ID, /* Supported in PM7500 only */
101 PM_VREG_PDOWN_RF_ID,
102 PM_VREG_PDOWN_RF_VCO_ID,
103 PM_VREG_PDOWN_MPLL_ID,
104 PM_VREG_PDOWN_S2_ID,
105 PM_VREG_PDOWN_S3_ID,
106 PM_VREG_PDOWN_RFUBM_ID,
107
108 /* new for HAN */
109 PM_VREG_PDOWN_RF1_ID,
110 PM_VREG_PDOWN_RF2_ID,
111 PM_VREG_PDOWN_RFA_ID,
112 PM_VREG_PDOWN_CDC2_ID,
113 PM_VREG_PDOWN_RFTX2_ID,
114 PM_VREG_PDOWN_USIM_ID,
115 PM_VREG_PDOWN_USB2P6_ID,
116 PM_VREG_PDOWN_USB3P3_ID,
117 PM_VREG_PDOWN_INVALID_ID,
118
119 /* backward compatible enums only */
120 PM_VREG_PDOWN_CAM_ID = PM_VREG_PDOWN_GP1_ID,
121 PM_VREG_PDOWN_MDDI_ID = PM_VREG_PDOWN_GP2_ID,
122 PM_VREG_PDOWN_RUIM2_ID = PM_VREG_PDOWN_GP3_ID,
123 PM_VREG_PDOWN_AUX_ID = PM_VREG_PDOWN_GP4_ID,
124 PM_VREG_PDOWN_AUX2_ID = PM_VREG_PDOWN_GP5_ID,
125 PM_VREG_PDOWN_BT_ID = PM_VREG_PDOWN_GP6_ID,
126
127 PM_VREG_PDOWN_MSME_ID = PM_VREG_PDOWN_MSME1_ID,
128 PM_VREG_PDOWN_MSMC_ID = PM_VREG_PDOWN_MSMC1_ID,
129 PM_VREG_PDOWN_RFA1_ID = PM_VREG_PDOWN_RFRX2_ID,
130 PM_VREG_PDOWN_RFA2_ID = PM_VREG_PDOWN_RFTX2_ID,
131 PM_VREG_PDOWN_XO_ID = PM_VREG_PDOWN_TCXO_ID
132};
133
134/* gpio info for PCOM_RPC_GPIO_TLMM_CONFIG_EX */
135
136#define GPIO_ENABLE 0
137#define GPIO_DISABLE 1
138
139#define GPIO_INPUT 0
140#define GPIO_OUTPUT 1
141
142#define GPIO_NO_PULL 0
143#define GPIO_PULL_DOWN 1
144#define GPIO_KEEPER 2
145#define GPIO_PULL_UP 3
146
147#define GPIO_2MA 0
148#define GPIO_4MA 1
149#define GPIO_6MA 2
150#define GPIO_8MA 3
151#define GPIO_10MA 4
152#define GPIO_12MA 5
153#define GPIO_14MA 6
154#define GPIO_16MA 7
155
156#define PCOM_GPIO_CFG(gpio, func, dir, pull, drvstr) \
157 ((((gpio) & 0x3FF) << 4) | \
158 ((func) & 0xf) | \
159 (((dir) & 0x1) << 14) | \
160 (((pull) & 0x3) << 15) | \
161 (((drvstr) & 0xF) << 17))
162
163int msm_proc_comm(unsigned cmd, unsigned *data1, unsigned *data2);
164
165#endif
diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c
index 2bffe9b7e9fe..345a14cb73c3 100644
--- a/arch/arm/mach-msm/timer.c
+++ b/arch/arm/mach-msm/timer.c
@@ -45,7 +45,7 @@ struct msm_clock {
45 struct clock_event_device clockevent; 45 struct clock_event_device clockevent;
46 struct clocksource clocksource; 46 struct clocksource clocksource;
47 struct irqaction irq; 47 struct irqaction irq;
48 uint32_t regbase; 48 void __iomem *regbase;
49 uint32_t freq; 49 uint32_t freq;
50 uint32_t shift; 50 uint32_t shift;
51}; 51};
diff --git a/arch/arm/mach-msm/vreg.c b/arch/arm/mach-msm/vreg.c
new file mode 100644
index 000000000000..fcb0b9f25684
--- /dev/null
+++ b/arch/arm/mach-msm/vreg.c
@@ -0,0 +1,143 @@
1/* arch/arm/mach-msm/vreg.c
2 *
3 * Copyright (C) 2008 Google, Inc.
4 * Author: Brian Swetland <swetland@google.com>
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16
17#include <linux/kernel.h>
18#include <linux/device.h>
19#include <linux/init.h>
20#include <linux/debugfs.h>
21#include <mach/vreg.h>
22
23#include "proc_comm.h"
24
25struct vreg {
26 const char *name;
27 unsigned id;
28};
29
30#define VREG(_name, _id) { .name = _name, .id = _id, }
31
32static struct vreg vregs[] = {
33 VREG("msma", 0),
34 VREG("msmp", 1),
35 VREG("msme1", 2),
36 VREG("msmc1", 3),
37 VREG("msmc2", 4),
38 VREG("gp3", 5),
39 VREG("msme2", 6),
40 VREG("gp4", 7),
41 VREG("gp1", 8),
42 VREG("tcxo", 9),
43 VREG("pa", 10),
44 VREG("rftx", 11),
45 VREG("rfrx1", 12),
46 VREG("rfrx2", 13),
47 VREG("synt", 14),
48 VREG("wlan", 15),
49 VREG("usb", 16),
50 VREG("boost", 17),
51 VREG("mmc", 18),
52 VREG("ruim", 19),
53 VREG("msmc0", 20),
54 VREG("gp2", 21),
55 VREG("gp5", 22),
56 VREG("gp6", 23),
57 VREG("rf", 24),
58 VREG("rf_vco", 26),
59 VREG("mpll", 27),
60 VREG("s2", 28),
61 VREG("s3", 29),
62 VREG("rfubm", 30),
63 VREG("ncp", 31),
64};
65
66struct vreg *vreg_get(struct device *dev, const char *id)
67{
68 int n;
69 for (n = 0; n < ARRAY_SIZE(vregs); n++) {
70 if (!strcmp(vregs[n].name, id))
71 return vregs + n;
72 }
73 return 0;
74}
75
76void vreg_put(struct vreg *vreg)
77{
78}
79
80int vreg_enable(struct vreg *vreg)
81{
82 unsigned id = vreg->id;
83 unsigned enable = 1;
84 return msm_proc_comm(PCOM_VREG_SWITCH, &id, &enable);
85}
86
87void vreg_disable(struct vreg *vreg)
88{
89 unsigned id = vreg->id;
90 unsigned enable = 0;
91 msm_proc_comm(PCOM_VREG_SWITCH, &id, &enable);
92}
93
94int vreg_set_level(struct vreg *vreg, unsigned mv)
95{
96 unsigned id = vreg->id;
97 return msm_proc_comm(PCOM_VREG_SET_LEVEL, &id, &mv);
98}
99
100#if defined(CONFIG_DEBUG_FS)
101
102static int vreg_debug_set(void *data, u64 val)
103{
104 struct vreg *vreg = data;
105 switch (val) {
106 case 0:
107 vreg_disable(vreg);
108 break;
109 case 1:
110 vreg_enable(vreg);
111 break;
112 default:
113 vreg_set_level(vreg, val);
114 break;
115 }
116 return 0;
117}
118
119static int vreg_debug_get(void *data, u64 *val)
120{
121 return -ENOSYS;
122}
123
124DEFINE_SIMPLE_ATTRIBUTE(vreg_fops, vreg_debug_get, vreg_debug_set, "%llu\n");
125
126static int __init vreg_debug_init(void)
127{
128 struct dentry *dent;
129 int n;
130
131 dent = debugfs_create_dir("vreg", 0);
132 if (IS_ERR(dent))
133 return 0;
134
135 for (n = 0; n < ARRAY_SIZE(vregs); n++)
136 (void) debugfs_create_file(vregs[n].name, 0644,
137 dent, vregs + n, &vreg_fops);
138
139 return 0;
140}
141
142device_initcall(vreg_debug_init);
143#endif
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-13 10:07:05 -0500