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-rw-r--r--arch/arm/mach-mmp/pxa910.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/mach-mmp/pxa910.c b/arch/arm/mach-mmp/pxa910.c
index 5882ca6b49fb..d4049508a4df 100644
--- a/arch/arm/mach-mmp/pxa910.c
+++ b/arch/arm/mach-mmp/pxa910.c
@@ -110,6 +110,8 @@ static APBC_CLK(pwm2, PXA910_PWM2, 1, 13000000);
110static APBC_CLK(pwm3, PXA910_PWM3, 1, 13000000); 110static APBC_CLK(pwm3, PXA910_PWM3, 1, 13000000);
111static APBC_CLK(pwm4, PXA910_PWM4, 1, 13000000); 111static APBC_CLK(pwm4, PXA910_PWM4, 1, 13000000);
112 112
113static APMU_CLK(nand, NAND, 0x01db, 208000000);
114
113/* device and clock bindings */ 115/* device and clock bindings */
114static struct clk_lookup pxa910_clkregs[] = { 116static struct clk_lookup pxa910_clkregs[] = {
115 INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL), 117 INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL),
@@ -120,6 +122,7 @@ static struct clk_lookup pxa910_clkregs[] = {
120 INIT_CLKREG(&clk_pwm2, "pxa910-pwm.1", NULL), 122 INIT_CLKREG(&clk_pwm2, "pxa910-pwm.1", NULL),
121 INIT_CLKREG(&clk_pwm3, "pxa910-pwm.2", NULL), 123 INIT_CLKREG(&clk_pwm3, "pxa910-pwm.2", NULL),
122 INIT_CLKREG(&clk_pwm4, "pxa910-pwm.3", NULL), 124 INIT_CLKREG(&clk_pwm4, "pxa910-pwm.3", NULL),
125 INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
123}; 126};
124 127
125static int __init pxa910_init(void) 128static int __init pxa910_init(void)
@@ -174,3 +177,4 @@ PXA910_DEVICE(pwm1, "pxa910-pwm", 0, NONE, 0xd401a000, 0x10);
174PXA910_DEVICE(pwm2, "pxa910-pwm", 1, NONE, 0xd401a400, 0x10); 177PXA910_DEVICE(pwm2, "pxa910-pwm", 1, NONE, 0xd401a400, 0x10);
175PXA910_DEVICE(pwm3, "pxa910-pwm", 2, NONE, 0xd401a800, 0x10); 178PXA910_DEVICE(pwm3, "pxa910-pwm", 2, NONE, 0xd401a800, 0x10);
176PXA910_DEVICE(pwm4, "pxa910-pwm", 3, NONE, 0xd401ac00, 0x10); 179PXA910_DEVICE(pwm4, "pxa910-pwm", 3, NONE, 0xd401ac00, 0x10);
180PXA910_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x80, 97, 99);