diff options
Diffstat (limited to 'arch/arm/mach-lpc32xx/include/mach/gpio.h')
-rw-r--r-- | arch/arm/mach-lpc32xx/include/mach/gpio.h | 74 |
1 files changed, 0 insertions, 74 deletions
diff --git a/arch/arm/mach-lpc32xx/include/mach/gpio.h b/arch/arm/mach-lpc32xx/include/mach/gpio.h index 67d03da1eee9..e69de29bb2d1 100644 --- a/arch/arm/mach-lpc32xx/include/mach/gpio.h +++ b/arch/arm/mach-lpc32xx/include/mach/gpio.h | |||
@@ -1,74 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-lpc32xx/include/mach/gpio.h | ||
3 | * | ||
4 | * Author: Kevin Wells <kevin.wells@nxp.com> | ||
5 | * | ||
6 | * Copyright (C) 2010 NXP Semiconductors | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License as published by | ||
10 | * the Free Software Foundation; either version 2 of the License, or | ||
11 | * (at your option) any later version. | ||
12 | * | ||
13 | * This program is distributed in the hope that it will be useful, | ||
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
16 | * GNU General Public License for more details. | ||
17 | */ | ||
18 | |||
19 | #ifndef __ASM_ARCH_GPIO_H | ||
20 | #define __ASM_ARCH_GPIO_H | ||
21 | |||
22 | #include <asm-generic/gpio.h> | ||
23 | |||
24 | /* | ||
25 | * Note! | ||
26 | * Muxed GP pins need to be setup to the GP state in the board level | ||
27 | * code prior to using this driver. | ||
28 | * GPI pins : 28xP3 group | ||
29 | * GPO pins : 24xP3 group | ||
30 | * GPIO pins: 8xP0 group, 24xP1 group, 13xP2 group, 6xP3 group | ||
31 | */ | ||
32 | |||
33 | #define LPC32XX_GPIO_P0_MAX 8 | ||
34 | #define LPC32XX_GPIO_P1_MAX 24 | ||
35 | #define LPC32XX_GPIO_P2_MAX 13 | ||
36 | #define LPC32XX_GPIO_P3_MAX 6 | ||
37 | #define LPC32XX_GPI_P3_MAX 28 | ||
38 | #define LPC32XX_GPO_P3_MAX 24 | ||
39 | |||
40 | #define LPC32XX_GPIO_P0_GRP 0 | ||
41 | #define LPC32XX_GPIO_P1_GRP (LPC32XX_GPIO_P0_GRP + LPC32XX_GPIO_P0_MAX) | ||
42 | #define LPC32XX_GPIO_P2_GRP (LPC32XX_GPIO_P1_GRP + LPC32XX_GPIO_P1_MAX) | ||
43 | #define LPC32XX_GPIO_P3_GRP (LPC32XX_GPIO_P2_GRP + LPC32XX_GPIO_P2_MAX) | ||
44 | #define LPC32XX_GPI_P3_GRP (LPC32XX_GPIO_P3_GRP + LPC32XX_GPIO_P3_MAX) | ||
45 | #define LPC32XX_GPO_P3_GRP (LPC32XX_GPI_P3_GRP + LPC32XX_GPI_P3_MAX) | ||
46 | |||
47 | /* | ||
48 | * A specific GPIO can be selected with this macro | ||
49 | * ie, GPIO_05 can be selected with LPC32XX_GPIO(LPC32XX_GPIO_P3_GRP, 5) | ||
50 | * See the LPC32x0 User's guide for GPIO group numbers | ||
51 | */ | ||
52 | #define LPC32XX_GPIO(x, y) ((x) + (y)) | ||
53 | |||
54 | static inline int gpio_get_value(unsigned gpio) | ||
55 | { | ||
56 | return __gpio_get_value(gpio); | ||
57 | } | ||
58 | |||
59 | static inline void gpio_set_value(unsigned gpio, int value) | ||
60 | { | ||
61 | __gpio_set_value(gpio, value); | ||
62 | } | ||
63 | |||
64 | static inline int gpio_cansleep(unsigned gpio) | ||
65 | { | ||
66 | return __gpio_cansleep(gpio); | ||
67 | } | ||
68 | |||
69 | static inline int gpio_to_irq(unsigned gpio) | ||
70 | { | ||
71 | return __gpio_to_irq(gpio); | ||
72 | } | ||
73 | |||
74 | #endif | ||