diff options
Diffstat (limited to 'arch/arm/mach-iop13xx/pci.c')
-rw-r--r-- | arch/arm/mach-iop13xx/pci.c | 53 |
1 files changed, 20 insertions, 33 deletions
diff --git a/arch/arm/mach-iop13xx/pci.c b/arch/arm/mach-iop13xx/pci.c index 861cb12ef436..9082b84aeebb 100644 --- a/arch/arm/mach-iop13xx/pci.c +++ b/arch/arm/mach-iop13xx/pci.c | |||
@@ -36,8 +36,8 @@ u32 iop13xx_atux_pmmr_offset; /* This offset can change based on strapping */ | |||
36 | u32 iop13xx_atue_pmmr_offset; /* This offset can change based on strapping */ | 36 | u32 iop13xx_atue_pmmr_offset; /* This offset can change based on strapping */ |
37 | static struct pci_bus *pci_bus_atux = 0; | 37 | static struct pci_bus *pci_bus_atux = 0; |
38 | static struct pci_bus *pci_bus_atue = 0; | 38 | static struct pci_bus *pci_bus_atue = 0; |
39 | u32 iop13xx_atue_mem_base; | 39 | void __iomem *iop13xx_atue_mem_base; |
40 | u32 iop13xx_atux_mem_base; | 40 | void __iomem *iop13xx_atux_mem_base; |
41 | size_t iop13xx_atue_mem_size; | 41 | size_t iop13xx_atue_mem_size; |
42 | size_t iop13xx_atux_mem_size; | 42 | size_t iop13xx_atux_mem_size; |
43 | 43 | ||
@@ -88,8 +88,7 @@ void iop13xx_map_pci_memory(void) | |||
88 | } | 88 | } |
89 | 89 | ||
90 | if (end) { | 90 | if (end) { |
91 | iop13xx_atux_mem_base = | 91 | iop13xx_atux_mem_base = __arm_ioremap_pfn( |
92 | (u32) __arm_ioremap_pfn( | ||
93 | __phys_to_pfn(IOP13XX_PCIX_LOWER_MEM_PA) | 92 | __phys_to_pfn(IOP13XX_PCIX_LOWER_MEM_PA) |
94 | , 0, iop13xx_atux_mem_size, MT_DEVICE); | 93 | , 0, iop13xx_atux_mem_size, MT_DEVICE); |
95 | if (!iop13xx_atux_mem_base) { | 94 | if (!iop13xx_atux_mem_base) { |
@@ -99,7 +98,7 @@ void iop13xx_map_pci_memory(void) | |||
99 | } | 98 | } |
100 | } else | 99 | } else |
101 | iop13xx_atux_mem_size = 0; | 100 | iop13xx_atux_mem_size = 0; |
102 | PRINTK("%s: atu: %d bus_size: %d mem_base: %x\n", | 101 | PRINTK("%s: atu: %d bus_size: %d mem_base: %p\n", |
103 | __func__, atu, iop13xx_atux_mem_size, | 102 | __func__, atu, iop13xx_atux_mem_size, |
104 | iop13xx_atux_mem_base); | 103 | iop13xx_atux_mem_base); |
105 | break; | 104 | break; |
@@ -114,8 +113,7 @@ void iop13xx_map_pci_memory(void) | |||
114 | } | 113 | } |
115 | 114 | ||
116 | if (end) { | 115 | if (end) { |
117 | iop13xx_atue_mem_base = | 116 | iop13xx_atue_mem_base = __arm_ioremap_pfn( |
118 | (u32) __arm_ioremap_pfn( | ||
119 | __phys_to_pfn(IOP13XX_PCIE_LOWER_MEM_PA) | 117 | __phys_to_pfn(IOP13XX_PCIE_LOWER_MEM_PA) |
120 | , 0, iop13xx_atue_mem_size, MT_DEVICE); | 118 | , 0, iop13xx_atue_mem_size, MT_DEVICE); |
121 | if (!iop13xx_atue_mem_base) { | 119 | if (!iop13xx_atue_mem_base) { |
@@ -125,13 +123,13 @@ void iop13xx_map_pci_memory(void) | |||
125 | } | 123 | } |
126 | } else | 124 | } else |
127 | iop13xx_atue_mem_size = 0; | 125 | iop13xx_atue_mem_size = 0; |
128 | PRINTK("%s: atu: %d bus_size: %d mem_base: %x\n", | 126 | PRINTK("%s: atu: %d bus_size: %d mem_base: %p\n", |
129 | __func__, atu, iop13xx_atue_mem_size, | 127 | __func__, atu, iop13xx_atue_mem_size, |
130 | iop13xx_atue_mem_base); | 128 | iop13xx_atue_mem_base); |
131 | break; | 129 | break; |
132 | } | 130 | } |
133 | 131 | ||
134 | printk("%s: Initialized (%uM @ resource/virtual: %08lx/%08x)\n", | 132 | printk("%s: Initialized (%uM @ resource/virtual: %08lx/%p)\n", |
135 | atu ? "ATUE" : "ATUX", | 133 | atu ? "ATUE" : "ATUX", |
136 | (atu ? iop13xx_atue_mem_size : iop13xx_atux_mem_size) / | 134 | (atu ? iop13xx_atue_mem_size : iop13xx_atux_mem_size) / |
137 | SZ_1M, | 135 | SZ_1M, |
@@ -970,7 +968,6 @@ void __init iop13xx_pci_init(void) | |||
970 | __raw_writel(__raw_readl(IOP13XX_XBG_BECSR) & 3, IOP13XX_XBG_BECSR); | 968 | __raw_writel(__raw_readl(IOP13XX_XBG_BECSR) & 3, IOP13XX_XBG_BECSR); |
971 | 969 | ||
972 | /* Setup the Min Address for PCI memory... */ | 970 | /* Setup the Min Address for PCI memory... */ |
973 | pcibios_min_io = 0; | ||
974 | pcibios_min_mem = IOP13XX_PCIX_LOWER_MEM_BA; | 971 | pcibios_min_mem = IOP13XX_PCIX_LOWER_MEM_BA; |
975 | 972 | ||
976 | /* if Linux is given control of an ATU | 973 | /* if Linux is given control of an ATU |
@@ -1003,7 +1000,7 @@ int iop13xx_pci_setup(int nr, struct pci_sys_data *sys) | |||
1003 | if (nr > 1) | 1000 | if (nr > 1) |
1004 | return 0; | 1001 | return 0; |
1005 | 1002 | ||
1006 | res = kcalloc(2, sizeof(struct resource), GFP_KERNEL); | 1003 | res = kzalloc(sizeof(struct resource), GFP_KERNEL); |
1007 | if (!res) | 1004 | if (!res) |
1008 | panic("PCI: unable to alloc resources"); | 1005 | panic("PCI: unable to alloc resources"); |
1009 | 1006 | ||
@@ -1042,17 +1039,13 @@ int iop13xx_pci_setup(int nr, struct pci_sys_data *sys) | |||
1042 | << IOP13XX_ATUX_PCIXSR_FUNC_NUM; | 1039 | << IOP13XX_ATUX_PCIXSR_FUNC_NUM; |
1043 | __raw_writel(pcixsr, IOP13XX_ATUX_PCIXSR); | 1040 | __raw_writel(pcixsr, IOP13XX_ATUX_PCIXSR); |
1044 | 1041 | ||
1045 | res[0].start = IOP13XX_PCIX_LOWER_IO_PA + IOP13XX_PCIX_IO_BUS_OFFSET; | 1042 | pci_ioremap_io(0, IOP13XX_PCIX_LOWER_IO_PA); |
1046 | res[0].end = IOP13XX_PCIX_UPPER_IO_PA; | ||
1047 | res[0].name = "IQ81340 ATUX PCI I/O Space"; | ||
1048 | res[0].flags = IORESOURCE_IO; | ||
1049 | 1043 | ||
1050 | res[1].start = IOP13XX_PCIX_LOWER_MEM_RA; | 1044 | res->start = IOP13XX_PCIX_LOWER_MEM_RA; |
1051 | res[1].end = IOP13XX_PCIX_UPPER_MEM_RA; | 1045 | res->end = IOP13XX_PCIX_UPPER_MEM_RA; |
1052 | res[1].name = "IQ81340 ATUX PCI Memory Space"; | 1046 | res->name = "IQ81340 ATUX PCI Memory Space"; |
1053 | res[1].flags = IORESOURCE_MEM; | 1047 | res->flags = IORESOURCE_MEM; |
1054 | sys->mem_offset = IOP13XX_PCIX_MEM_OFFSET; | 1048 | sys->mem_offset = IOP13XX_PCIX_MEM_OFFSET; |
1055 | sys->io_offset = IOP13XX_PCIX_LOWER_IO_PA; | ||
1056 | break; | 1049 | break; |
1057 | case IOP13XX_INIT_ATU_ATUE: | 1050 | case IOP13XX_INIT_ATU_ATUE: |
1058 | /* Note: the function number field in the PCSR is ro */ | 1051 | /* Note: the function number field in the PCSR is ro */ |
@@ -1063,17 +1056,13 @@ int iop13xx_pci_setup(int nr, struct pci_sys_data *sys) | |||
1063 | 1056 | ||
1064 | __raw_writel(pcsr, IOP13XX_ATUE_PCSR); | 1057 | __raw_writel(pcsr, IOP13XX_ATUE_PCSR); |
1065 | 1058 | ||
1066 | res[0].start = IOP13XX_PCIE_LOWER_IO_PA + IOP13XX_PCIE_IO_BUS_OFFSET; | 1059 | pci_ioremap_io(SZ_64K, IOP13XX_PCIE_LOWER_IO_PA); |
1067 | res[0].end = IOP13XX_PCIE_UPPER_IO_PA; | ||
1068 | res[0].name = "IQ81340 ATUE PCI I/O Space"; | ||
1069 | res[0].flags = IORESOURCE_IO; | ||
1070 | 1060 | ||
1071 | res[1].start = IOP13XX_PCIE_LOWER_MEM_RA; | 1061 | res->start = IOP13XX_PCIE_LOWER_MEM_RA; |
1072 | res[1].end = IOP13XX_PCIE_UPPER_MEM_RA; | 1062 | res->end = IOP13XX_PCIE_UPPER_MEM_RA; |
1073 | res[1].name = "IQ81340 ATUE PCI Memory Space"; | 1063 | res->name = "IQ81340 ATUE PCI Memory Space"; |
1074 | res[1].flags = IORESOURCE_MEM; | 1064 | res->flags = IORESOURCE_MEM; |
1075 | sys->mem_offset = IOP13XX_PCIE_MEM_OFFSET; | 1065 | sys->mem_offset = IOP13XX_PCIE_MEM_OFFSET; |
1076 | sys->io_offset = IOP13XX_PCIE_LOWER_IO_PA; | ||
1077 | sys->map_irq = iop13xx_pcie_map_irq; | 1066 | sys->map_irq = iop13xx_pcie_map_irq; |
1078 | break; | 1067 | break; |
1079 | default: | 1068 | default: |
@@ -1081,11 +1070,9 @@ int iop13xx_pci_setup(int nr, struct pci_sys_data *sys) | |||
1081 | return 0; | 1070 | return 0; |
1082 | } | 1071 | } |
1083 | 1072 | ||
1084 | request_resource(&ioport_resource, &res[0]); | 1073 | request_resource(&iomem_resource, res); |
1085 | request_resource(&iomem_resource, &res[1]); | ||
1086 | 1074 | ||
1087 | pci_add_resource_offset(&sys->resources, &res[0], sys->io_offset); | 1075 | pci_add_resource_offset(&sys->resources, res, sys->mem_offset); |
1088 | pci_add_resource_offset(&sys->resources, &res[1], sys->mem_offset); | ||
1089 | 1076 | ||
1090 | return 1; | 1077 | return 1; |
1091 | } | 1078 | } |