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-rw-r--r--arch/arm/mach-imx/Kconfig52
-rw-r--r--arch/arm/mach-imx/Makefile15
-rw-r--r--arch/arm/mach-imx/cache-l2x0.c56
-rw-r--r--arch/arm/mach-imx/clock-imx25.c6
-rw-r--r--arch/arm/mach-imx/clock-imx27.c6
-rw-r--r--arch/arm/mach-imx/clock-imx31.c8
-rw-r--r--arch/arm/mach-imx/clock-imx35.c7
-rw-r--r--arch/arm/mach-imx/cpu-imx25.c41
-rw-r--r--arch/arm/mach-imx/cpu-imx27.c28
-rw-r--r--arch/arm/mach-imx/cpu-imx31.c49
-rw-r--r--arch/arm/mach-imx/cpu-imx35.c30
-rw-r--r--arch/arm/mach-imx/devices-imx27.h4
-rw-r--r--arch/arm/mach-imx/devices-imx31.h4
-rw-r--r--arch/arm/mach-imx/devices-imx35.h4
-rw-r--r--arch/arm/mach-imx/mach-apf9328.c1
-rw-r--r--arch/arm/mach-imx/mach-armadillo5x0.c19
-rw-r--r--arch/arm/mach-imx/mach-bug.c1
-rw-r--r--arch/arm/mach-imx/mach-cpuimx27.c1
-rw-r--r--arch/arm/mach-imx/mach-cpuimx35.c3
-rw-r--r--arch/arm/mach-imx/mach-eukrea_cpuimx25.c1
-rw-r--r--arch/arm/mach-imx/mach-imx27_visstrim_m10.c1
-rw-r--r--arch/arm/mach-imx/mach-imx27ipcam.c1
-rw-r--r--arch/arm/mach-imx/mach-imx27lite.c1
-rw-r--r--arch/arm/mach-imx/mach-kzm_arm11_01.c1
-rw-r--r--arch/arm/mach-imx/mach-mx1ads.c17
-rw-r--r--arch/arm/mach-imx/mach-mx21ads.c1
-rw-r--r--arch/arm/mach-imx/mach-mx25_3ds.c11
-rw-r--r--arch/arm/mach-imx/mach-mx27_3ds.c3
-rw-r--r--arch/arm/mach-imx/mach-mx27ads.c1
-rw-r--r--arch/arm/mach-imx/mach-mx31_3ds.c1
-rw-r--r--arch/arm/mach-imx/mach-mx31ads.c1
-rw-r--r--arch/arm/mach-imx/mach-mx31lilly.c1
-rw-r--r--arch/arm/mach-imx/mach-mx31lite.c1
-rw-r--r--arch/arm/mach-imx/mach-mx31moboard.c18
-rw-r--r--arch/arm/mach-imx/mach-mx35_3ds.c1
-rw-r--r--arch/arm/mach-imx/mach-mxt_td60.c1
-rw-r--r--arch/arm/mach-imx/mach-pca100.c1
-rw-r--r--arch/arm/mach-imx/mach-pcm037.c1
-rw-r--r--arch/arm/mach-imx/mach-pcm038.c1
-rw-r--r--arch/arm/mach-imx/mach-pcm043.c1
-rw-r--r--arch/arm/mach-imx/mach-qong.c2
-rw-r--r--arch/arm/mach-imx/mach-scb9328.c1
-rw-r--r--arch/arm/mach-imx/mach-vpr200.c3
-rw-r--r--arch/arm/mach-imx/mm-imx3.c256
-rw-r--r--arch/arm/mach-imx/mm-imx31.c91
-rw-r--r--arch/arm/mach-imx/mm-imx35.c109
-rw-r--r--arch/arm/mach-imx/pm-imx27.c2
47 files changed, 481 insertions, 384 deletions
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 0519dd7f034b..b4e1bf8757c7 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -5,6 +5,18 @@ config IMX_HAVE_DMA_V1
5# Some usages assume that having one of them implies not having (e.g.) ARCH_MX2. 5# Some usages assume that having one of them implies not having (e.g.) ARCH_MX2.
6# To easily distinguish good and reviewed from unreviewed usages new (and IMHO 6# To easily distinguish good and reviewed from unreviewed usages new (and IMHO
7# more sensible) names are used: SOC_IMX31 and SOC_IMX35 7# more sensible) names are used: SOC_IMX31 and SOC_IMX35
8config ARCH_MX1
9 bool
10
11config MACH_MX21
12 bool
13
14config ARCH_MX25
15 bool
16
17config MACH_MX27
18 bool
19
8config ARCH_MX31 20config ARCH_MX31
9 bool 21 bool
10 22
@@ -13,6 +25,7 @@ config ARCH_MX35
13 25
14config SOC_IMX1 26config SOC_IMX1
15 bool 27 bool
28 select ARCH_MX1
16 select CPU_ARM920T 29 select CPU_ARM920T
17 select IMX_HAVE_DMA_V1 30 select IMX_HAVE_DMA_V1
18 select IMX_HAVE_IOMUX_V1 31 select IMX_HAVE_IOMUX_V1
@@ -20,6 +33,7 @@ config SOC_IMX1
20 33
21config SOC_IMX21 34config SOC_IMX21
22 bool 35 bool
36 select MACH_MX21
23 select CPU_ARM926T 37 select CPU_ARM926T
24 select ARCH_MXC_AUDMUX_V1 38 select ARCH_MXC_AUDMUX_V1
25 select IMX_HAVE_DMA_V1 39 select IMX_HAVE_DMA_V1
@@ -28,6 +42,7 @@ config SOC_IMX21
28 42
29config SOC_IMX25 43config SOC_IMX25
30 bool 44 bool
45 select ARCH_MX25
31 select CPU_ARM926T 46 select CPU_ARM926T
32 select ARCH_MXC_AUDMUX_V2 47 select ARCH_MXC_AUDMUX_V2
33 select ARCH_MXC_IOMUX_V3 48 select ARCH_MXC_IOMUX_V3
@@ -35,6 +50,7 @@ config SOC_IMX25
35 50
36config SOC_IMX27 51config SOC_IMX27
37 bool 52 bool
53 select MACH_MX27
38 select CPU_ARM926T 54 select CPU_ARM926T
39 select ARCH_MXC_AUDMUX_V1 55 select ARCH_MXC_AUDMUX_V1
40 select IMX_HAVE_DMA_V1 56 select IMX_HAVE_DMA_V1
@@ -59,7 +75,7 @@ config SOC_IMX35
59 select MXC_AVIC 75 select MXC_AVIC
60 76
61 77
62if ARCH_MX1 78if ARCH_IMX_V4_V5
63 79
64comment "MX1 platforms:" 80comment "MX1 platforms:"
65config MACH_MXLADS 81config MACH_MXLADS
@@ -87,30 +103,6 @@ config MACH_APF9328
87 help 103 help
88 Say Yes here if you are using the Armadeus APF9328 development board 104 Say Yes here if you are using the Armadeus APF9328 development board
89 105
90endif
91
92if ARCH_MX2
93
94choice
95 prompt "CPUs:"
96 default MACH_MX21
97
98config MACH_MX21
99 bool "i.MX21 support"
100 help
101 This enables support for Freescale's MX2 based i.MX21 processor.
102
103config MACH_MX27
104 bool "i.MX27 support"
105 help
106 This enables support for Freescale's MX2 based i.MX27 processor.
107
108endchoice
109
110endif
111
112if MACH_MX21
113
114comment "MX21 platforms:" 106comment "MX21 platforms:"
115 107
116config MACH_MX21ADS 108config MACH_MX21ADS
@@ -124,15 +116,12 @@ config MACH_MX21ADS
124 Include support for MX21ADS platform. This includes specific 116 Include support for MX21ADS platform. This includes specific
125 configurations for the board and its peripherals. 117 configurations for the board and its peripherals.
126 118
127endif
128
129if ARCH_MX25
130
131comment "MX25 platforms:" 119comment "MX25 platforms:"
132 120
133config MACH_MX25_3DS 121config MACH_MX25_3DS
134 bool "Support MX25PDK (3DS) Platform" 122 bool "Support MX25PDK (3DS) Platform"
135 select SOC_IMX25 123 select SOC_IMX25
124 select IMX_HAVE_PLATFORM_FLEXCAN
136 select IMX_HAVE_PLATFORM_FSL_USB2_UDC 125 select IMX_HAVE_PLATFORM_FSL_USB2_UDC
137 select IMX_HAVE_PLATFORM_IMX2_WDT 126 select IMX_HAVE_PLATFORM_IMX2_WDT
138 select IMX_HAVE_PLATFORM_IMXDI_RTC 127 select IMX_HAVE_PLATFORM_IMXDI_RTC
@@ -174,10 +163,6 @@ config MACH_EUKREA_MBIMXSD25_BASEBOARD
174 163
175endchoice 164endchoice
176 165
177endif
178
179if MACH_MX27
180
181comment "MX27 platforms:" 166comment "MX27 platforms:"
182 167
183config MACH_MX27ADS 168config MACH_MX27ADS
@@ -485,6 +470,7 @@ config MACH_QONG
485 bool "Support Dave/DENX QongEVB-LITE platform" 470 bool "Support Dave/DENX QongEVB-LITE platform"
486 select SOC_IMX31 471 select SOC_IMX31
487 select IMX_HAVE_PLATFORM_IMX_UART 472 select IMX_HAVE_PLATFORM_IMX_UART
473 select IMX_HAVE_PLATFORM_IMX2_WDT
488 help 474 help
489 Include support for Dave/DENX QongEVB-LITE platform. This includes 475 Include support for Dave/DENX QongEVB-LITE platform. This includes
490 specific configurations for the board and its peripherals. 476 specific configurations for the board and its peripherals.
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index e9eb36dad888..116d4b2d2817 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -1,16 +1,15 @@
1obj-$(CONFIG_IMX_HAVE_DMA_V1) += dma-v1.o 1obj-$(CONFIG_IMX_HAVE_DMA_V1) += dma-v1.o
2 2
3obj-$(CONFIG_ARCH_MX1) += clock-imx1.o mm-imx1.o 3obj-$(CONFIG_SOC_IMX1) += clock-imx1.o mm-imx1.o
4obj-$(CONFIG_MACH_MX21) += clock-imx21.o mm-imx21.o 4obj-$(CONFIG_SOC_IMX21) += clock-imx21.o mm-imx21.o
5 5
6obj-$(CONFIG_ARCH_MX25) += clock-imx25.o mm-imx25.o ehci-imx25.o 6obj-$(CONFIG_SOC_IMX25) += clock-imx25.o mm-imx25.o ehci-imx25.o cpu-imx25.o
7 7
8obj-$(CONFIG_MACH_MX27) += cpu-imx27.o pm-imx27.o 8obj-$(CONFIG_SOC_IMX27) += cpu-imx27.o pm-imx27.o
9obj-$(CONFIG_MACH_MX27) += clock-imx27.o mm-imx27.o ehci-imx27.o 9obj-$(CONFIG_SOC_IMX27) += clock-imx27.o mm-imx27.o ehci-imx27.o
10 10
11obj-$(CONFIG_SOC_IMX31) += mm-imx31.o cpu-imx31.o clock-imx31.o iomux-imx31.o ehci-imx31.o 11obj-$(CONFIG_SOC_IMX31) += mm-imx3.o cpu-imx31.o clock-imx31.o iomux-imx31.o ehci-imx31.o
12obj-$(CONFIG_SOC_IMX35) += mm-imx35.o cpu-imx35.o clock-imx35.o ehci-imx35.o 12obj-$(CONFIG_SOC_IMX35) += mm-imx3.o cpu-imx35.o clock-imx35.o ehci-imx35.o
13obj-$(CONFIG_CACHE_L2X0) += cache-l2x0.o
14 13
15# Support for CMOS sensor interface 14# Support for CMOS sensor interface
16obj-$(CONFIG_MX1_VIDEO) += mx1-camera-fiq.o mx1-camera-fiq-ksym.o 15obj-$(CONFIG_MX1_VIDEO) += mx1-camera-fiq.o mx1-camera-fiq-ksym.o
diff --git a/arch/arm/mach-imx/cache-l2x0.c b/arch/arm/mach-imx/cache-l2x0.c
deleted file mode 100644
index 69d1322add3c..000000000000
--- a/arch/arm/mach-imx/cache-l2x0.c
+++ /dev/null
@@ -1,56 +0,0 @@
1/*
2 * Copyright (C) 2009-2010 Pengutronix
3 * Sascha Hauer <s.hauer@pengutronix.de>
4 * Juergen Beisert <j.beisert@pengutronix.de>
5 *
6 * This program is free software; you can redistribute it and/or modify it under
7 * the terms of the GNU General Public License version 2 as published by the
8 * Free Software Foundation.
9 */
10
11#include <linux/init.h>
12#include <linux/err.h>
13#include <linux/kernel.h>
14
15#include <asm/hardware/cache-l2x0.h>
16
17#include <mach/hardware.h>
18
19static int mxc_init_l2x0(void)
20{
21 void __iomem *l2x0_base;
22 void __iomem *clkctl_base;
23
24 if (!cpu_is_mx31() && !cpu_is_mx35())
25 return 0;
26
27/*
28 * First of all, we must repair broken chip settings. There are some
29 * i.MX35 CPUs in the wild, comming with bogus L2 cache settings. These
30 * misconfigured CPUs will run amok immediately when the L2 cache gets enabled.
31 * Workaraound is to setup the correct register setting prior enabling the
32 * L2 cache. This should not hurt already working CPUs, as they are using the
33 * same value.
34 */
35#define L2_MEM_VAL 0x10
36
37 clkctl_base = ioremap(MX35_CLKCTL_BASE_ADDR, 4096);
38 if (clkctl_base != NULL) {
39 writel(0x00000515, clkctl_base + L2_MEM_VAL);
40 iounmap(clkctl_base);
41 } else {
42 pr_err("L2 cache: Cannot fix timing. Trying to continue without\n");
43 }
44
45 l2x0_base = ioremap(MX3x_L2CC_BASE_ADDR, 4096);
46 if (IS_ERR(l2x0_base)) {
47 printk(KERN_ERR "remapping L2 cache area failed with %ld\n",
48 PTR_ERR(l2x0_base));
49 return 0;
50 }
51
52 l2x0_init(l2x0_base, 0x00030024, 0x00000000);
53
54 return 0;
55}
56arch_initcall(mxc_init_l2x0);
diff --git a/arch/arm/mach-imx/clock-imx25.c b/arch/arm/mach-imx/clock-imx25.c
index e63e23504fe5..b0fec74c8c91 100644
--- a/arch/arm/mach-imx/clock-imx25.c
+++ b/arch/arm/mach-imx/clock-imx25.c
@@ -263,6 +263,7 @@ DEFINE_CLOCK(audmux_clk, 0, CCM_CGCR1, 0, NULL, NULL, NULL);
263DEFINE_CLOCK(csi_clk, 0, CCM_CGCR1, 4, get_rate_csi, NULL, &csi_per_clk); 263DEFINE_CLOCK(csi_clk, 0, CCM_CGCR1, 4, get_rate_csi, NULL, &csi_per_clk);
264DEFINE_CLOCK(can1_clk, 0, CCM_CGCR1, 2, get_rate_ipg, NULL, NULL); 264DEFINE_CLOCK(can1_clk, 0, CCM_CGCR1, 2, get_rate_ipg, NULL, NULL);
265DEFINE_CLOCK(can2_clk, 1, CCM_CGCR1, 3, get_rate_ipg, NULL, NULL); 265DEFINE_CLOCK(can2_clk, 1, CCM_CGCR1, 3, get_rate_ipg, NULL, NULL);
266DEFINE_CLOCK(iim_clk, 0, CCM_CGCR1, 26, NULL, NULL, NULL);
266 267
267#define _REGISTER_CLOCK(d, n, c) \ 268#define _REGISTER_CLOCK(d, n, c) \
268 { \ 269 { \
@@ -310,6 +311,7 @@ static struct clk_lookup lookups[] = {
310 _REGISTER_CLOCK("flexcan.1", NULL, can2_clk) 311 _REGISTER_CLOCK("flexcan.1", NULL, can2_clk)
311 /* i.mx25 has the i.mx35 type sdma */ 312 /* i.mx25 has the i.mx35 type sdma */
312 _REGISTER_CLOCK("imx35-sdma", NULL, sdma_clk) 313 _REGISTER_CLOCK("imx35-sdma", NULL, sdma_clk)
314 _REGISTER_CLOCK(NULL, "iim", iim_clk)
313}; 315};
314 316
315int __init mx25_clocks_init(void) 317int __init mx25_clocks_init(void)
@@ -334,6 +336,10 @@ int __init mx25_clocks_init(void)
334 /* Clock source for gpt is ahb_div */ 336 /* Clock source for gpt is ahb_div */
335 __raw_writel(__raw_readl(CRM_BASE+0x64) & ~(1 << 5), CRM_BASE + 0x64); 337 __raw_writel(__raw_readl(CRM_BASE+0x64) & ~(1 << 5), CRM_BASE + 0x64);
336 338
339 clk_enable(&iim_clk);
340 imx_print_silicon_rev("i.MX25", mx25_revision());
341 clk_disable(&iim_clk);
342
337 mxc_timer_init(&gpt_clk, MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), 54); 343 mxc_timer_init(&gpt_clk, MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), 54);
338 344
339 return 0; 345 return 0;
diff --git a/arch/arm/mach-imx/clock-imx27.c b/arch/arm/mach-imx/clock-imx27.c
index 6912b821b37b..88fe00a146e3 100644
--- a/arch/arm/mach-imx/clock-imx27.c
+++ b/arch/arm/mach-imx/clock-imx27.c
@@ -583,7 +583,7 @@ DEFINE_CLOCK(emi_clk, 0, PCCR1, 19, NULL, NULL, &ahb_clk);
583DEFINE_CLOCK(dma_clk1, 0, PCCR1, 20, NULL, NULL, &ahb_clk); 583DEFINE_CLOCK(dma_clk1, 0, PCCR1, 20, NULL, NULL, &ahb_clk);
584DEFINE_CLOCK(csi_clk1, 0, PCCR1, 21, NULL, NULL, &ahb_clk); 584DEFINE_CLOCK(csi_clk1, 0, PCCR1, 21, NULL, NULL, &ahb_clk);
585DEFINE_CLOCK(brom_clk, 0, PCCR1, 22, NULL, NULL, &ahb_clk); 585DEFINE_CLOCK(brom_clk, 0, PCCR1, 22, NULL, NULL, &ahb_clk);
586DEFINE_CLOCK(ata_clk, 0, PCCR1, 23, NULL, NULL, &ahb_clk); 586DEFINE_CLOCK(pata_clk, 0, PCCR1, 23, NULL, NULL, &ahb_clk);
587DEFINE_CLOCK(wdog_clk, 0, PCCR1, 24, NULL, NULL, &ipg_clk); 587DEFINE_CLOCK(wdog_clk, 0, PCCR1, 24, NULL, NULL, &ipg_clk);
588DEFINE_CLOCK(usb_clk, 0, PCCR1, 25, get_rate_usb, &usb_clk1, &spll_clk); 588DEFINE_CLOCK(usb_clk, 0, PCCR1, 25, get_rate_usb, &usb_clk1, &spll_clk);
589DEFINE_CLOCK(uart6_clk1, 0, PCCR1, 26, NULL, NULL, &ipg_clk); 589DEFINE_CLOCK(uart6_clk1, 0, PCCR1, 26, NULL, NULL, &ipg_clk);
@@ -666,7 +666,7 @@ static struct clk_lookup lookups[] = {
666 _REGISTER_CLOCK("imx27-fec.0", NULL, fec_clk) 666 _REGISTER_CLOCK("imx27-fec.0", NULL, fec_clk)
667 _REGISTER_CLOCK(NULL, "emi", emi_clk) 667 _REGISTER_CLOCK(NULL, "emi", emi_clk)
668 _REGISTER_CLOCK(NULL, "sahara2", sahara2_clk) 668 _REGISTER_CLOCK(NULL, "sahara2", sahara2_clk)
669 _REGISTER_CLOCK(NULL, "ata", ata_clk) 669 _REGISTER_CLOCK("pata_imx", NULL, pata_clk)
670 _REGISTER_CLOCK(NULL, "mstick", mstick_clk) 670 _REGISTER_CLOCK(NULL, "mstick", mstick_clk)
671 _REGISTER_CLOCK("imx2-wdt.0", NULL, wdog_clk) 671 _REGISTER_CLOCK("imx2-wdt.0", NULL, wdog_clk)
672 _REGISTER_CLOCK(NULL, "gpio", gpio_clk) 672 _REGISTER_CLOCK(NULL, "gpio", gpio_clk)
@@ -751,6 +751,8 @@ int __init mx27_clocks_init(unsigned long fref)
751 clk_enable(&gpio_clk); 751 clk_enable(&gpio_clk);
752 clk_enable(&emi_clk); 752 clk_enable(&emi_clk);
753 clk_enable(&iim_clk); 753 clk_enable(&iim_clk);
754 imx_print_silicon_rev("i.MX27", mx27_revision());
755 clk_disable(&iim_clk);
754 756
755#if defined(CONFIG_DEBUG_LL) && !defined(CONFIG_DEBUG_ICEDCC) 757#if defined(CONFIG_DEBUG_LL) && !defined(CONFIG_DEBUG_ICEDCC)
756 clk_enable(&uart1_clk); 758 clk_enable(&uart1_clk);
diff --git a/arch/arm/mach-imx/clock-imx31.c b/arch/arm/mach-imx/clock-imx31.c
index d973770b1f96..988a28178d4c 100644
--- a/arch/arm/mach-imx/clock-imx31.c
+++ b/arch/arm/mach-imx/clock-imx31.c
@@ -476,7 +476,7 @@ DEFINE_CLOCK(gpt_clk, 0, MXC_CCM_CGR0, 4, NULL, NULL, &perclk_clk);
476DEFINE_CLOCK(epit1_clk, 0, MXC_CCM_CGR0, 6, NULL, NULL, &perclk_clk); 476DEFINE_CLOCK(epit1_clk, 0, MXC_CCM_CGR0, 6, NULL, NULL, &perclk_clk);
477DEFINE_CLOCK(epit2_clk, 1, MXC_CCM_CGR0, 8, NULL, NULL, &perclk_clk); 477DEFINE_CLOCK(epit2_clk, 1, MXC_CCM_CGR0, 8, NULL, NULL, &perclk_clk);
478DEFINE_CLOCK(iim_clk, 0, MXC_CCM_CGR0, 10, NULL, NULL, &ipg_clk); 478DEFINE_CLOCK(iim_clk, 0, MXC_CCM_CGR0, 10, NULL, NULL, &ipg_clk);
479DEFINE_CLOCK(ata_clk, 0, MXC_CCM_CGR0, 12, NULL, NULL, &ipg_clk); 479DEFINE_CLOCK(pata_clk, 0, MXC_CCM_CGR0, 12, NULL, NULL, &ipg_clk);
480DEFINE_CLOCK(sdma_clk1, 0, MXC_CCM_CGR0, 14, NULL, NULL, &ahb_clk); 480DEFINE_CLOCK(sdma_clk1, 0, MXC_CCM_CGR0, 14, NULL, NULL, &ahb_clk);
481DEFINE_CLOCK(cspi3_clk, 2, MXC_CCM_CGR0, 16, NULL, NULL, &ipg_clk); 481DEFINE_CLOCK(cspi3_clk, 2, MXC_CCM_CGR0, 16, NULL, NULL, &ipg_clk);
482DEFINE_CLOCK(rng_clk, 0, MXC_CCM_CGR0, 18, NULL, NULL, &ipg_clk); 482DEFINE_CLOCK(rng_clk, 0, MXC_CCM_CGR0, 18, NULL, NULL, &ipg_clk);
@@ -562,7 +562,7 @@ static struct clk_lookup lookups[] = {
562 _REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk) 562 _REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk)
563 _REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk) 563 _REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk)
564 _REGISTER_CLOCK(NULL, "firi", firi_clk) 564 _REGISTER_CLOCK(NULL, "firi", firi_clk)
565 _REGISTER_CLOCK(NULL, "ata", ata_clk) 565 _REGISTER_CLOCK("pata_imx", NULL, pata_clk)
566 _REGISTER_CLOCK(NULL, "rtic", rtic_clk) 566 _REGISTER_CLOCK(NULL, "rtic", rtic_clk)
567 _REGISTER_CLOCK(NULL, "rng", rng_clk) 567 _REGISTER_CLOCK(NULL, "rng", rng_clk)
568 _REGISTER_CLOCK("imx31-sdma", NULL, sdma_clk1) 568 _REGISTER_CLOCK("imx31-sdma", NULL, sdma_clk1)
@@ -611,11 +611,11 @@ int __init mx31_clocks_init(unsigned long fref)
611 clk_enable(&gpt_clk); 611 clk_enable(&gpt_clk);
612 clk_enable(&emi_clk); 612 clk_enable(&emi_clk);
613 clk_enable(&iim_clk); 613 clk_enable(&iim_clk);
614 mx31_revision();
615 clk_disable(&iim_clk);
614 616
615 clk_enable(&serial_pll_clk); 617 clk_enable(&serial_pll_clk);
616 618
617 mx31_read_cpu_rev();
618
619 if (mx31_revision() >= IMX_CHIP_REVISION_2_0) { 619 if (mx31_revision() >= IMX_CHIP_REVISION_2_0) {
620 reg = __raw_readl(MXC_CCM_PMCR1); 620 reg = __raw_readl(MXC_CCM_PMCR1);
621 /* No PLL restart on DVFS switch; enable auto EMI handshake */ 621 /* No PLL restart on DVFS switch; enable auto EMI handshake */
diff --git a/arch/arm/mach-imx/clock-imx35.c b/arch/arm/mach-imx/clock-imx35.c
index 88b62a071aea..8116f119517d 100644
--- a/arch/arm/mach-imx/clock-imx35.c
+++ b/arch/arm/mach-imx/clock-imx35.c
@@ -354,7 +354,7 @@ static void clk_cgr_disable(struct clk *clk)
354 } 354 }
355 355
356DEFINE_CLOCK(asrc_clk, 0, CCM_CGR0, 0, NULL, NULL); 356DEFINE_CLOCK(asrc_clk, 0, CCM_CGR0, 0, NULL, NULL);
357DEFINE_CLOCK(ata_clk, 0, CCM_CGR0, 2, get_rate_ipg, NULL); 357DEFINE_CLOCK(pata_clk, 0, CCM_CGR0, 2, get_rate_ipg, NULL);
358/* DEFINE_CLOCK(audmux_clk, 0, CCM_CGR0, 4, NULL, NULL); */ 358/* DEFINE_CLOCK(audmux_clk, 0, CCM_CGR0, 4, NULL, NULL); */
359DEFINE_CLOCK(can1_clk, 0, CCM_CGR0, 6, get_rate_ipg, NULL); 359DEFINE_CLOCK(can1_clk, 0, CCM_CGR0, 6, get_rate_ipg, NULL);
360DEFINE_CLOCK(can2_clk, 1, CCM_CGR0, 8, get_rate_ipg, NULL); 360DEFINE_CLOCK(can2_clk, 1, CCM_CGR0, 8, get_rate_ipg, NULL);
@@ -447,7 +447,7 @@ static struct clk nfc_clk = {
447 447
448static struct clk_lookup lookups[] = { 448static struct clk_lookup lookups[] = {
449 _REGISTER_CLOCK(NULL, "asrc", asrc_clk) 449 _REGISTER_CLOCK(NULL, "asrc", asrc_clk)
450 _REGISTER_CLOCK(NULL, "ata", ata_clk) 450 _REGISTER_CLOCK("pata_imx", NULL, pata_clk)
451 _REGISTER_CLOCK("flexcan.0", NULL, can1_clk) 451 _REGISTER_CLOCK("flexcan.0", NULL, can1_clk)
452 _REGISTER_CLOCK("flexcan.1", NULL, can2_clk) 452 _REGISTER_CLOCK("flexcan.1", NULL, can2_clk)
453 _REGISTER_CLOCK("imx35-cspi.0", NULL, cspi1_clk) 453 _REGISTER_CLOCK("imx35-cspi.0", NULL, cspi1_clk)
@@ -537,7 +537,8 @@ int __init mx35_clocks_init()
537 __raw_writel(cgr3, CCM_BASE + CCM_CGR3); 537 __raw_writel(cgr3, CCM_BASE + CCM_CGR3);
538 538
539 clk_enable(&iim_clk); 539 clk_enable(&iim_clk);
540 mx35_read_cpu_rev(); 540 imx_print_silicon_rev("i.MX35", mx35_revision());
541 clk_disable(&iim_clk);
541 542
542#ifdef CONFIG_MXC_USE_EPIT 543#ifdef CONFIG_MXC_USE_EPIT
543 epit_timer_init(&epit1_clk, 544 epit_timer_init(&epit1_clk,
diff --git a/arch/arm/mach-imx/cpu-imx25.c b/arch/arm/mach-imx/cpu-imx25.c
new file mode 100644
index 000000000000..6914bcbf84e4
--- /dev/null
+++ b/arch/arm/mach-imx/cpu-imx25.c
@@ -0,0 +1,41 @@
1/*
2 * MX25 CPU type detection
3 *
4 * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
5 * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 */
12#include <linux/module.h>
13#include <linux/io.h>
14#include <mach/hardware.h>
15#include <mach/iim.h>
16
17static int mx25_cpu_rev = -1;
18
19static int mx25_read_cpu_rev(void)
20{
21 u32 rev;
22
23 rev = __raw_readl(MX25_IO_ADDRESS(MX25_IIM_BASE_ADDR + MXC_IIMSREV));
24 switch (rev) {
25 case 0x00:
26 return IMX_CHIP_REVISION_1_0;
27 case 0x01:
28 return IMX_CHIP_REVISION_1_1;
29 default:
30 return IMX_CHIP_REVISION_UNKNOWN;
31 }
32}
33
34int mx25_revision(void)
35{
36 if (mx25_cpu_rev == -1)
37 mx25_cpu_rev = mx25_read_cpu_rev();
38
39 return mx25_cpu_rev;
40}
41EXPORT_SYMBOL(mx25_revision);
diff --git a/arch/arm/mach-imx/cpu-imx27.c b/arch/arm/mach-imx/cpu-imx27.c
index 3b117be37bd2..ff38e1505f67 100644
--- a/arch/arm/mach-imx/cpu-imx27.c
+++ b/arch/arm/mach-imx/cpu-imx27.c
@@ -26,12 +26,12 @@
26 26
27#include <mach/hardware.h> 27#include <mach/hardware.h>
28 28
29static int cpu_silicon_rev = -1; 29static int mx27_cpu_rev = -1;
30static int cpu_partnumber; 30static int mx27_cpu_partnumber;
31 31
32#define SYS_CHIP_ID 0x00 /* The offset of CHIP ID register */ 32#define SYS_CHIP_ID 0x00 /* The offset of CHIP ID register */
33 33
34static void query_silicon_parameter(void) 34static int mx27_read_cpu_rev(void)
35{ 35{
36 u32 val; 36 u32 val;
37 /* 37 /*
@@ -42,20 +42,18 @@ static void query_silicon_parameter(void)
42 val = __raw_readl(MX27_IO_ADDRESS(MX27_SYSCTRL_BASE_ADDR 42 val = __raw_readl(MX27_IO_ADDRESS(MX27_SYSCTRL_BASE_ADDR
43 + SYS_CHIP_ID)); 43 + SYS_CHIP_ID));
44 44
45 mx27_cpu_partnumber = (int)((val >> 12) & 0xFFFF);
46
45 switch (val >> 28) { 47 switch (val >> 28) {
46 case 0: 48 case 0:
47 cpu_silicon_rev = IMX_CHIP_REVISION_1_0; 49 return IMX_CHIP_REVISION_1_0;
48 break;
49 case 1: 50 case 1:
50 cpu_silicon_rev = IMX_CHIP_REVISION_2_0; 51 return IMX_CHIP_REVISION_2_0;
51 break;
52 case 2: 52 case 2:
53 cpu_silicon_rev = IMX_CHIP_REVISION_2_1; 53 return IMX_CHIP_REVISION_2_1;
54 break;
55 default: 54 default:
56 cpu_silicon_rev = IMX_CHIP_REVISION_UNKNOWN; 55 return IMX_CHIP_REVISION_UNKNOWN;
57 } 56 }
58 cpu_partnumber = (int)((val >> 12) & 0xFFFF);
59} 57}
60 58
61/* 59/*
@@ -65,12 +63,12 @@ static void query_silicon_parameter(void)
65 */ 63 */
66int mx27_revision(void) 64int mx27_revision(void)
67{ 65{
68 if (cpu_silicon_rev == -1) 66 if (mx27_cpu_rev == -1)
69 query_silicon_parameter(); 67 mx27_cpu_rev = mx27_read_cpu_rev();
70 68
71 if (cpu_partnumber != 0x8821) 69 if (mx27_cpu_partnumber != 0x8821)
72 return -EINVAL; 70 return -EINVAL;
73 71
74 return cpu_silicon_rev; 72 return mx27_cpu_rev;
75} 73}
76EXPORT_SYMBOL(mx27_revision); 74EXPORT_SYMBOL(mx27_revision);
diff --git a/arch/arm/mach-imx/cpu-imx31.c b/arch/arm/mach-imx/cpu-imx31.c
index a3780700a882..3f2345f0cdaf 100644
--- a/arch/arm/mach-imx/cpu-imx31.c
+++ b/arch/arm/mach-imx/cpu-imx31.c
@@ -13,45 +13,50 @@
13#include <linux/io.h> 13#include <linux/io.h>
14#include <mach/hardware.h> 14#include <mach/hardware.h>
15#include <mach/iim.h> 15#include <mach/iim.h>
16#include <mach/common.h>
16 17
17unsigned int mx31_cpu_rev; 18static int mx31_cpu_rev = -1;
18EXPORT_SYMBOL(mx31_cpu_rev);
19 19
20static struct { 20static struct {
21 u8 srev; 21 u8 srev;
22 const char *name; 22 const char *name;
23 const char *v;
24 unsigned int rev; 23 unsigned int rev;
25} mx31_cpu_type[] __initdata = { 24} mx31_cpu_type[] = {
26 { .srev = 0x00, .name = "i.MX31(L)", .v = "1.0", .rev = IMX_CHIP_REVISION_1_0 }, 25 { .srev = 0x00, .name = "i.MX31(L)", .rev = IMX_CHIP_REVISION_1_0 },
27 { .srev = 0x10, .name = "i.MX31", .v = "1.1", .rev = IMX_CHIP_REVISION_1_1 }, 26 { .srev = 0x10, .name = "i.MX31", .rev = IMX_CHIP_REVISION_1_1 },
28 { .srev = 0x11, .name = "i.MX31L", .v = "1.1", .rev = IMX_CHIP_REVISION_1_1 }, 27 { .srev = 0x11, .name = "i.MX31L", .rev = IMX_CHIP_REVISION_1_1 },
29 { .srev = 0x12, .name = "i.MX31", .v = "1.15", .rev = IMX_CHIP_REVISION_1_1 }, 28 { .srev = 0x12, .name = "i.MX31", .rev = IMX_CHIP_REVISION_1_1 },
30 { .srev = 0x13, .name = "i.MX31L", .v = "1.15", .rev = IMX_CHIP_REVISION_1_1 }, 29 { .srev = 0x13, .name = "i.MX31L", .rev = IMX_CHIP_REVISION_1_1 },
31 { .srev = 0x14, .name = "i.MX31", .v = "1.2", .rev = IMX_CHIP_REVISION_1_2 }, 30 { .srev = 0x14, .name = "i.MX31", .rev = IMX_CHIP_REVISION_1_2 },
32 { .srev = 0x15, .name = "i.MX31L", .v = "1.2", .rev = IMX_CHIP_REVISION_1_2 }, 31 { .srev = 0x15, .name = "i.MX31L", .rev = IMX_CHIP_REVISION_1_2 },
33 { .srev = 0x28, .name = "i.MX31", .v = "2.0", .rev = IMX_CHIP_REVISION_2_0 }, 32 { .srev = 0x28, .name = "i.MX31", .rev = IMX_CHIP_REVISION_2_0 },
34 { .srev = 0x29, .name = "i.MX31L", .v = "2.0", .rev = IMX_CHIP_REVISION_2_0 }, 33 { .srev = 0x29, .name = "i.MX31L", .rev = IMX_CHIP_REVISION_2_0 },
35}; 34};
36 35
37void __init mx31_read_cpu_rev(void) 36static int mx31_read_cpu_rev(void)
38{ 37{
39 u32 i, srev; 38 u32 i, srev;
40 39
41 /* read SREV register from IIM module */ 40 /* read SREV register from IIM module */
42 srev = __raw_readl(MX31_IO_ADDRESS(MX31_IIM_BASE_ADDR + MXC_IIMSREV)); 41 srev = __raw_readl(MX31_IO_ADDRESS(MX31_IIM_BASE_ADDR + MXC_IIMSREV));
42 srev &= 0xff;
43 43
44 for (i = 0; i < ARRAY_SIZE(mx31_cpu_type); i++) 44 for (i = 0; i < ARRAY_SIZE(mx31_cpu_type); i++)
45 if (srev == mx31_cpu_type[i].srev) { 45 if (srev == mx31_cpu_type[i].srev) {
46 printk(KERN_INFO 46 imx_print_silicon_rev(mx31_cpu_type[i].name,
47 "CPU identified as %s, silicon rev %s\n", 47 mx31_cpu_type[i].rev);
48 mx31_cpu_type[i].name, mx31_cpu_type[i].v); 48 return mx31_cpu_type[i].rev;
49
50 mx31_cpu_rev = mx31_cpu_type[i].rev;
51 return;
52 } 49 }
53 50
54 mx31_cpu_rev = IMX_CHIP_REVISION_UNKNOWN; 51 imx_print_silicon_rev("i.MX31", IMX_CHIP_REVISION_UNKNOWN);
52 return IMX_CHIP_REVISION_UNKNOWN;
53}
54
55int mx31_revision(void)
56{
57 if (mx31_cpu_rev == -1)
58 mx31_cpu_rev = mx31_read_cpu_rev();
55 59
56 printk(KERN_WARNING "Unknown CPU identifier. srev = %02x\n", srev); 60 return mx31_cpu_rev;
57} 61}
62EXPORT_SYMBOL(mx31_revision);
diff --git a/arch/arm/mach-imx/cpu-imx35.c b/arch/arm/mach-imx/cpu-imx35.c
index 6637cd819ecb..846e46eb8cbf 100644
--- a/arch/arm/mach-imx/cpu-imx35.c
+++ b/arch/arm/mach-imx/cpu-imx35.c
@@ -13,32 +13,30 @@
13#include <mach/hardware.h> 13#include <mach/hardware.h>
14#include <mach/iim.h> 14#include <mach/iim.h>
15 15
16unsigned int mx35_cpu_rev; 16static int mx35_cpu_rev = -1;
17EXPORT_SYMBOL(mx35_cpu_rev);
18 17
19void __init mx35_read_cpu_rev(void) 18static int mx35_read_cpu_rev(void)
20{ 19{
21 u32 rev; 20 u32 rev;
22 char *srev;
23 21
24 rev = __raw_readl(MX35_IO_ADDRESS(MX35_IIM_BASE_ADDR + MXC_IIMSREV)); 22 rev = __raw_readl(MX35_IO_ADDRESS(MX35_IIM_BASE_ADDR + MXC_IIMSREV));
25 switch (rev) { 23 switch (rev) {
26 case 0x00: 24 case 0x00:
27 mx35_cpu_rev = IMX_CHIP_REVISION_1_0; 25 return IMX_CHIP_REVISION_1_0;
28 srev = "1.0";
29 break;
30 case 0x10: 26 case 0x10:
31 mx35_cpu_rev = IMX_CHIP_REVISION_2_0; 27 return IMX_CHIP_REVISION_2_0;
32 srev = "2.0";
33 break;
34 case 0x11: 28 case 0x11:
35 mx35_cpu_rev = IMX_CHIP_REVISION_2_1; 29 return IMX_CHIP_REVISION_2_1;
36 srev = "2.1";
37 break;
38 default: 30 default:
39 mx35_cpu_rev = IMX_CHIP_REVISION_UNKNOWN; 31 return IMX_CHIP_REVISION_UNKNOWN;
40 srev = "unknown";
41 } 32 }
33}
34
35int mx35_revision(void)
36{
37 if (mx35_cpu_rev == -1)
38 mx35_cpu_rev = mx35_read_cpu_rev();
42 39
43 printk(KERN_INFO "CPU identified as i.MX35, silicon rev %s\n", srev); 40 return mx35_cpu_rev;
44} 41}
42EXPORT_SYMBOL(mx35_revision);
diff --git a/arch/arm/mach-imx/devices-imx27.h b/arch/arm/mach-imx/devices-imx27.h
index 7f97a3cdd41d..2f727d7c380c 100644
--- a/arch/arm/mach-imx/devices-imx27.h
+++ b/arch/arm/mach-imx/devices-imx27.h
@@ -76,3 +76,7 @@ extern const struct imx_spi_imx_data imx27_cspi_data[];
76#define imx27_add_spi_imx0(pdata) imx27_add_cspi(0, pdata) 76#define imx27_add_spi_imx0(pdata) imx27_add_cspi(0, pdata)
77#define imx27_add_spi_imx1(pdata) imx27_add_cspi(1, pdata) 77#define imx27_add_spi_imx1(pdata) imx27_add_cspi(1, pdata)
78#define imx27_add_spi_imx2(pdata) imx27_add_cspi(2, pdata) 78#define imx27_add_spi_imx2(pdata) imx27_add_cspi(2, pdata)
79
80extern const struct imx_pata_imx_data imx27_pata_imx_data;
81#define imx27_add_pata_imx() \
82 imx_add_pata_imx(&imx27_pata_imx_data)
diff --git a/arch/arm/mach-imx/devices-imx31.h b/arch/arm/mach-imx/devices-imx31.h
index dbe940d9c53a..488e241a6db6 100644
--- a/arch/arm/mach-imx/devices-imx31.h
+++ b/arch/arm/mach-imx/devices-imx31.h
@@ -78,3 +78,7 @@ extern const struct imx_spi_imx_data imx31_cspi_data[];
78#define imx31_add_spi_imx0(pdata) imx31_add_cspi(0, pdata) 78#define imx31_add_spi_imx0(pdata) imx31_add_cspi(0, pdata)
79#define imx31_add_spi_imx1(pdata) imx31_add_cspi(1, pdata) 79#define imx31_add_spi_imx1(pdata) imx31_add_cspi(1, pdata)
80#define imx31_add_spi_imx2(pdata) imx31_add_cspi(2, pdata) 80#define imx31_add_spi_imx2(pdata) imx31_add_cspi(2, pdata)
81
82extern const struct imx_pata_imx_data imx31_pata_imx_data;
83#define imx31_add_pata_imx() \
84 imx_add_pata_imx(&imx31_pata_imx_data)
diff --git a/arch/arm/mach-imx/devices-imx35.h b/arch/arm/mach-imx/devices-imx35.h
index 234cbd3c18af..7b99ef0bb501 100644
--- a/arch/arm/mach-imx/devices-imx35.h
+++ b/arch/arm/mach-imx/devices-imx35.h
@@ -81,3 +81,7 @@ extern const struct imx_spi_imx_data imx35_cspi_data[];
81 imx_add_spi_imx(&imx35_cspi_data[id], pdata) 81 imx_add_spi_imx(&imx35_cspi_data[id], pdata)
82#define imx35_add_spi_imx0(pdata) imx35_add_cspi(0, pdata) 82#define imx35_add_spi_imx0(pdata) imx35_add_cspi(0, pdata)
83#define imx35_add_spi_imx1(pdata) imx35_add_cspi(1, pdata) 83#define imx35_add_spi_imx1(pdata) imx35_add_cspi(1, pdata)
84
85extern const struct imx_pata_imx_data imx35_pata_imx_data;
86#define imx35_add_pata_imx() \
87 imx_add_pata_imx(&imx35_pata_imx_data)
diff --git a/arch/arm/mach-imx/mach-apf9328.c b/arch/arm/mach-imx/mach-apf9328.c
index a404c89485ca..1e486e67dabb 100644
--- a/arch/arm/mach-imx/mach-apf9328.c
+++ b/arch/arm/mach-imx/mach-apf9328.c
@@ -136,6 +136,7 @@ MACHINE_START(APF9328, "Armadeus APF9328")
136 .map_io = mx1_map_io, 136 .map_io = mx1_map_io,
137 .init_early = imx1_init_early, 137 .init_early = imx1_init_early,
138 .init_irq = mx1_init_irq, 138 .init_irq = mx1_init_irq,
139 .handle_irq = imx1_handle_irq,
139 .timer = &apf9328_timer, 140 .timer = &apf9328_timer,
140 .init_machine = apf9328_init, 141 .init_machine = apf9328_init,
141MACHINE_END 142MACHINE_END
diff --git a/arch/arm/mach-imx/mach-armadillo5x0.c b/arch/arm/mach-imx/mach-armadillo5x0.c
index 215259083945..c9a9cf67755e 100644
--- a/arch/arm/mach-imx/mach-armadillo5x0.c
+++ b/arch/arm/mach-imx/mach-armadillo5x0.c
@@ -314,25 +314,19 @@ static struct mtd_partition armadillo5x0_nor_flash_partitions[] = {
314 }, 314 },
315}; 315};
316 316
317static struct physmap_flash_data armadillo5x0_nor_flash_pdata = { 317static const struct physmap_flash_data
318 armadillo5x0_nor_flash_pdata __initconst = {
318 .width = 2, 319 .width = 2,
319 .parts = armadillo5x0_nor_flash_partitions, 320 .parts = armadillo5x0_nor_flash_partitions,
320 .nr_parts = ARRAY_SIZE(armadillo5x0_nor_flash_partitions), 321 .nr_parts = ARRAY_SIZE(armadillo5x0_nor_flash_partitions),
321}; 322};
322 323
323static struct resource armadillo5x0_nor_flash_resource = { 324static const struct resource armadillo5x0_nor_flash_resource __initconst = {
324 .flags = IORESOURCE_MEM, 325 .flags = IORESOURCE_MEM,
325 .start = MX31_CS0_BASE_ADDR, 326 .start = MX31_CS0_BASE_ADDR,
326 .end = MX31_CS0_BASE_ADDR + SZ_64M - 1, 327 .end = MX31_CS0_BASE_ADDR + SZ_64M - 1,
327}; 328};
328 329
329static struct platform_device armadillo5x0_nor_flash = {
330 .name = "physmap-flash",
331 .id = -1,
332 .num_resources = 1,
333 .resource = &armadillo5x0_nor_flash_resource,
334};
335
336/* 330/*
337 * FB support 331 * FB support
338 */ 332 */
@@ -514,8 +508,10 @@ static void __init armadillo5x0_init(void)
514 imx31_add_mx3_sdc_fb(&mx3fb_pdata); 508 imx31_add_mx3_sdc_fb(&mx3fb_pdata);
515 509
516 /* Register NOR Flash */ 510 /* Register NOR Flash */
517 mxc_register_device(&armadillo5x0_nor_flash, 511 platform_device_register_resndata(NULL, "physmap-flash", -1,
518 &armadillo5x0_nor_flash_pdata); 512 &armadillo5x0_nor_flash_resource, 1,
513 &armadillo5x0_nor_flash_pdata,
514 sizeof(armadillo5x0_nor_flash_pdata));
519 515
520 /* Register NAND Flash */ 516 /* Register NAND Flash */
521 imx31_add_mxc_nand(&armadillo5x0_nand_board_info); 517 imx31_add_mxc_nand(&armadillo5x0_nand_board_info);
@@ -562,6 +558,7 @@ MACHINE_START(ARMADILLO5X0, "Armadillo-500")
562 .map_io = mx31_map_io, 558 .map_io = mx31_map_io,
563 .init_early = imx31_init_early, 559 .init_early = imx31_init_early,
564 .init_irq = mx31_init_irq, 560 .init_irq = mx31_init_irq,
561 .handle_irq = imx31_handle_irq,
565 .timer = &armadillo5x0_timer, 562 .timer = &armadillo5x0_timer,
566 .init_machine = armadillo5x0_init, 563 .init_machine = armadillo5x0_init,
567MACHINE_END 564MACHINE_END
diff --git a/arch/arm/mach-imx/mach-bug.c b/arch/arm/mach-imx/mach-bug.c
index f49470553bdf..313f62ddc1ef 100644
--- a/arch/arm/mach-imx/mach-bug.c
+++ b/arch/arm/mach-imx/mach-bug.c
@@ -62,6 +62,7 @@ MACHINE_START(BUG, "BugLabs BUGBase")
62 .map_io = mx31_map_io, 62 .map_io = mx31_map_io,
63 .init_early = imx31_init_early, 63 .init_early = imx31_init_early,
64 .init_irq = mx31_init_irq, 64 .init_irq = mx31_init_irq,
65 .handle_irq = imx31_handle_irq,
65 .timer = &bug_timer, 66 .timer = &bug_timer,
66 .init_machine = bug_board_init, 67 .init_machine = bug_board_init,
67MACHINE_END 68MACHINE_END
diff --git a/arch/arm/mach-imx/mach-cpuimx27.c b/arch/arm/mach-imx/mach-cpuimx27.c
index b1ec2cf53bb0..edb373052576 100644
--- a/arch/arm/mach-imx/mach-cpuimx27.c
+++ b/arch/arm/mach-imx/mach-cpuimx27.c
@@ -315,6 +315,7 @@ MACHINE_START(EUKREA_CPUIMX27, "EUKREA CPUIMX27")
315 .map_io = mx27_map_io, 315 .map_io = mx27_map_io,
316 .init_early = imx27_init_early, 316 .init_early = imx27_init_early,
317 .init_irq = mx27_init_irq, 317 .init_irq = mx27_init_irq,
318 .handle_irq = imx27_handle_irq,
318 .timer = &eukrea_cpuimx27_timer, 319 .timer = &eukrea_cpuimx27_timer,
319 .init_machine = eukrea_cpuimx27_init, 320 .init_machine = eukrea_cpuimx27_init,
320MACHINE_END 321MACHINE_END
diff --git a/arch/arm/mach-imx/mach-cpuimx35.c b/arch/arm/mach-imx/mach-cpuimx35.c
index 470b654b0e6e..66af2e8f7e57 100644
--- a/arch/arm/mach-imx/mach-cpuimx35.c
+++ b/arch/arm/mach-imx/mach-cpuimx35.c
@@ -66,7 +66,7 @@ static struct i2c_board_info eukrea_cpuimx35_i2c_devices[] = {
66 I2C_BOARD_INFO("tsc2007", 0x48), 66 I2C_BOARD_INFO("tsc2007", 0x48),
67 .type = "tsc2007", 67 .type = "tsc2007",
68 .platform_data = &tsc2007_info, 68 .platform_data = &tsc2007_info,
69 .irq = gpio_to_irq(TSC2007_IRQGPIO), 69 .irq = IMX_GPIO_TO_IRQ(TSC2007_IRQGPIO),
70 }, 70 },
71}; 71};
72 72
@@ -198,6 +198,7 @@ MACHINE_START(EUKREA_CPUIMX35SD, "Eukrea CPUIMX35")
198 .map_io = mx35_map_io, 198 .map_io = mx35_map_io,
199 .init_early = imx35_init_early, 199 .init_early = imx35_init_early,
200 .init_irq = mx35_init_irq, 200 .init_irq = mx35_init_irq,
201 .handle_irq = imx35_handle_irq,
201 .timer = &eukrea_cpuimx35_timer, 202 .timer = &eukrea_cpuimx35_timer,
202 .init_machine = eukrea_cpuimx35_init, 203 .init_machine = eukrea_cpuimx35_init,
203MACHINE_END 204MACHINE_END
diff --git a/arch/arm/mach-imx/mach-eukrea_cpuimx25.c b/arch/arm/mach-imx/mach-eukrea_cpuimx25.c
index 9163318e95a2..ab8fbcc472b5 100644
--- a/arch/arm/mach-imx/mach-eukrea_cpuimx25.c
+++ b/arch/arm/mach-imx/mach-eukrea_cpuimx25.c
@@ -167,6 +167,7 @@ MACHINE_START(EUKREA_CPUIMX25SD, "Eukrea CPUIMX25")
167 .map_io = mx25_map_io, 167 .map_io = mx25_map_io,
168 .init_early = imx25_init_early, 168 .init_early = imx25_init_early,
169 .init_irq = mx25_init_irq, 169 .init_irq = mx25_init_irq,
170 .handle_irq = imx25_handle_irq,
170 .timer = &eukrea_cpuimx25_timer, 171 .timer = &eukrea_cpuimx25_timer,
171 .init_machine = eukrea_cpuimx25_init, 172 .init_machine = eukrea_cpuimx25_init,
172MACHINE_END 173MACHINE_END
diff --git a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
index 22306ce28658..38eb9e45110b 100644
--- a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
+++ b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
@@ -279,6 +279,7 @@ MACHINE_START(IMX27_VISSTRIM_M10, "Vista Silicon Visstrim_M10")
279 .map_io = mx27_map_io, 279 .map_io = mx27_map_io,
280 .init_early = imx27_init_early, 280 .init_early = imx27_init_early,
281 .init_irq = mx27_init_irq, 281 .init_irq = mx27_init_irq,
282 .handle_irq = imx27_handle_irq,
282 .timer = &visstrim_m10_timer, 283 .timer = &visstrim_m10_timer,
283 .init_machine = visstrim_m10_board_init, 284 .init_machine = visstrim_m10_board_init,
284MACHINE_END 285MACHINE_END
diff --git a/arch/arm/mach-imx/mach-imx27ipcam.c b/arch/arm/mach-imx/mach-imx27ipcam.c
index 8da48b33fc53..7052155d0557 100644
--- a/arch/arm/mach-imx/mach-imx27ipcam.c
+++ b/arch/arm/mach-imx/mach-imx27ipcam.c
@@ -75,6 +75,7 @@ MACHINE_START(IMX27IPCAM, "Freescale IMX27IPCAM")
75 .map_io = mx27_map_io, 75 .map_io = mx27_map_io,
76 .init_early = imx27_init_early, 76 .init_early = imx27_init_early,
77 .init_irq = mx27_init_irq, 77 .init_irq = mx27_init_irq,
78 .handle_irq = imx27_handle_irq,
78 .timer = &mx27ipcam_timer, 79 .timer = &mx27ipcam_timer,
79 .init_machine = mx27ipcam_init, 80 .init_machine = mx27ipcam_init,
80MACHINE_END 81MACHINE_END
diff --git a/arch/arm/mach-imx/mach-imx27lite.c b/arch/arm/mach-imx/mach-imx27lite.c
index 21a14a20e2c3..8d6a63521f17 100644
--- a/arch/arm/mach-imx/mach-imx27lite.c
+++ b/arch/arm/mach-imx/mach-imx27lite.c
@@ -81,6 +81,7 @@ MACHINE_START(IMX27LITE, "LogicPD i.MX27LITE")
81 .map_io = mx27_map_io, 81 .map_io = mx27_map_io,
82 .init_early = imx27_init_early, 82 .init_early = imx27_init_early,
83 .init_irq = mx27_init_irq, 83 .init_irq = mx27_init_irq,
84 .handle_irq = imx27_handle_irq,
84 .timer = &mx27lite_timer, 85 .timer = &mx27lite_timer,
85 .init_machine = mx27lite_init, 86 .init_machine = mx27lite_init,
86MACHINE_END 87MACHINE_END
diff --git a/arch/arm/mach-imx/mach-kzm_arm11_01.c b/arch/arm/mach-imx/mach-kzm_arm11_01.c
index 7c20e9e58006..4288e8f97eea 100644
--- a/arch/arm/mach-imx/mach-kzm_arm11_01.c
+++ b/arch/arm/mach-imx/mach-kzm_arm11_01.c
@@ -275,6 +275,7 @@ MACHINE_START(KZM_ARM11_01, "Kyoto Microcomputer Co., Ltd. KZM-ARM11-01")
275 .map_io = kzm_map_io, 275 .map_io = kzm_map_io,
276 .init_early = imx31_init_early, 276 .init_early = imx31_init_early,
277 .init_irq = mx31_init_irq, 277 .init_irq = mx31_init_irq,
278 .handle_irq = imx31_handle_irq,
278 .timer = &kzm_timer, 279 .timer = &kzm_timer,
279 .init_machine = kzm_board_init, 280 .init_machine = kzm_board_init,
280MACHINE_END 281MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx1ads.c b/arch/arm/mach-imx/mach-mx1ads.c
index 530ea08dbafd..fc49785e7340 100644
--- a/arch/arm/mach-imx/mach-mx1ads.c
+++ b/arch/arm/mach-imx/mach-mx1ads.c
@@ -68,23 +68,16 @@ static const struct imxuart_platform_data uart1_pdata __initconst = {
68 * Physmap flash 68 * Physmap flash
69 */ 69 */
70 70
71static struct physmap_flash_data mx1ads_flash_data = { 71static const struct physmap_flash_data mx1ads_flash_data __initconst = {
72 .width = 4, /* bankwidth in bytes */ 72 .width = 4, /* bankwidth in bytes */
73}; 73};
74 74
75static struct resource flash_resource = { 75static const struct resource flash_resource __initconst = {
76 .start = MX1_CS0_PHYS, 76 .start = MX1_CS0_PHYS,
77 .end = MX1_CS0_PHYS + SZ_32M - 1, 77 .end = MX1_CS0_PHYS + SZ_32M - 1,
78 .flags = IORESOURCE_MEM, 78 .flags = IORESOURCE_MEM,
79}; 79};
80 80
81static struct platform_device flash_device = {
82 .name = "physmap-flash",
83 .id = 0,
84 .resource = &flash_resource,
85 .num_resources = 1,
86};
87
88/* 81/*
89 * I2C 82 * I2C
90 */ 83 */
@@ -125,7 +118,9 @@ static void __init mx1ads_init(void)
125 imx1_add_imx_uart1(&uart1_pdata); 118 imx1_add_imx_uart1(&uart1_pdata);
126 119
127 /* Physmap flash */ 120 /* Physmap flash */
128 mxc_register_device(&flash_device, &mx1ads_flash_data); 121 platform_device_register_resndata(NULL, "physmap-flash", 0,
122 &flash_resource, 1,
123 &mx1ads_flash_data, sizeof(mx1ads_flash_data));
129 124
130 /* I2C */ 125 /* I2C */
131 i2c_register_board_info(0, mx1ads_i2c_devices, 126 i2c_register_board_info(0, mx1ads_i2c_devices,
@@ -149,6 +144,7 @@ MACHINE_START(MX1ADS, "Freescale MX1ADS")
149 .map_io = mx1_map_io, 144 .map_io = mx1_map_io,
150 .init_early = imx1_init_early, 145 .init_early = imx1_init_early,
151 .init_irq = mx1_init_irq, 146 .init_irq = mx1_init_irq,
147 .handle_irq = imx1_handle_irq,
152 .timer = &mx1ads_timer, 148 .timer = &mx1ads_timer,
153 .init_machine = mx1ads_init, 149 .init_machine = mx1ads_init,
154MACHINE_END 150MACHINE_END
@@ -158,6 +154,7 @@ MACHINE_START(MXLADS, "Freescale MXLADS")
158 .map_io = mx1_map_io, 154 .map_io = mx1_map_io,
159 .init_early = imx1_init_early, 155 .init_early = imx1_init_early,
160 .init_irq = mx1_init_irq, 156 .init_irq = mx1_init_irq,
157 .handle_irq = imx1_handle_irq,
161 .timer = &mx1ads_timer, 158 .timer = &mx1ads_timer,
162 .init_machine = mx1ads_init, 159 .init_machine = mx1ads_init,
163MACHINE_END 160MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx21ads.c b/arch/arm/mach-imx/mach-mx21ads.c
index e56828da26b2..25f84028d055 100644
--- a/arch/arm/mach-imx/mach-mx21ads.c
+++ b/arch/arm/mach-imx/mach-mx21ads.c
@@ -309,6 +309,7 @@ MACHINE_START(MX21ADS, "Freescale i.MX21ADS")
309 .map_io = mx21ads_map_io, 309 .map_io = mx21ads_map_io,
310 .init_early = imx21_init_early, 310 .init_early = imx21_init_early,
311 .init_irq = mx21_init_irq, 311 .init_irq = mx21_init_irq,
312 .handle_irq = imx21_handle_irq,
312 .timer = &mx21ads_timer, 313 .timer = &mx21ads_timer,
313 .init_machine = mx21ads_board_init, 314 .init_machine = mx21ads_board_init,
314MACHINE_END 315MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx25_3ds.c b/arch/arm/mach-imx/mach-mx25_3ds.c
index dd25ee82e70a..88dccf122243 100644
--- a/arch/arm/mach-imx/mach-mx25_3ds.c
+++ b/arch/arm/mach-imx/mach-mx25_3ds.c
@@ -43,6 +43,8 @@
43 43
44#include "devices-imx25.h" 44#include "devices-imx25.h"
45 45
46#define MX25PDK_CAN_PWDN IMX_GPIO_NR(4, 6)
47
46static const struct imxuart_platform_data uart_pdata __initconst = { 48static const struct imxuart_platform_data uart_pdata __initconst = {
47 .flags = IMXUART_HAVE_RTSCTS, 49 .flags = IMXUART_HAVE_RTSCTS,
48}; 50};
@@ -108,6 +110,11 @@ static iomux_v3_cfg_t mx25pdk_pads[] = {
108 /* I2C1 */ 110 /* I2C1 */
109 MX25_PAD_I2C1_CLK__I2C1_CLK, 111 MX25_PAD_I2C1_CLK__I2C1_CLK,
110 MX25_PAD_I2C1_DAT__I2C1_DAT, 112 MX25_PAD_I2C1_DAT__I2C1_DAT,
113
114 /* CAN1 */
115 MX25_PAD_GPIO_A__CAN1_TX,
116 MX25_PAD_GPIO_B__CAN1_RX,
117 MX25_PAD_D14__GPIO_4_6, /* CAN_PWDN */
111}; 118};
112 119
113static const struct fec_platform_data mx25_fec_pdata __initconst = { 120static const struct fec_platform_data mx25_fec_pdata __initconst = {
@@ -240,6 +247,9 @@ static void __init mx25pdk_init(void)
240 247
241 imx25_add_sdhci_esdhc_imx(0, &mx25pdk_esdhc_pdata); 248 imx25_add_sdhci_esdhc_imx(0, &mx25pdk_esdhc_pdata);
242 imx25_add_imx_i2c0(&mx25_3ds_i2c0_data); 249 imx25_add_imx_i2c0(&mx25_3ds_i2c0_data);
250
251 gpio_request_one(MX25PDK_CAN_PWDN, GPIOF_OUT_INIT_LOW, "can-pwdn");
252 imx25_add_flexcan0(NULL);
243} 253}
244 254
245static void __init mx25pdk_timer_init(void) 255static void __init mx25pdk_timer_init(void)
@@ -257,6 +267,7 @@ MACHINE_START(MX25_3DS, "Freescale MX25PDK (3DS)")
257 .map_io = mx25_map_io, 267 .map_io = mx25_map_io,
258 .init_early = imx25_init_early, 268 .init_early = imx25_init_early,
259 .init_irq = mx25_init_irq, 269 .init_irq = mx25_init_irq,
270 .handle_irq = imx25_handle_irq,
260 .timer = &mx25pdk_timer, 271 .timer = &mx25pdk_timer,
261 .init_machine = mx25pdk_init, 272 .init_machine = mx25pdk_init,
262MACHINE_END 273MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx27_3ds.c b/arch/arm/mach-imx/mach-mx27_3ds.c
index 2eafbac2c763..71bb45d09ace 100644
--- a/arch/arm/mach-imx/mach-mx27_3ds.c
+++ b/arch/arm/mach-imx/mach-mx27_3ds.c
@@ -359,7 +359,7 @@ static struct spi_board_info mx27_3ds_spi_devs[] __initdata = {
359 .bus_num = 1, 359 .bus_num = 1,
360 .chip_select = 0, /* SS0 */ 360 .chip_select = 0, /* SS0 */
361 .platform_data = &mc13783_pdata, 361 .platform_data = &mc13783_pdata,
362 .irq = gpio_to_irq(PMIC_INT), 362 .irq = IMX_GPIO_TO_IRQ(PMIC_INT),
363 .mode = SPI_CS_HIGH, 363 .mode = SPI_CS_HIGH,
364 }, { 364 }, {
365 .modalias = "l4f00242t03", 365 .modalias = "l4f00242t03",
@@ -425,6 +425,7 @@ MACHINE_START(MX27_3DS, "Freescale MX27PDK")
425 .map_io = mx27_map_io, 425 .map_io = mx27_map_io,
426 .init_early = imx27_init_early, 426 .init_early = imx27_init_early,
427 .init_irq = mx27_init_irq, 427 .init_irq = mx27_init_irq,
428 .handle_irq = imx27_handle_irq,
428 .timer = &mx27pdk_timer, 429 .timer = &mx27pdk_timer,
429 .init_machine = mx27pdk_init, 430 .init_machine = mx27pdk_init,
430MACHINE_END 431MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx27ads.c b/arch/arm/mach-imx/mach-mx27ads.c
index efe6109099fd..e75f39147845 100644
--- a/arch/arm/mach-imx/mach-mx27ads.c
+++ b/arch/arm/mach-imx/mach-mx27ads.c
@@ -349,6 +349,7 @@ MACHINE_START(MX27ADS, "Freescale i.MX27ADS")
349 .map_io = mx27ads_map_io, 349 .map_io = mx27ads_map_io,
350 .init_early = imx27_init_early, 350 .init_early = imx27_init_early,
351 .init_irq = mx27_init_irq, 351 .init_irq = mx27_init_irq,
352 .handle_irq = imx27_handle_irq,
352 .timer = &mx27ads_timer, 353 .timer = &mx27ads_timer,
353 .init_machine = mx27ads_board_init, 354 .init_machine = mx27ads_board_init,
354MACHINE_END 355MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx31_3ds.c b/arch/arm/mach-imx/mach-mx31_3ds.c
index 589066fb3316..eb3e3fe20287 100644
--- a/arch/arm/mach-imx/mach-mx31_3ds.c
+++ b/arch/arm/mach-imx/mach-mx31_3ds.c
@@ -768,6 +768,7 @@ MACHINE_START(MX31_3DS, "Freescale MX31PDK (3DS)")
768 .map_io = mx31_map_io, 768 .map_io = mx31_map_io,
769 .init_early = imx31_init_early, 769 .init_early = imx31_init_early,
770 .init_irq = mx31_init_irq, 770 .init_irq = mx31_init_irq,
771 .handle_irq = imx31_handle_irq,
771 .timer = &mx31_3ds_timer, 772 .timer = &mx31_3ds_timer,
772 .init_machine = mx31_3ds_init, 773 .init_machine = mx31_3ds_init,
773 .reserve = mx31_3ds_reserve, 774 .reserve = mx31_3ds_reserve,
diff --git a/arch/arm/mach-imx/mach-mx31ads.c b/arch/arm/mach-imx/mach-mx31ads.c
index 910c4561d35f..9cc1a49053bb 100644
--- a/arch/arm/mach-imx/mach-mx31ads.c
+++ b/arch/arm/mach-imx/mach-mx31ads.c
@@ -539,6 +539,7 @@ MACHINE_START(MX31ADS, "Freescale MX31ADS")
539 .map_io = mx31ads_map_io, 539 .map_io = mx31ads_map_io,
540 .init_early = imx31_init_early, 540 .init_early = imx31_init_early,
541 .init_irq = mx31ads_init_irq, 541 .init_irq = mx31ads_init_irq,
542 .handle_irq = imx31_handle_irq,
542 .timer = &mx31ads_timer, 543 .timer = &mx31ads_timer,
543 .init_machine = mx31ads_init, 544 .init_machine = mx31ads_init,
544MACHINE_END 545MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx31lilly.c b/arch/arm/mach-imx/mach-mx31lilly.c
index e92eaf91a7be..5defd8e70fc4 100644
--- a/arch/arm/mach-imx/mach-mx31lilly.c
+++ b/arch/arm/mach-imx/mach-mx31lilly.c
@@ -299,6 +299,7 @@ MACHINE_START(LILLY1131, "INCO startec LILLY-1131")
299 .map_io = mx31_map_io, 299 .map_io = mx31_map_io,
300 .init_early = imx31_init_early, 300 .init_early = imx31_init_early,
301 .init_irq = mx31_init_irq, 301 .init_irq = mx31_init_irq,
302 .handle_irq = imx31_handle_irq,
302 .timer = &mx31lilly_timer, 303 .timer = &mx31lilly_timer,
303 .init_machine = mx31lilly_board_init, 304 .init_machine = mx31lilly_board_init,
304MACHINE_END 305MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx31lite.c b/arch/arm/mach-imx/mach-mx31lite.c
index 5242cb78b563..c97c26d814ed 100644
--- a/arch/arm/mach-imx/mach-mx31lite.c
+++ b/arch/arm/mach-imx/mach-mx31lite.c
@@ -284,6 +284,7 @@ MACHINE_START(MX31LITE, "LogicPD i.MX31 SOM")
284 .map_io = mx31lite_map_io, 284 .map_io = mx31lite_map_io,
285 .init_early = imx31_init_early, 285 .init_early = imx31_init_early,
286 .init_irq = mx31_init_irq, 286 .init_irq = mx31_init_irq,
287 .handle_irq = imx31_handle_irq,
287 .timer = &mx31lite_timer, 288 .timer = &mx31lite_timer,
288 .init_machine = mx31lite_init, 289 .init_machine = mx31lite_init,
289MACHINE_END 290MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx31moboard.c b/arch/arm/mach-imx/mach-mx31moboard.c
index 1d01ef28f25d..fff7791b7e7c 100644
--- a/arch/arm/mach-imx/mach-mx31moboard.c
+++ b/arch/arm/mach-imx/mach-mx31moboard.c
@@ -28,6 +28,9 @@
28#include <linux/spi/spi.h> 28#include <linux/spi/spi.h>
29#include <linux/types.h> 29#include <linux/types.h>
30#include <linux/memblock.h> 30#include <linux/memblock.h>
31#include <linux/clk.h>
32#include <linux/io.h>
33#include <linux/err.h>
31 34
32#include <linux/usb/otg.h> 35#include <linux/usb/otg.h>
33#include <linux/usb/ulpi.h> 36#include <linux/usb/ulpi.h>
@@ -490,6 +493,18 @@ err:
490 493
491} 494}
492 495
496static void mx31moboard_poweroff(void)
497{
498 struct clk *clk = clk_get_sys("imx2-wdt.0", NULL);
499
500 if (!IS_ERR(clk))
501 clk_enable(clk);
502
503 mxc_iomux_mode(MX31_PIN_WATCHDOG_RST__WATCHDOG_RST);
504
505 __raw_writew(1 << 6 | 1 << 2, MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR));
506}
507
493static int mx31moboard_baseboard; 508static int mx31moboard_baseboard;
494core_param(mx31moboard_baseboard, mx31moboard_baseboard, int, 0444); 509core_param(mx31moboard_baseboard, mx31moboard_baseboard, int, 0444);
495 510
@@ -528,6 +543,8 @@ static void __init mx31moboard_init(void)
528 543
529 moboard_usbh2_init(); 544 moboard_usbh2_init();
530 545
546 pm_power_off = mx31moboard_poweroff;
547
531 switch (mx31moboard_baseboard) { 548 switch (mx31moboard_baseboard) {
532 case MX31NOBOARD: 549 case MX31NOBOARD:
533 break; 550 break;
@@ -572,6 +589,7 @@ MACHINE_START(MX31MOBOARD, "EPFL Mobots mx31moboard")
572 .map_io = mx31_map_io, 589 .map_io = mx31_map_io,
573 .init_early = imx31_init_early, 590 .init_early = imx31_init_early,
574 .init_irq = mx31_init_irq, 591 .init_irq = mx31_init_irq,
592 .handle_irq = imx31_handle_irq,
575 .timer = &mx31moboard_timer, 593 .timer = &mx31moboard_timer,
576 .init_machine = mx31moboard_init, 594 .init_machine = mx31moboard_init,
577MACHINE_END 595MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx35_3ds.c b/arch/arm/mach-imx/mach-mx35_3ds.c
index f2a873dc08ce..7a462025a0f7 100644
--- a/arch/arm/mach-imx/mach-mx35_3ds.c
+++ b/arch/arm/mach-imx/mach-mx35_3ds.c
@@ -221,6 +221,7 @@ MACHINE_START(MX35_3DS, "Freescale MX35PDK")
221 .map_io = mx35_map_io, 221 .map_io = mx35_map_io,
222 .init_early = imx35_init_early, 222 .init_early = imx35_init_early,
223 .init_irq = mx35_init_irq, 223 .init_irq = mx35_init_irq,
224 .handle_irq = imx35_handle_irq,
224 .timer = &mx35pdk_timer, 225 .timer = &mx35pdk_timer,
225 .init_machine = mx35_3ds_init, 226 .init_machine = mx35_3ds_init,
226MACHINE_END 227MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mxt_td60.c b/arch/arm/mach-imx/mach-mxt_td60.c
index 5ec3989704fd..125c19643b0f 100644
--- a/arch/arm/mach-imx/mach-mxt_td60.c
+++ b/arch/arm/mach-imx/mach-mxt_td60.c
@@ -271,6 +271,7 @@ MACHINE_START(MXT_TD60, "Maxtrack i-MXT TD60")
271 .map_io = mx27_map_io, 271 .map_io = mx27_map_io,
272 .init_early = imx27_init_early, 272 .init_early = imx27_init_early,
273 .init_irq = mx27_init_irq, 273 .init_irq = mx27_init_irq,
274 .handle_irq = imx27_handle_irq,
274 .timer = &mxt_td60_timer, 275 .timer = &mxt_td60_timer,
275 .init_machine = mxt_td60_board_init, 276 .init_machine = mxt_td60_board_init,
276MACHINE_END 277MACHINE_END
diff --git a/arch/arm/mach-imx/mach-pca100.c b/arch/arm/mach-imx/mach-pca100.c
index 0f6bd1199038..26072f4b02e3 100644
--- a/arch/arm/mach-imx/mach-pca100.c
+++ b/arch/arm/mach-imx/mach-pca100.c
@@ -439,6 +439,7 @@ MACHINE_START(PCA100, "phyCARD-i.MX27")
439 .map_io = mx27_map_io, 439 .map_io = mx27_map_io,
440 .init_early = imx27_init_early, 440 .init_early = imx27_init_early,
441 .init_irq = mx27_init_irq, 441 .init_irq = mx27_init_irq,
442 .handle_irq = imx27_handle_irq,
442 .init_machine = pca100_init, 443 .init_machine = pca100_init,
443 .timer = &pca100_timer, 444 .timer = &pca100_timer,
444MACHINE_END 445MACHINE_END
diff --git a/arch/arm/mach-imx/mach-pcm037.c b/arch/arm/mach-imx/mach-pcm037.c
index 186d4eb90796..efd6b536ef6a 100644
--- a/arch/arm/mach-imx/mach-pcm037.c
+++ b/arch/arm/mach-imx/mach-pcm037.c
@@ -693,6 +693,7 @@ MACHINE_START(PCM037, "Phytec Phycore pcm037")
693 .map_io = mx31_map_io, 693 .map_io = mx31_map_io,
694 .init_early = imx31_init_early, 694 .init_early = imx31_init_early,
695 .init_irq = mx31_init_irq, 695 .init_irq = mx31_init_irq,
696 .handle_irq = imx31_handle_irq,
696 .timer = &pcm037_timer, 697 .timer = &pcm037_timer,
697 .init_machine = pcm037_init, 698 .init_machine = pcm037_init,
698MACHINE_END 699MACHINE_END
diff --git a/arch/arm/mach-imx/mach-pcm038.c b/arch/arm/mach-imx/mach-pcm038.c
index 091bcf87e1a0..f0a5282aa011 100644
--- a/arch/arm/mach-imx/mach-pcm038.c
+++ b/arch/arm/mach-imx/mach-pcm038.c
@@ -353,6 +353,7 @@ MACHINE_START(PCM038, "phyCORE-i.MX27")
353 .map_io = mx27_map_io, 353 .map_io = mx27_map_io,
354 .init_early = imx27_init_early, 354 .init_early = imx27_init_early,
355 .init_irq = mx27_init_irq, 355 .init_irq = mx27_init_irq,
356 .handle_irq = imx27_handle_irq,
356 .timer = &pcm038_timer, 357 .timer = &pcm038_timer,
357 .init_machine = pcm038_init, 358 .init_machine = pcm038_init,
358MACHINE_END 359MACHINE_END
diff --git a/arch/arm/mach-imx/mach-pcm043.c b/arch/arm/mach-imx/mach-pcm043.c
index 0a4d31de7738..7366c2ae3ea5 100644
--- a/arch/arm/mach-imx/mach-pcm043.c
+++ b/arch/arm/mach-imx/mach-pcm043.c
@@ -422,6 +422,7 @@ MACHINE_START(PCM043, "Phytec Phycore pcm043")
422 .map_io = mx35_map_io, 422 .map_io = mx35_map_io,
423 .init_early = imx35_init_early, 423 .init_early = imx35_init_early,
424 .init_irq = mx35_init_irq, 424 .init_irq = mx35_init_irq,
425 .handle_irq = imx35_handle_irq,
425 .timer = &pcm043_timer, 426 .timer = &pcm043_timer,
426 .init_machine = pcm043_init, 427 .init_machine = pcm043_init,
427MACHINE_END 428MACHINE_END
diff --git a/arch/arm/mach-imx/mach-qong.c b/arch/arm/mach-imx/mach-qong.c
index 9e11359c324c..1c4822bb1bcb 100644
--- a/arch/arm/mach-imx/mach-qong.c
+++ b/arch/arm/mach-imx/mach-qong.c
@@ -249,6 +249,7 @@ static void __init qong_init(void)
249 mxc_init_imx_uart(); 249 mxc_init_imx_uart();
250 qong_init_nor_mtd(); 250 qong_init_nor_mtd();
251 qong_init_fpga(); 251 qong_init_fpga();
252 imx31_add_imx2_wdt(NULL);
252} 253}
253 254
254static void __init qong_timer_init(void) 255static void __init qong_timer_init(void)
@@ -266,6 +267,7 @@ MACHINE_START(QONG, "Dave/DENX QongEVB-LITE")
266 .map_io = mx31_map_io, 267 .map_io = mx31_map_io,
267 .init_early = imx31_init_early, 268 .init_early = imx31_init_early,
268 .init_irq = mx31_init_irq, 269 .init_irq = mx31_init_irq,
270 .handle_irq = imx31_handle_irq,
269 .timer = &qong_timer, 271 .timer = &qong_timer,
270 .init_machine = qong_init, 272 .init_machine = qong_init,
271MACHINE_END 273MACHINE_END
diff --git a/arch/arm/mach-imx/mach-scb9328.c b/arch/arm/mach-imx/mach-scb9328.c
index 85d32845ee1e..bb6e5b25d8d0 100644
--- a/arch/arm/mach-imx/mach-scb9328.c
+++ b/arch/arm/mach-imx/mach-scb9328.c
@@ -141,6 +141,7 @@ MACHINE_START(SCB9328, "Synertronixx scb9328")
141 .map_io = mx1_map_io, 141 .map_io = mx1_map_io,
142 .init_early = imx1_init_early, 142 .init_early = imx1_init_early,
143 .init_irq = mx1_init_irq, 143 .init_irq = mx1_init_irq,
144 .handle_irq = imx1_handle_irq,
144 .timer = &scb9328_timer, 145 .timer = &scb9328_timer,
145 .init_machine = scb9328_init, 146 .init_machine = scb9328_init,
146MACHINE_END 147MACHINE_END
diff --git a/arch/arm/mach-imx/mach-vpr200.c b/arch/arm/mach-imx/mach-vpr200.c
index 7d8e012a6335..69092458f2d9 100644
--- a/arch/arm/mach-imx/mach-vpr200.c
+++ b/arch/arm/mach-imx/mach-vpr200.c
@@ -162,7 +162,7 @@ static struct i2c_board_info vpr200_i2c_devices[] = {
162 }, { 162 }, {
163 I2C_BOARD_INFO("mc13892", 0x08), 163 I2C_BOARD_INFO("mc13892", 0x08),
164 .platform_data = &vpr200_pmic, 164 .platform_data = &vpr200_pmic,
165 .irq = gpio_to_irq(GPIO_PMIC_INT), 165 .irq = IMX_GPIO_TO_IRQ(GPIO_PMIC_INT),
166 } 166 }
167}; 167};
168 168
@@ -319,6 +319,7 @@ MACHINE_START(VPR200, "VPR200")
319 .map_io = mx35_map_io, 319 .map_io = mx35_map_io,
320 .init_early = imx35_init_early, 320 .init_early = imx35_init_early,
321 .init_irq = mx35_init_irq, 321 .init_irq = mx35_init_irq,
322 .handle_irq = imx35_handle_irq,
322 .timer = &vpr200_timer, 323 .timer = &vpr200_timer,
323 .init_machine = vpr200_board_init, 324 .init_machine = vpr200_board_init,
324MACHINE_END 325MACHINE_END
diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c
new file mode 100644
index 000000000000..9f0e82ec3398
--- /dev/null
+++ b/arch/arm/mach-imx/mm-imx3.c
@@ -0,0 +1,256 @@
1/*
2 * Copyright (C) 1999,2000 Arm Limited
3 * Copyright (C) 2000 Deep Blue Solutions Ltd
4 * Copyright (C) 2002 Shane Nay (shane@minirl.com)
5 * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
6 * - add MX31 specific definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 */
18
19#include <linux/mm.h>
20#include <linux/init.h>
21#include <linux/err.h>
22
23#include <asm/pgtable.h>
24#include <asm/hardware/cache-l2x0.h>
25#include <asm/mach/map.h>
26
27#include <mach/common.h>
28#include <mach/devices-common.h>
29#include <mach/hardware.h>
30#include <mach/iomux-v3.h>
31#include <mach/irqs.h>
32
33static void imx3_idle(void)
34{
35 unsigned long reg = 0;
36 __asm__ __volatile__(
37 /* disable I and D cache */
38 "mrc p15, 0, %0, c1, c0, 0\n"
39 "bic %0, %0, #0x00001000\n"
40 "bic %0, %0, #0x00000004\n"
41 "mcr p15, 0, %0, c1, c0, 0\n"
42 /* invalidate I cache */
43 "mov %0, #0\n"
44 "mcr p15, 0, %0, c7, c5, 0\n"
45 /* clear and invalidate D cache */
46 "mov %0, #0\n"
47 "mcr p15, 0, %0, c7, c14, 0\n"
48 /* WFI */
49 "mov %0, #0\n"
50 "mcr p15, 0, %0, c7, c0, 4\n"
51 "nop\n" "nop\n" "nop\n" "nop\n"
52 "nop\n" "nop\n" "nop\n"
53 /* enable I and D cache */
54 "mrc p15, 0, %0, c1, c0, 0\n"
55 "orr %0, %0, #0x00001000\n"
56 "orr %0, %0, #0x00000004\n"
57 "mcr p15, 0, %0, c1, c0, 0\n"
58 : "=r" (reg));
59}
60
61static void __iomem *imx3_ioremap(unsigned long phys_addr, size_t size,
62 unsigned int mtype)
63{
64 if (mtype == MT_DEVICE) {
65 /*
66 * Access all peripherals below 0x80000000 as nonshared device
67 * on mx3, but leave l2cc alone. Otherwise cache corruptions
68 * can occur.
69 */
70 if (phys_addr < 0x80000000 &&
71 !addr_in_module(phys_addr, MX3x_L2CC))
72 mtype = MT_DEVICE_NONSHARED;
73 }
74
75 return __arm_ioremap(phys_addr, size, mtype);
76}
77
78void imx3_init_l2x0(void)
79{
80 void __iomem *l2x0_base;
81 void __iomem *clkctl_base;
82
83/*
84 * First of all, we must repair broken chip settings. There are some
85 * i.MX35 CPUs in the wild, comming with bogus L2 cache settings. These
86 * misconfigured CPUs will run amok immediately when the L2 cache gets enabled.
87 * Workaraound is to setup the correct register setting prior enabling the
88 * L2 cache. This should not hurt already working CPUs, as they are using the
89 * same value.
90 */
91#define L2_MEM_VAL 0x10
92
93 clkctl_base = ioremap(MX35_CLKCTL_BASE_ADDR, 4096);
94 if (clkctl_base != NULL) {
95 writel(0x00000515, clkctl_base + L2_MEM_VAL);
96 iounmap(clkctl_base);
97 } else {
98 pr_err("L2 cache: Cannot fix timing. Trying to continue without\n");
99 }
100
101 l2x0_base = ioremap(MX3x_L2CC_BASE_ADDR, 4096);
102 if (IS_ERR(l2x0_base)) {
103 printk(KERN_ERR "remapping L2 cache area failed with %ld\n",
104 PTR_ERR(l2x0_base));
105 return;
106 }
107
108 l2x0_init(l2x0_base, 0x00030024, 0x00000000);
109}
110
111static struct map_desc mx31_io_desc[] __initdata = {
112 imx_map_entry(MX31, X_MEMC, MT_DEVICE),
113 imx_map_entry(MX31, AVIC, MT_DEVICE_NONSHARED),
114 imx_map_entry(MX31, AIPS1, MT_DEVICE_NONSHARED),
115 imx_map_entry(MX31, AIPS2, MT_DEVICE_NONSHARED),
116 imx_map_entry(MX31, SPBA0, MT_DEVICE_NONSHARED),
117};
118
119/*
120 * This function initializes the memory map. It is called during the
121 * system startup to create static physical to virtual memory mappings
122 * for the IO modules.
123 */
124void __init mx31_map_io(void)
125{
126 iotable_init(mx31_io_desc, ARRAY_SIZE(mx31_io_desc));
127}
128
129static struct map_desc mx35_io_desc[] __initdata = {
130 imx_map_entry(MX35, X_MEMC, MT_DEVICE),
131 imx_map_entry(MX35, AVIC, MT_DEVICE_NONSHARED),
132 imx_map_entry(MX35, AIPS1, MT_DEVICE_NONSHARED),
133 imx_map_entry(MX35, AIPS2, MT_DEVICE_NONSHARED),
134 imx_map_entry(MX35, SPBA0, MT_DEVICE_NONSHARED),
135};
136
137void __init mx35_map_io(void)
138{
139 iotable_init(mx35_io_desc, ARRAY_SIZE(mx35_io_desc));
140}
141
142void __init imx31_init_early(void)
143{
144 mxc_set_cpu_type(MXC_CPU_MX31);
145 mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR));
146 imx_idle = imx3_idle;
147 imx_ioremap = imx3_ioremap;
148}
149
150void __init imx35_init_early(void)
151{
152 mxc_set_cpu_type(MXC_CPU_MX35);
153 mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR));
154 mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR));
155 imx_idle = imx3_idle;
156 imx_ioremap = imx3_ioremap;
157}
158
159void __init mx31_init_irq(void)
160{
161 mxc_init_irq(MX31_IO_ADDRESS(MX31_AVIC_BASE_ADDR));
162}
163
164void __init mx35_init_irq(void)
165{
166 mxc_init_irq(MX35_IO_ADDRESS(MX35_AVIC_BASE_ADDR));
167}
168
169static struct sdma_script_start_addrs imx31_to1_sdma_script __initdata = {
170 .per_2_per_addr = 1677,
171};
172
173static struct sdma_script_start_addrs imx31_to2_sdma_script __initdata = {
174 .ap_2_ap_addr = 423,
175 .ap_2_bp_addr = 829,
176 .bp_2_ap_addr = 1029,
177};
178
179static struct sdma_platform_data imx31_sdma_pdata __initdata = {
180 .fw_name = "sdma-imx31-to2.bin",
181 .script_addrs = &imx31_to2_sdma_script,
182};
183
184void __init imx31_soc_init(void)
185{
186 int to_version = mx31_revision() >> 4;
187
188 imx3_init_l2x0();
189
190 mxc_register_gpio("imx31-gpio", 0, MX31_GPIO1_BASE_ADDR, SZ_16K, MX31_INT_GPIO1, 0);
191 mxc_register_gpio("imx31-gpio", 1, MX31_GPIO2_BASE_ADDR, SZ_16K, MX31_INT_GPIO2, 0);
192 mxc_register_gpio("imx31-gpio", 2, MX31_GPIO3_BASE_ADDR, SZ_16K, MX31_INT_GPIO3, 0);
193
194 if (to_version == 1) {
195 strncpy(imx31_sdma_pdata.fw_name, "sdma-imx31-to1.bin",
196 strlen(imx31_sdma_pdata.fw_name));
197 imx31_sdma_pdata.script_addrs = &imx31_to1_sdma_script;
198 }
199
200 imx_add_imx_sdma("imx31-sdma", MX31_SDMA_BASE_ADDR, MX31_INT_SDMA, &imx31_sdma_pdata);
201}
202
203static struct sdma_script_start_addrs imx35_to1_sdma_script __initdata = {
204 .ap_2_ap_addr = 642,
205 .uart_2_mcu_addr = 817,
206 .mcu_2_app_addr = 747,
207 .uartsh_2_mcu_addr = 1183,
208 .per_2_shp_addr = 1033,
209 .mcu_2_shp_addr = 961,
210 .ata_2_mcu_addr = 1333,
211 .mcu_2_ata_addr = 1252,
212 .app_2_mcu_addr = 683,
213 .shp_2_per_addr = 1111,
214 .shp_2_mcu_addr = 892,
215};
216
217static struct sdma_script_start_addrs imx35_to2_sdma_script __initdata = {
218 .ap_2_ap_addr = 729,
219 .uart_2_mcu_addr = 904,
220 .per_2_app_addr = 1597,
221 .mcu_2_app_addr = 834,
222 .uartsh_2_mcu_addr = 1270,
223 .per_2_shp_addr = 1120,
224 .mcu_2_shp_addr = 1048,
225 .ata_2_mcu_addr = 1429,
226 .mcu_2_ata_addr = 1339,
227 .app_2_per_addr = 1531,
228 .app_2_mcu_addr = 770,
229 .shp_2_per_addr = 1198,
230 .shp_2_mcu_addr = 979,
231};
232
233static struct sdma_platform_data imx35_sdma_pdata __initdata = {
234 .fw_name = "sdma-imx35-to2.bin",
235 .script_addrs = &imx35_to2_sdma_script,
236};
237
238void __init imx35_soc_init(void)
239{
240 int to_version = mx35_revision() >> 4;
241
242 imx3_init_l2x0();
243
244 /* i.mx35 has the i.mx31 type gpio */
245 mxc_register_gpio("imx31-gpio", 0, MX35_GPIO1_BASE_ADDR, SZ_16K, MX35_INT_GPIO1, 0);
246 mxc_register_gpio("imx31-gpio", 1, MX35_GPIO2_BASE_ADDR, SZ_16K, MX35_INT_GPIO2, 0);
247 mxc_register_gpio("imx31-gpio", 2, MX35_GPIO3_BASE_ADDR, SZ_16K, MX35_INT_GPIO3, 0);
248
249 if (to_version == 1) {
250 strncpy(imx35_sdma_pdata.fw_name, "sdma-imx35-to1.bin",
251 strlen(imx35_sdma_pdata.fw_name));
252 imx35_sdma_pdata.script_addrs = &imx35_to1_sdma_script;
253 }
254
255 imx_add_imx_sdma("imx35-sdma", MX35_SDMA_BASE_ADDR, MX35_INT_SDMA, &imx35_sdma_pdata);
256}
diff --git a/arch/arm/mach-imx/mm-imx31.c b/arch/arm/mach-imx/mm-imx31.c
deleted file mode 100644
index b7c55e7db000..000000000000
--- a/arch/arm/mach-imx/mm-imx31.c
+++ /dev/null
@@ -1,91 +0,0 @@
1/*
2 * Copyright (C) 1999,2000 Arm Limited
3 * Copyright (C) 2000 Deep Blue Solutions Ltd
4 * Copyright (C) 2002 Shane Nay (shane@minirl.com)
5 * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
6 * - add MX31 specific definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 */
18
19#include <linux/mm.h>
20#include <linux/init.h>
21#include <linux/err.h>
22
23#include <asm/pgtable.h>
24#include <asm/mach/map.h>
25
26#include <mach/common.h>
27#include <mach/devices-common.h>
28#include <mach/hardware.h>
29#include <mach/iomux-v3.h>
30#include <mach/irqs.h>
31
32static struct map_desc mx31_io_desc[] __initdata = {
33 imx_map_entry(MX31, X_MEMC, MT_DEVICE),
34 imx_map_entry(MX31, AVIC, MT_DEVICE_NONSHARED),
35 imx_map_entry(MX31, AIPS1, MT_DEVICE_NONSHARED),
36 imx_map_entry(MX31, AIPS2, MT_DEVICE_NONSHARED),
37 imx_map_entry(MX31, SPBA0, MT_DEVICE_NONSHARED),
38};
39
40/*
41 * This function initializes the memory map. It is called during the
42 * system startup to create static physical to virtual memory mappings
43 * for the IO modules.
44 */
45void __init mx31_map_io(void)
46{
47 iotable_init(mx31_io_desc, ARRAY_SIZE(mx31_io_desc));
48}
49
50void __init imx31_init_early(void)
51{
52 mxc_set_cpu_type(MXC_CPU_MX31);
53 mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR));
54}
55
56void __init mx31_init_irq(void)
57{
58 mxc_init_irq(MX31_IO_ADDRESS(MX31_AVIC_BASE_ADDR));
59}
60
61static struct sdma_script_start_addrs imx31_to1_sdma_script __initdata = {
62 .per_2_per_addr = 1677,
63};
64
65static struct sdma_script_start_addrs imx31_to2_sdma_script __initdata = {
66 .ap_2_ap_addr = 423,
67 .ap_2_bp_addr = 829,
68 .bp_2_ap_addr = 1029,
69};
70
71static struct sdma_platform_data imx31_sdma_pdata __initdata = {
72 .fw_name = "sdma-imx31-to2.bin",
73 .script_addrs = &imx31_to2_sdma_script,
74};
75
76void __init imx31_soc_init(void)
77{
78 int to_version = mx31_revision() >> 4;
79
80 mxc_register_gpio("imx31-gpio", 0, MX31_GPIO1_BASE_ADDR, SZ_16K, MX31_INT_GPIO1, 0);
81 mxc_register_gpio("imx31-gpio", 1, MX31_GPIO2_BASE_ADDR, SZ_16K, MX31_INT_GPIO2, 0);
82 mxc_register_gpio("imx31-gpio", 2, MX31_GPIO3_BASE_ADDR, SZ_16K, MX31_INT_GPIO3, 0);
83
84 if (to_version == 1) {
85 strncpy(imx31_sdma_pdata.fw_name, "sdma-imx31-to1.bin",
86 strlen(imx31_sdma_pdata.fw_name));
87 imx31_sdma_pdata.script_addrs = &imx31_to1_sdma_script;
88 }
89
90 imx_add_imx_sdma("imx31-sdma", MX31_SDMA_BASE_ADDR, MX31_INT_SDMA, &imx31_sdma_pdata);
91}
diff --git a/arch/arm/mach-imx/mm-imx35.c b/arch/arm/mach-imx/mm-imx35.c
deleted file mode 100644
index f49bac7a1ede..000000000000
--- a/arch/arm/mach-imx/mm-imx35.c
+++ /dev/null
@@ -1,109 +0,0 @@
1/*
2 * Copyright (C) 1999,2000 Arm Limited
3 * Copyright (C) 2000 Deep Blue Solutions Ltd
4 * Copyright (C) 2002 Shane Nay (shane@minirl.com)
5 * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
6 * - add MX31 specific definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 */
18
19#include <linux/mm.h>
20#include <linux/init.h>
21#include <linux/err.h>
22
23#include <asm/pgtable.h>
24#include <asm/mach/map.h>
25#include <asm/hardware/cache-l2x0.h>
26
27#include <mach/common.h>
28#include <mach/devices-common.h>
29#include <mach/hardware.h>
30#include <mach/iomux-v3.h>
31#include <mach/irqs.h>
32
33static struct map_desc mx35_io_desc[] __initdata = {
34 imx_map_entry(MX35, X_MEMC, MT_DEVICE),
35 imx_map_entry(MX35, AVIC, MT_DEVICE_NONSHARED),
36 imx_map_entry(MX35, AIPS1, MT_DEVICE_NONSHARED),
37 imx_map_entry(MX35, AIPS2, MT_DEVICE_NONSHARED),
38 imx_map_entry(MX35, SPBA0, MT_DEVICE_NONSHARED),
39};
40
41void __init mx35_map_io(void)
42{
43 iotable_init(mx35_io_desc, ARRAY_SIZE(mx35_io_desc));
44}
45
46void __init imx35_init_early(void)
47{
48 mxc_set_cpu_type(MXC_CPU_MX35);
49 mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR));
50 mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR));
51}
52
53void __init mx35_init_irq(void)
54{
55 mxc_init_irq(MX35_IO_ADDRESS(MX35_AVIC_BASE_ADDR));
56}
57
58static struct sdma_script_start_addrs imx35_to1_sdma_script __initdata = {
59 .ap_2_ap_addr = 642,
60 .uart_2_mcu_addr = 817,
61 .mcu_2_app_addr = 747,
62 .uartsh_2_mcu_addr = 1183,
63 .per_2_shp_addr = 1033,
64 .mcu_2_shp_addr = 961,
65 .ata_2_mcu_addr = 1333,
66 .mcu_2_ata_addr = 1252,
67 .app_2_mcu_addr = 683,
68 .shp_2_per_addr = 1111,
69 .shp_2_mcu_addr = 892,
70};
71
72static struct sdma_script_start_addrs imx35_to2_sdma_script __initdata = {
73 .ap_2_ap_addr = 729,
74 .uart_2_mcu_addr = 904,
75 .per_2_app_addr = 1597,
76 .mcu_2_app_addr = 834,
77 .uartsh_2_mcu_addr = 1270,
78 .per_2_shp_addr = 1120,
79 .mcu_2_shp_addr = 1048,
80 .ata_2_mcu_addr = 1429,
81 .mcu_2_ata_addr = 1339,
82 .app_2_per_addr = 1531,
83 .app_2_mcu_addr = 770,
84 .shp_2_per_addr = 1198,
85 .shp_2_mcu_addr = 979,
86};
87
88static struct sdma_platform_data imx35_sdma_pdata __initdata = {
89 .fw_name = "sdma-imx35-to2.bin",
90 .script_addrs = &imx35_to2_sdma_script,
91};
92
93void __init imx35_soc_init(void)
94{
95 int to_version = mx35_revision() >> 4;
96
97 /* i.mx35 has the i.mx31 type gpio */
98 mxc_register_gpio("imx31-gpio", 0, MX35_GPIO1_BASE_ADDR, SZ_16K, MX35_INT_GPIO1, 0);
99 mxc_register_gpio("imx31-gpio", 1, MX35_GPIO2_BASE_ADDR, SZ_16K, MX35_INT_GPIO2, 0);
100 mxc_register_gpio("imx31-gpio", 2, MX35_GPIO3_BASE_ADDR, SZ_16K, MX35_INT_GPIO3, 0);
101
102 if (to_version == 1) {
103 strncpy(imx35_sdma_pdata.fw_name, "sdma-imx35-to1.bin",
104 strlen(imx35_sdma_pdata.fw_name));
105 imx35_sdma_pdata.script_addrs = &imx35_to1_sdma_script;
106 }
107
108 imx_add_imx_sdma("imx35-sdma", MX35_SDMA_BASE_ADDR, MX35_INT_SDMA, &imx35_sdma_pdata);
109}
diff --git a/arch/arm/mach-imx/pm-imx27.c b/arch/arm/mach-imx/pm-imx27.c
index acf17691d2cc..e455d2f855bf 100644
--- a/arch/arm/mach-imx/pm-imx27.c
+++ b/arch/arm/mach-imx/pm-imx27.c
@@ -11,7 +11,7 @@
11#include <linux/suspend.h> 11#include <linux/suspend.h>
12#include <linux/io.h> 12#include <linux/io.h>
13#include <mach/system.h> 13#include <mach/system.h>
14#include <mach/mx27.h> 14#include <mach/hardware.h>
15 15
16static int mx27_suspend_enter(suspend_state_t state) 16static int mx27_suspend_enter(suspend_state_t state)
17{ 17{
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-16 16:55:05 -0400