diff options
Diffstat (limited to 'arch/arm/mach-imx/dma-v1.c')
-rw-r--r-- | arch/arm/mach-imx/dma-v1.c | 26 |
1 files changed, 4 insertions, 22 deletions
diff --git a/arch/arm/mach-imx/dma-v1.c b/arch/arm/mach-imx/dma-v1.c index 236f1495efad..42afc29a7da8 100644 --- a/arch/arm/mach-imx/dma-v1.c +++ b/arch/arm/mach-imx/dma-v1.c | |||
@@ -26,6 +26,7 @@ | |||
26 | #include <linux/init.h> | 26 | #include <linux/init.h> |
27 | #include <linux/kernel.h> | 27 | #include <linux/kernel.h> |
28 | #include <linux/interrupt.h> | 28 | #include <linux/interrupt.h> |
29 | #include <linux/err.h> | ||
29 | #include <linux/errno.h> | 30 | #include <linux/errno.h> |
30 | #include <linux/clk.h> | 31 | #include <linux/clk.h> |
31 | #include <linux/scatterlist.h> | 32 | #include <linux/scatterlist.h> |
@@ -475,7 +476,6 @@ void imx_dma_enable(int channel) | |||
475 | imx_dmav1_writel(imx_dmav1_readl(DMA_CCR(channel)) | CCR_CEN | | 476 | imx_dmav1_writel(imx_dmav1_readl(DMA_CCR(channel)) | CCR_CEN | |
476 | CCR_ACRPT, DMA_CCR(channel)); | 477 | CCR_ACRPT, DMA_CCR(channel)); |
477 | 478 | ||
478 | #ifdef CONFIG_ARCH_MX2 | ||
479 | if ((cpu_is_mx21() || cpu_is_mx27()) && | 479 | if ((cpu_is_mx21() || cpu_is_mx27()) && |
480 | imxdma->sg && imx_dma_hw_chain(imxdma)) { | 480 | imxdma->sg && imx_dma_hw_chain(imxdma)) { |
481 | imxdma->sg = sg_next(imxdma->sg); | 481 | imxdma->sg = sg_next(imxdma->sg); |
@@ -487,7 +487,6 @@ void imx_dma_enable(int channel) | |||
487 | DMA_CCR(channel)); | 487 | DMA_CCR(channel)); |
488 | } | 488 | } |
489 | } | 489 | } |
490 | #endif | ||
491 | imxdma->in_use = 1; | 490 | imxdma->in_use = 1; |
492 | 491 | ||
493 | local_irq_restore(flags); | 492 | local_irq_restore(flags); |
@@ -518,7 +517,6 @@ void imx_dma_disable(int channel) | |||
518 | } | 517 | } |
519 | EXPORT_SYMBOL(imx_dma_disable); | 518 | EXPORT_SYMBOL(imx_dma_disable); |
520 | 519 | ||
521 | #ifdef CONFIG_ARCH_MX2 | ||
522 | static void imx_dma_watchdog(unsigned long chno) | 520 | static void imx_dma_watchdog(unsigned long chno) |
523 | { | 521 | { |
524 | struct imx_dma_channel *imxdma = &imx_dma_channels[chno]; | 522 | struct imx_dma_channel *imxdma = &imx_dma_channels[chno]; |
@@ -530,7 +528,6 @@ static void imx_dma_watchdog(unsigned long chno) | |||
530 | if (imxdma->err_handler) | 528 | if (imxdma->err_handler) |
531 | imxdma->err_handler(chno, imxdma->data, IMX_DMA_ERR_TIMEOUT); | 529 | imxdma->err_handler(chno, imxdma->data, IMX_DMA_ERR_TIMEOUT); |
532 | } | 530 | } |
533 | #endif | ||
534 | 531 | ||
535 | static irqreturn_t dma_err_handler(int irq, void *dev_id) | 532 | static irqreturn_t dma_err_handler(int irq, void *dev_id) |
536 | { | 533 | { |
@@ -654,10 +651,8 @@ static irqreturn_t dma_irq_handler(int irq, void *dev_id) | |||
654 | { | 651 | { |
655 | int i, disr; | 652 | int i, disr; |
656 | 653 | ||
657 | #ifdef CONFIG_ARCH_MX2 | ||
658 | if (cpu_is_mx21() || cpu_is_mx27()) | 654 | if (cpu_is_mx21() || cpu_is_mx27()) |
659 | dma_err_handler(irq, dev_id); | 655 | dma_err_handler(irq, dev_id); |
660 | #endif | ||
661 | 656 | ||
662 | disr = imx_dmav1_readl(DMA_DISR); | 657 | disr = imx_dmav1_readl(DMA_DISR); |
663 | 658 | ||
@@ -703,7 +698,6 @@ int imx_dma_request(int channel, const char *name) | |||
703 | imxdma->name = name; | 698 | imxdma->name = name; |
704 | local_irq_restore(flags); /* request_irq() can block */ | 699 | local_irq_restore(flags); /* request_irq() can block */ |
705 | 700 | ||
706 | #ifdef CONFIG_ARCH_MX2 | ||
707 | if (cpu_is_mx21() || cpu_is_mx27()) { | 701 | if (cpu_is_mx21() || cpu_is_mx27()) { |
708 | ret = request_irq(MX2x_INT_DMACH0 + channel, | 702 | ret = request_irq(MX2x_INT_DMACH0 + channel, |
709 | dma_irq_handler, 0, "DMA", NULL); | 703 | dma_irq_handler, 0, "DMA", NULL); |
@@ -717,7 +711,6 @@ int imx_dma_request(int channel, const char *name) | |||
717 | imxdma->watchdog.function = &imx_dma_watchdog; | 711 | imxdma->watchdog.function = &imx_dma_watchdog; |
718 | imxdma->watchdog.data = channel; | 712 | imxdma->watchdog.data = channel; |
719 | } | 713 | } |
720 | #endif | ||
721 | 714 | ||
722 | return ret; | 715 | return ret; |
723 | } | 716 | } |
@@ -744,10 +737,8 @@ void imx_dma_free(int channel) | |||
744 | imx_dma_disable(channel); | 737 | imx_dma_disable(channel); |
745 | imxdma->name = NULL; | 738 | imxdma->name = NULL; |
746 | 739 | ||
747 | #ifdef CONFIG_ARCH_MX2 | ||
748 | if (cpu_is_mx21() || cpu_is_mx27()) | 740 | if (cpu_is_mx21() || cpu_is_mx27()) |
749 | free_irq(MX2x_INT_DMACH0 + channel, NULL); | 741 | free_irq(MX2x_INT_DMACH0 + channel, NULL); |
750 | #endif | ||
751 | 742 | ||
752 | local_irq_restore(flags); | 743 | local_irq_restore(flags); |
753 | } | 744 | } |
@@ -803,21 +794,13 @@ static int __init imx_dma_init(void) | |||
803 | int ret = 0; | 794 | int ret = 0; |
804 | int i; | 795 | int i; |
805 | 796 | ||
806 | #ifdef CONFIG_ARCH_MX1 | ||
807 | if (cpu_is_mx1()) | 797 | if (cpu_is_mx1()) |
808 | imx_dmav1_baseaddr = MX1_IO_ADDRESS(MX1_DMA_BASE_ADDR); | 798 | imx_dmav1_baseaddr = MX1_IO_ADDRESS(MX1_DMA_BASE_ADDR); |
809 | else | 799 | else if (cpu_is_mx21()) |
810 | #endif | ||
811 | #ifdef CONFIG_MACH_MX21 | ||
812 | if (cpu_is_mx21()) | ||
813 | imx_dmav1_baseaddr = MX21_IO_ADDRESS(MX21_DMA_BASE_ADDR); | 800 | imx_dmav1_baseaddr = MX21_IO_ADDRESS(MX21_DMA_BASE_ADDR); |
814 | else | 801 | else if (cpu_is_mx27()) |
815 | #endif | ||
816 | #ifdef CONFIG_MACH_MX27 | ||
817 | if (cpu_is_mx27()) | ||
818 | imx_dmav1_baseaddr = MX27_IO_ADDRESS(MX27_DMA_BASE_ADDR); | 802 | imx_dmav1_baseaddr = MX27_IO_ADDRESS(MX27_DMA_BASE_ADDR); |
819 | else | 803 | else |
820 | #endif | ||
821 | return 0; | 804 | return 0; |
822 | 805 | ||
823 | dma_clk = clk_get(NULL, "dma"); | 806 | dma_clk = clk_get(NULL, "dma"); |
@@ -828,7 +811,6 @@ static int __init imx_dma_init(void) | |||
828 | /* reset DMA module */ | 811 | /* reset DMA module */ |
829 | imx_dmav1_writel(DCR_DRST, DMA_DCR); | 812 | imx_dmav1_writel(DCR_DRST, DMA_DCR); |
830 | 813 | ||
831 | #ifdef CONFIG_ARCH_MX1 | ||
832 | if (cpu_is_mx1()) { | 814 | if (cpu_is_mx1()) { |
833 | ret = request_irq(MX1_DMA_INT, dma_irq_handler, 0, "DMA", NULL); | 815 | ret = request_irq(MX1_DMA_INT, dma_irq_handler, 0, "DMA", NULL); |
834 | if (ret) { | 816 | if (ret) { |
@@ -843,7 +825,7 @@ static int __init imx_dma_init(void) | |||
843 | return ret; | 825 | return ret; |
844 | } | 826 | } |
845 | } | 827 | } |
846 | #endif | 828 | |
847 | /* enable DMA module */ | 829 | /* enable DMA module */ |
848 | imx_dmav1_writel(DCR_DEN, DMA_DCR); | 830 | imx_dmav1_writel(DCR_DEN, DMA_DCR); |
849 | 831 | ||