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Diffstat (limited to 'arch/arm/mach-imx/clk-imx35.c')
-rw-r--r--arch/arm/mach-imx/clk-imx35.c11
1 files changed, 8 insertions, 3 deletions
diff --git a/arch/arm/mach-imx/clk-imx35.c b/arch/arm/mach-imx/clk-imx35.c
index 65fb8bcd86cb..177259b523cd 100644
--- a/arch/arm/mach-imx/clk-imx35.c
+++ b/arch/arm/mach-imx/clk-imx35.c
@@ -62,8 +62,8 @@ enum mx35_clks {
62 kpp_gate, mlb_gate, mshc_gate, owire_gate, pwm_gate, rngc_gate, 62 kpp_gate, mlb_gate, mshc_gate, owire_gate, pwm_gate, rngc_gate,
63 rtc_gate, rtic_gate, scc_gate, sdma_gate, spba_gate, spdif_gate, 63 rtc_gate, rtic_gate, scc_gate, sdma_gate, spba_gate, spdif_gate,
64 ssi1_gate, ssi2_gate, uart1_gate, uart2_gate, uart3_gate, usbotg_gate, 64 ssi1_gate, ssi2_gate, uart1_gate, uart2_gate, uart3_gate, usbotg_gate,
65 wdog_gate, max_gate, admux_gate, csi_gate, iim_gate, gpu2d_gate, 65 wdog_gate, max_gate, admux_gate, csi_gate, csi_div, csi_sel, iim_gate,
66 clk_max 66 gpu2d_gate, clk_max
67}; 67};
68 68
69static struct clk *clk[clk_max]; 69static struct clk *clk[clk_max];
@@ -142,6 +142,9 @@ int __init mx35_clocks_init()
142 142
143 clk[nfc_div] = imx_clk_divider("nfc_div", "ahb", base + MX35_CCM_PDR4, 28, 4); 143 clk[nfc_div] = imx_clk_divider("nfc_div", "ahb", base + MX35_CCM_PDR4, 28, 4);
144 144
145 clk[csi_sel] = imx_clk_mux("csi_sel", base + MX35_CCM_PDR2, 7, 1, std_sel, ARRAY_SIZE(std_sel));
146 clk[csi_div] = imx_clk_divider("csi_div", "csi_sel", base + MX35_CCM_PDR2, 16, 6);
147
145 clk[asrc_gate] = imx_clk_gate2("asrc_gate", "ipg", base + MX35_CCM_CGR0, 0); 148 clk[asrc_gate] = imx_clk_gate2("asrc_gate", "ipg", base + MX35_CCM_CGR0, 0);
146 clk[pata_gate] = imx_clk_gate2("pata_gate", "ipg", base + MX35_CCM_CGR0, 2); 149 clk[pata_gate] = imx_clk_gate2("pata_gate", "ipg", base + MX35_CCM_CGR0, 2);
147 clk[audmux_gate] = imx_clk_gate2("audmux_gate", "ipg", base + MX35_CCM_CGR0, 4); 150 clk[audmux_gate] = imx_clk_gate2("audmux_gate", "ipg", base + MX35_CCM_CGR0, 4);
@@ -192,7 +195,7 @@ int __init mx35_clocks_init()
192 clk[max_gate] = imx_clk_gate2("max_gate", "dummy", base + MX35_CCM_CGR2, 26); 195 clk[max_gate] = imx_clk_gate2("max_gate", "dummy", base + MX35_CCM_CGR2, 26);
193 clk[admux_gate] = imx_clk_gate2("admux_gate", "ipg", base + MX35_CCM_CGR2, 30); 196 clk[admux_gate] = imx_clk_gate2("admux_gate", "ipg", base + MX35_CCM_CGR2, 30);
194 197
195 clk[csi_gate] = imx_clk_gate2("csi_gate", "ipg", base + MX35_CCM_CGR3, 0); 198 clk[csi_gate] = imx_clk_gate2("csi_gate", "csi_div", base + MX35_CCM_CGR3, 0);
196 clk[iim_gate] = imx_clk_gate2("iim_gate", "ipg", base + MX35_CCM_CGR3, 2); 199 clk[iim_gate] = imx_clk_gate2("iim_gate", "ipg", base + MX35_CCM_CGR3, 2);
197 clk[gpu2d_gate] = imx_clk_gate2("gpu2d_gate", "ahb", base + MX35_CCM_CGR3, 4); 200 clk[gpu2d_gate] = imx_clk_gate2("gpu2d_gate", "ahb", base + MX35_CCM_CGR3, 4);
198 201
@@ -228,6 +231,7 @@ int __init mx35_clocks_init()
228 clk_register_clkdev(clk[i2c3_gate], NULL, "imx-i2c.2"); 231 clk_register_clkdev(clk[i2c3_gate], NULL, "imx-i2c.2");
229 clk_register_clkdev(clk[ipu_gate], NULL, "ipu-core"); 232 clk_register_clkdev(clk[ipu_gate], NULL, "ipu-core");
230 clk_register_clkdev(clk[ipu_gate], NULL, "mx3_sdc_fb"); 233 clk_register_clkdev(clk[ipu_gate], NULL, "mx3_sdc_fb");
234 clk_register_clkdev(clk[kpp_gate], NULL, "imx-keypad");
231 clk_register_clkdev(clk[owire_gate], NULL, "mxc_w1"); 235 clk_register_clkdev(clk[owire_gate], NULL, "mxc_w1");
232 clk_register_clkdev(clk[sdma_gate], NULL, "imx35-sdma"); 236 clk_register_clkdev(clk[sdma_gate], NULL, "imx35-sdma");
233 clk_register_clkdev(clk[ssi1_gate], NULL, "imx-ssi.0"); 237 clk_register_clkdev(clk[ssi1_gate], NULL, "imx-ssi.0");
@@ -253,6 +257,7 @@ int __init mx35_clocks_init()
253 clk_register_clkdev(clk[usbotg_gate], "ahb", "fsl-usb2-udc"); 257 clk_register_clkdev(clk[usbotg_gate], "ahb", "fsl-usb2-udc");
254 clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0"); 258 clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0");
255 clk_register_clkdev(clk[nfc_div], NULL, "mxc_nand.0"); 259 clk_register_clkdev(clk[nfc_div], NULL, "mxc_nand.0");
260 clk_register_clkdev(clk[csi_gate], NULL, "mx3-camera.0");
256 261
257 clk_prepare_enable(clk[spba_gate]); 262 clk_prepare_enable(clk[spba_gate]);
258 clk_prepare_enable(clk[gpio1_gate]); 263 clk_prepare_enable(clk[gpio1_gate]);