9 files changed, 197 insertions, 5 deletions

diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index d2f6b362b6dd..b09b027178f3 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -24,6 +24,12 @@ obj-$(CONFIG_SMP)		+= platsmp.o headsmp.o
 
 obj-$(CONFIG_HOTPLUG_CPU)       += hotplug.o
 
+obj-$(CONFIG_ARCH_EXYNOS)       += exynos-smc.o
+obj-$(CONFIG_ARCH_EXYNOS)       += firmware.o
+
+plus_sec := $(call as-instr,.arch_extension sec,+sec)
+AFLAGS_exynos-smc.o             :=-Wa,-march=armv7-a$(plus_sec)
+
 # machine support
 
 obj-$(CONFIG_MACH_SMDKC210)             += mach-smdkv310.o
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index b35c60059bb8..46089fe24705 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -233,6 +233,33 @@ static struct map_desc exynos4_iodesc1[] __initdata = {
         },
 };
 
+static struct map_desc exynos4210_iodesc[] __initdata = {
+        {
+                .virtual        = (unsigned long)S5P_VA_SYSRAM_NS,
+                .pfn            = __phys_to_pfn(EXYNOS4210_PA_SYSRAM_NS),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        },
+};
+
+static struct map_desc exynos4x12_iodesc[] __initdata = {
+        {
+                .virtual        = (unsigned long)S5P_VA_SYSRAM_NS,
+                .pfn            = __phys_to_pfn(EXYNOS4x12_PA_SYSRAM_NS),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        },
+};
+
+static struct map_desc exynos5250_iodesc[] __initdata = {
+        {
+                .virtual        = (unsigned long)S5P_VA_SYSRAM_NS,
+                .pfn            = __phys_to_pfn(EXYNOS5250_PA_SYSRAM_NS),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        },
+};
+
 static struct map_desc exynos5_iodesc[] __initdata = {
         {
                 .virtual        = (unsigned long)S3C_VA_SYS,
@@ -361,6 +388,11 @@ static void __init exynos4_map_io(void)
         else
                 iotable_init(exynos4_iodesc1, ARRAY_SIZE(exynos4_iodesc1));
 
+        if (soc_is_exynos4210())
+                iotable_init(exynos4210_iodesc, ARRAY_SIZE(exynos4210_iodesc));
+        if (soc_is_exynos4212() || soc_is_exynos4412())
+                iotable_init(exynos4x12_iodesc, ARRAY_SIZE(exynos4x12_iodesc));
+
         /* initialize device information early */
         exynos4_default_sdhci0();
         exynos4_default_sdhci1();
@@ -393,6 +425,9 @@ static void __init exynos4_map_io(void)
 static void __init exynos5_map_io(void)
 {
         iotable_init(exynos5_iodesc, ARRAY_SIZE(exynos5_iodesc));
+
+        if (soc_is_exynos5250())
+                iotable_init(exynos5250_iodesc, ARRAY_SIZE(exynos5250_iodesc));
 }
 
 static void __init exynos5440_map_io(void)
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
index cb89ab886950..b17448c1a164 100644
--- a/arch/arm/mach-exynos/common.h
+++ b/arch/arm/mach-exynos/common.h
@@ -30,6 +30,8 @@ void exynos_init_late(void);
 void exynos4_clk_init(struct device_node *np);
 void exynos4_clk_register_fixed_ext(unsigned long, unsigned long);
 
+void exynos_firmware_init(void);
+
 #ifdef CONFIG_PM_GENERIC_DOMAINS
 int exynos_pm_late_initcall(void);
 #else
diff --git a/arch/arm/mach-exynos/exynos-smc.S b/arch/arm/mach-exynos/exynos-smc.S
new file mode 100644
index 000000000000..2e27aa3813fd
--- /dev/null
+++ b/arch/arm/mach-exynos/exynos-smc.S
@@ -0,0 +1,22 @@
+/*
+ * Copyright (C) 2012 Samsung Electronics.
+ *
+ * Copied from omap-smc.S Copyright (C) 2010 Texas Instruments, Inc.
+ *
+ * This program is free software,you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/linkage.h>
+
+/*
+ * Function signature: void exynos_smc(u32 cmd, u32 arg1, u32 arg2, u32 arg3)
+ */
+
+ENTRY(exynos_smc)
+        stmfd   sp!, {r4-r11, lr}
+        dsb
+        smc     #0
+        ldmfd   sp!, {r4-r11, pc}
+ENDPROC(exynos_smc)
diff --git a/arch/arm/mach-exynos/firmware.c b/arch/arm/mach-exynos/firmware.c
new file mode 100644
index 000000000000..ed11f100d479
--- /dev/null
+++ b/arch/arm/mach-exynos/firmware.c
@@ -0,0 +1,70 @@
+/*
+ * Copyright (C) 2012 Samsung Electronics.
+ * Kyungmin Park <kyungmin.park@samsung.com>
+ * Tomasz Figa <t.figa@samsung.com>
+ *
+ * This program is free software,you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/io.h>
+#include <linux/init.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+
+#include <asm/firmware.h>
+
+#include <mach/map.h>
+
+#include "smc.h"
+
+static int exynos_do_idle(void)
+{
+        exynos_smc(SMC_CMD_SLEEP, 0, 0, 0);
+        return 0;
+}
+
+static int exynos_cpu_boot(int cpu)
+{
+        exynos_smc(SMC_CMD_CPU1BOOT, cpu, 0, 0);
+        return 0;
+}
+
+static int exynos_set_cpu_boot_addr(int cpu, unsigned long boot_addr)
+{
+        void __iomem *boot_reg = S5P_VA_SYSRAM_NS + 0x1c + 4*cpu;
+
+        __raw_writel(boot_addr, boot_reg);
+        return 0;
+}
+
+static const struct firmware_ops exynos_firmware_ops = {
+        .do_idle                = exynos_do_idle,
+        .set_cpu_boot_addr      = exynos_set_cpu_boot_addr,
+        .cpu_boot               = exynos_cpu_boot,
+};
+
+void __init exynos_firmware_init(void)
+{
+        if (of_have_populated_dt()) {
+                struct device_node *nd;
+                const __be32 *addr;
+
+                nd = of_find_compatible_node(NULL, NULL,
+                                                "samsung,secure-firmware");
+                if (!nd)
+                        return;
+
+                addr = of_get_address(nd, 0, NULL, NULL);
+                if (!addr) {
+                        pr_err("%s: No address specified.\n", __func__);
+                        return;
+                }
+        }
+
+        pr_info("Running under secure firmware.\n");
+
+        register_firmware_ops(&exynos_firmware_ops);
+}
diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h
index 7f99b7b187d6..99e0a79f3b1f 100644
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -26,6 +26,9 @@
 #define EXYNOS4_PA_SYSRAM0              0x02025000
 #define EXYNOS4_PA_SYSRAM1              0x02020000
 #define EXYNOS5_PA_SYSRAM               0x02020000
+#define EXYNOS4210_PA_SYSRAM_NS         0x0203F000
+#define EXYNOS4x12_PA_SYSRAM_NS         0x0204F000
+#define EXYNOS5250_PA_SYSRAM_NS         0x0204F000
 
 #define EXYNOS4_PA_FIMC0                0x11800000
 #define EXYNOS4_PA_FIMC1                0x11810000
diff --git a/arch/arm/mach-exynos/mach-exynos4-dt.c b/arch/arm/mach-exynos/mach-exynos4-dt.c
index ac27f3cd121f..b9ed834a7eee 100644
--- a/arch/arm/mach-exynos/mach-exynos4-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos4-dt.c
@@ -57,6 +57,7 @@ DT_MACHINE_START(EXYNOS4210_DT, "Samsung Exynos4 (Flattened Device Tree)")
         .smp            = smp_ops(exynos_smp_ops),
         .init_irq       = exynos4_init_irq,
         .map_io         = exynos4_dt_map_io,
+        .init_early     = exynos_firmware_init,
         .init_machine   = exynos4_dt_machine_init,
         .init_late      = exynos_init_late,
         .init_time      = exynos_init_time,
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index 95e04bd5813f..a0e8ff7758a4 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -24,6 +24,7 @@
 #include <asm/cacheflush.h>
 #include <asm/smp_plat.h>
 #include <asm/smp_scu.h>
+#include <asm/firmware.h>
 
 #include <mach/hardware.h>
 #include <mach/regs-clock.h>
@@ -137,10 +138,21 @@ static int __cpuinit exynos_boot_secondary(unsigned int cpu, struct task_struct
 
         timeout = jiffies + (1 * HZ);
         while (time_before(jiffies, timeout)) {
+                unsigned long boot_addr;
+
                 smp_rmb();
 
-                __raw_writel(virt_to_phys(exynos4_secondary_startup),
-                                                        cpu_boot_reg(phys_cpu));
+                boot_addr = virt_to_phys(exynos4_secondary_startup);
+
+                /*
+                 * Try to set boot address using firmware first
+                 * and fall back to boot register if it fails.
+                 */
+                if (call_firmware_op(set_cpu_boot_addr, phys_cpu, boot_addr))
+                        __raw_writel(boot_addr, cpu_boot_reg(phys_cpu));
+
+                call_firmware_op(cpu_boot, phys_cpu);
+
                 arch_send_wakeup_ipi_mask(cpumask_of(cpu));
 
                 if (pen_release == -1)
@@ -196,10 +208,20 @@ static void __init exynos_smp_prepare_cpus(unsigned int max_cpus)
          * system-wide flags register. The boot monitor waits
          * until it receives a soft interrupt, and then the
          * secondary CPU branches to this address.
+         *
+         * Try using firmware operation first and fall back to
+         * boot register if it fails.
          */
-        for (i = 1; i < max_cpus; ++i)
-                __raw_writel(virt_to_phys(exynos4_secondary_startup),
-                                        cpu_boot_reg(cpu_logical_map(i)));
+        for (i = 1; i < max_cpus; ++i) {
+                unsigned long phys_cpu;
+                unsigned long boot_addr;
+
+                phys_cpu = cpu_logical_map(i);
+                boot_addr = virt_to_phys(exynos4_secondary_startup);
+
+                if (call_firmware_op(set_cpu_boot_addr, phys_cpu, boot_addr))
+                        __raw_writel(boot_addr, cpu_boot_reg(phys_cpu));
+        }
 }
 
 struct smp_operations exynos_smp_ops __initdata = {
diff --git a/arch/arm/mach-exynos/smc.h b/arch/arm/mach-exynos/smc.h
new file mode 100644
index 000000000000..13a1dc8ecbf2
--- /dev/null
+++ b/arch/arm/mach-exynos/smc.h
@@ -0,0 +1,31 @@
+/*
+ *  Copyright (c) 2012 Samsung Electronics.
+ *
+ * EXYNOS - SMC Call
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ASM_ARCH_EXYNOS_SMC_H
+#define __ASM_ARCH_EXYNOS_SMC_H
+
+#define SMC_CMD_INIT            (-1)
+#define SMC_CMD_INFO            (-2)
+/* For Power Management */
+#define SMC_CMD_SLEEP           (-3)
+#define SMC_CMD_CPU1BOOT        (-4)
+#define SMC_CMD_CPU0AFTR        (-5)
+/* For CP15 Access */
+#define SMC_CMD_C15RESUME       (-11)
+/* For L2 Cache Access */
+#define SMC_CMD_L2X0CTRL        (-21)
+#define SMC_CMD_L2X0SETUP1      (-22)
+#define SMC_CMD_L2X0SETUP2      (-23)
+#define SMC_CMD_L2X0INVALL      (-24)
+#define SMC_CMD_L2X0DEBUG       (-25)
+
+extern void exynos_smc(u32 cmd, u32 arg1, u32 arg2, u32 arg3);
+
+#endif