1 files changed, 22 insertions, 10 deletions

diff --git a/arch/arm/mach-exynos/mcpm-exynos.c b/arch/arm/mach-exynos/mcpm-exynos.c
index dc9a764a7c37..b0d3c2e876fb 100644
--- a/arch/arm/mach-exynos/mcpm-exynos.c
+++ b/arch/arm/mach-exynos/mcpm-exynos.c
@@ -15,6 +15,7 @@
 #include <linux/delay.h>
 #include <linux/io.h>
 #include <linux/of_address.h>
+#include <linux/syscore_ops.h>
 
 #include <asm/cputype.h>
 #include <asm/cp15.h>
@@ -30,6 +31,8 @@
 #define EXYNOS5420_USE_ARM_CORE_DOWN_STATE      BIT(29)
 #define EXYNOS5420_USE_L2_COMMON_UP_STATE       BIT(30)
 
+static void __iomem *ns_sram_base_addr;
+
 /*
  * The common v7_exit_coherency_flush API could not be used because of the
  * Erratum 799270 workaround. This macro is the same as the common one (in
@@ -318,10 +321,26 @@ static const struct of_device_id exynos_dt_mcpm_match[] = {
         {},
 };
 
+static void exynos_mcpm_setup_entry_point(void)
+{
+        /*
+         * U-Boot SPL is hardcoded to jump to the start of ns_sram_base_addr
+         * as part of secondary_cpu_start().  Let's redirect it to the
+         * mcpm_entry_point(). This is done during both secondary boot-up as
+         * well as system resume.
+         */
+        __raw_writel(0xe59f0000, ns_sram_base_addr);     /* ldr r0, [pc, #0] */
+        __raw_writel(0xe12fff10, ns_sram_base_addr + 4); /* bx  r0 */
+        __raw_writel(virt_to_phys(mcpm_entry_point), ns_sram_base_addr + 8);
+}
+
+static struct syscore_ops exynos_mcpm_syscore_ops = {
+        .resume = exynos_mcpm_setup_entry_point,
+};
+
 static int __init exynos_mcpm_init(void)
 {
         struct device_node *node;
-        void __iomem *ns_sram_base_addr;
         unsigned int value, i;
         int ret;
 
@@ -387,16 +406,9 @@ static int __init exynos_mcpm_init(void)
                 pmu_raw_writel(value, EXYNOS_COMMON_OPTION(i));
         }
 
-        /*
-         * U-Boot SPL is hardcoded to jump to the start of ns_sram_base_addr
-         * as part of secondary_cpu_start().  Let's redirect it to the
-         * mcpm_entry_point().
-         */
-        __raw_writel(0xe59f0000, ns_sram_base_addr);     /* ldr r0, [pc, #0] */
-        __raw_writel(0xe12fff10, ns_sram_base_addr + 4); /* bx  r0 */
-        __raw_writel(virt_to_phys(mcpm_entry_point), ns_sram_base_addr + 8);
+        exynos_mcpm_setup_entry_point();
 
-        iounmap(ns_sram_base_addr);
+        register_syscore_ops(&exynos_mcpm_syscore_ops);
 
         return ret;
 }