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-rw-r--r--arch/arm/mach-exynos/init.c21
1 files changed, 3 insertions, 18 deletions
diff --git a/arch/arm/mach-exynos/init.c b/arch/arm/mach-exynos/init.c
index a8a83e3881a4..5b35978029be 100644
--- a/arch/arm/mach-exynos/init.c
+++ b/arch/arm/mach-exynos/init.c
@@ -14,29 +14,14 @@
14#include <plat/devs.h> 14#include <plat/devs.h>
15#include <plat/regs-serial.h> 15#include <plat/regs-serial.h>
16 16
17static struct s3c24xx_uart_clksrc exynos4_serial_clocks[] = {
18 [0] = {
19 .name = "uclk1",
20 .divisor = 1,
21 .min_baud = 0,
22 .max_baud = 0,
23 },
24};
25
26/* uart registration process */ 17/* uart registration process */
27void __init exynos4_common_init_uarts(struct s3c2410_uartcfg *cfg, int no) 18void __init exynos4_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
28{ 19{
29 struct s3c2410_uartcfg *tcfg = cfg; 20 struct s3c2410_uartcfg *tcfg = cfg;
30 u32 ucnt; 21 u32 ucnt;
31 22
32 for (ucnt = 0; ucnt < no; ucnt++, tcfg++) { 23 for (ucnt = 0; ucnt < no; ucnt++, tcfg++)
33 if (!tcfg->clocks) { 24 tcfg->has_fracval = 1;
34 tcfg->has_fracval = 1;
35 tcfg->clocks = exynos4_serial_clocks;
36 tcfg->clocks_size = ARRAY_SIZE(exynos4_serial_clocks);
37 }
38 tcfg->flags |= NO_NEED_CHECK_CLKSRC;
39 }
40 25
41 s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no); 26 s3c24xx_init_uartdevs("exynos4210-uart", s5p_uart_resources, cfg, no);
42} 27}