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Diffstat (limited to 'arch/arm/mach-exynos/include/mach/map.h')
-rw-r--r--arch/arm/mach-exynos/include/mach/map.h45
1 files changed, 43 insertions, 2 deletions
diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h
index e009a66477f4..ca4aa89aa46b 100644
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -34,6 +34,9 @@
34 34
35#define EXYNOS4_PA_JPEG 0x11840000 35#define EXYNOS4_PA_JPEG 0x11840000
36 36
37/* x = 0...1 */
38#define EXYNOS4_PA_FIMC_LITE(x) (0x12390000 + ((x) * 0x10000))
39
37#define EXYNOS4_PA_G2D 0x12800000 40#define EXYNOS4_PA_G2D 0x12800000
38 41
39#define EXYNOS4_PA_I2S0 0x03830000 42#define EXYNOS4_PA_I2S0 0x03830000
@@ -78,8 +81,8 @@
78 81
79#define EXYNOS4_PA_GIC_CPU 0x10480000 82#define EXYNOS4_PA_GIC_CPU 0x10480000
80#define EXYNOS4_PA_GIC_DIST 0x10490000 83#define EXYNOS4_PA_GIC_DIST 0x10490000
81#define EXYNOS5_PA_GIC_CPU 0x10480000 84#define EXYNOS5_PA_GIC_CPU 0x10482000
82#define EXYNOS5_PA_GIC_DIST 0x10490000 85#define EXYNOS5_PA_GIC_DIST 0x10481000
83 86
84#define EXYNOS4_PA_COREPERI 0x10500000 87#define EXYNOS4_PA_COREPERI 0x10500000
85#define EXYNOS4_PA_TWD 0x10500600 88#define EXYNOS4_PA_TWD 0x10500600
@@ -95,6 +98,7 @@
95#define EXYNOS5_PA_PDMA1 0x121B0000 98#define EXYNOS5_PA_PDMA1 0x121B0000
96 99
97#define EXYNOS4_PA_SYSMMU_MDMA 0x10A40000 100#define EXYNOS4_PA_SYSMMU_MDMA 0x10A40000
101#define EXYNOS4_PA_SYSMMU_2D_ACP 0x10A40000
98#define EXYNOS4_PA_SYSMMU_SSS 0x10A50000 102#define EXYNOS4_PA_SYSMMU_SSS 0x10A50000
99#define EXYNOS4_PA_SYSMMU_FIMC0 0x11A20000 103#define EXYNOS4_PA_SYSMMU_FIMC0 0x11A20000
100#define EXYNOS4_PA_SYSMMU_FIMC1 0x11A30000 104#define EXYNOS4_PA_SYSMMU_FIMC1 0x11A30000
@@ -103,6 +107,12 @@
103#define EXYNOS4_PA_SYSMMU_JPEG 0x11A60000 107#define EXYNOS4_PA_SYSMMU_JPEG 0x11A60000
104#define EXYNOS4_PA_SYSMMU_FIMD0 0x11E20000 108#define EXYNOS4_PA_SYSMMU_FIMD0 0x11E20000
105#define EXYNOS4_PA_SYSMMU_FIMD1 0x12220000 109#define EXYNOS4_PA_SYSMMU_FIMD1 0x12220000
110#define EXYNOS4_PA_SYSMMU_FIMC_ISP 0x12260000
111#define EXYNOS4_PA_SYSMMU_FIMC_DRC 0x12270000
112#define EXYNOS4_PA_SYSMMU_FIMC_FD 0x122A0000
113#define EXYNOS4_PA_SYSMMU_ISPCPU 0x122B0000
114#define EXYNOS4_PA_SYSMMU_FIMC_LITE0 0x123B0000
115#define EXYNOS4_PA_SYSMMU_FIMC_LITE1 0x123C0000
106#define EXYNOS4_PA_SYSMMU_PCIe 0x12620000 116#define EXYNOS4_PA_SYSMMU_PCIe 0x12620000
107#define EXYNOS4_PA_SYSMMU_G2D 0x12A20000 117#define EXYNOS4_PA_SYSMMU_G2D 0x12A20000
108#define EXYNOS4_PA_SYSMMU_ROTATOR 0x12A30000 118#define EXYNOS4_PA_SYSMMU_ROTATOR 0x12A30000
@@ -110,6 +120,37 @@
110#define EXYNOS4_PA_SYSMMU_TV 0x12E20000 120#define EXYNOS4_PA_SYSMMU_TV 0x12E20000
111#define EXYNOS4_PA_SYSMMU_MFC_L 0x13620000 121#define EXYNOS4_PA_SYSMMU_MFC_L 0x13620000
112#define EXYNOS4_PA_SYSMMU_MFC_R 0x13630000 122#define EXYNOS4_PA_SYSMMU_MFC_R 0x13630000
123
124#define EXYNOS5_PA_SYSMMU_MDMA1 0x10A40000
125#define EXYNOS5_PA_SYSMMU_SSS 0x10A50000
126#define EXYNOS5_PA_SYSMMU_2D 0x10A60000
127#define EXYNOS5_PA_SYSMMU_MFC_L 0x11200000
128#define EXYNOS5_PA_SYSMMU_MFC_R 0x11210000
129#define EXYNOS5_PA_SYSMMU_ROTATOR 0x11D40000
130#define EXYNOS5_PA_SYSMMU_MDMA2 0x11D50000
131#define EXYNOS5_PA_SYSMMU_JPEG 0x11F20000
132#define EXYNOS5_PA_SYSMMU_IOP 0x12360000
133#define EXYNOS5_PA_SYSMMU_RTIC 0x12370000
134#define EXYNOS5_PA_SYSMMU_GPS 0x12630000
135#define EXYNOS5_PA_SYSMMU_ISP 0x13260000
136#define EXYNOS5_PA_SYSMMU_DRC 0x12370000
137#define EXYNOS5_PA_SYSMMU_SCALERC 0x13280000
138#define EXYNOS5_PA_SYSMMU_SCALERP 0x13290000
139#define EXYNOS5_PA_SYSMMU_FD 0x132A0000
140#define EXYNOS5_PA_SYSMMU_ISPCPU 0x132B0000
141#define EXYNOS5_PA_SYSMMU_ODC 0x132C0000
142#define EXYNOS5_PA_SYSMMU_DIS0 0x132D0000
143#define EXYNOS5_PA_SYSMMU_DIS1 0x132E0000
144#define EXYNOS5_PA_SYSMMU_3DNR 0x132F0000
145#define EXYNOS5_PA_SYSMMU_LITE0 0x13C40000
146#define EXYNOS5_PA_SYSMMU_LITE1 0x13C50000
147#define EXYNOS5_PA_SYSMMU_GSC0 0x13E80000
148#define EXYNOS5_PA_SYSMMU_GSC1 0x13E90000
149#define EXYNOS5_PA_SYSMMU_GSC2 0x13EA0000
150#define EXYNOS5_PA_SYSMMU_GSC3 0x13EB0000
151#define EXYNOS5_PA_SYSMMU_FIMD1 0x14640000
152#define EXYNOS5_PA_SYSMMU_TV 0x14650000
153
113#define EXYNOS4_PA_SPI0 0x13920000 154#define EXYNOS4_PA_SPI0 0x13920000
114#define EXYNOS4_PA_SPI1 0x13930000 155#define EXYNOS4_PA_SPI1 0x13930000
115#define EXYNOS4_PA_SPI2 0x13940000 156#define EXYNOS4_PA_SPI2 0x13940000