diff options
Diffstat (limited to 'arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h')
-rw-r--r-- | arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h | 36 |
1 files changed, 31 insertions, 5 deletions
diff --git a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h index 49b256b3ddfc..087d22b8f351 100644 --- a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h +++ b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h | |||
@@ -175,11 +175,37 @@ | |||
175 | #define EP93XX_SYSCON_STANDBY EP93XX_SYSCON_REG(0x0c) | 175 | #define EP93XX_SYSCON_STANDBY EP93XX_SYSCON_REG(0x0c) |
176 | #define EP93XX_SYSCON_CLOCK_SET1 EP93XX_SYSCON_REG(0x20) | 176 | #define EP93XX_SYSCON_CLOCK_SET1 EP93XX_SYSCON_REG(0x20) |
177 | #define EP93XX_SYSCON_CLOCK_SET2 EP93XX_SYSCON_REG(0x24) | 177 | #define EP93XX_SYSCON_CLOCK_SET2 EP93XX_SYSCON_REG(0x24) |
178 | #define EP93XX_SYSCON_DEVICE_CONFIG EP93XX_SYSCON_REG(0x80) | 178 | #define EP93XX_SYSCON_DEVCFG EP93XX_SYSCON_REG(0x80) |
179 | #define EP93XX_SYSCON_DEVICE_CONFIG_U3EN (1<<24) | 179 | #define EP93XX_SYSCON_DEVCFG_SWRST (1<<31) |
180 | #define EP93XX_SYSCON_DEVICE_CONFIG_CRUNCH_ENABLE (1<<23) | 180 | #define EP93XX_SYSCON_DEVCFG_D1ONG (1<<30) |
181 | #define EP93XX_SYSCON_DEVICE_CONFIG_U2EN (1<<20) | 181 | #define EP93XX_SYSCON_DEVCFG_D0ONG (1<<29) |
182 | #define EP93XX_SYSCON_DEVICE_CONFIG_U1EN (1<<18) | 182 | #define EP93XX_SYSCON_DEVCFG_IONU2 (1<<28) |
183 | #define EP93XX_SYSCON_DEVCFG_GONK (1<<27) | ||
184 | #define EP93XX_SYSCON_DEVCFG_TONG (1<<26) | ||
185 | #define EP93XX_SYSCON_DEVCFG_MONG (1<<25) | ||
186 | #define EP93XX_SYSCON_DEVCFG_U3EN (1<<24) | ||
187 | #define EP93XX_SYSCON_DEVCFG_CPENA (1<<23) | ||
188 | #define EP93XX_SYSCON_DEVCFG_A2ONG (1<<22) | ||
189 | #define EP93XX_SYSCON_DEVCFG_A1ONG (1<<21) | ||
190 | #define EP93XX_SYSCON_DEVCFG_U2EN (1<<20) | ||
191 | #define EP93XX_SYSCON_DEVCFG_EXVC (1<<19) | ||
192 | #define EP93XX_SYSCON_DEVCFG_U1EN (1<<18) | ||
193 | #define EP93XX_SYSCON_DEVCFG_TIN (1<<17) | ||
194 | #define EP93XX_SYSCON_DEVCFG_HC3IN (1<<15) | ||
195 | #define EP93XX_SYSCON_DEVCFG_HC3EN (1<<14) | ||
196 | #define EP93XX_SYSCON_DEVCFG_HC1IN (1<<13) | ||
197 | #define EP93XX_SYSCON_DEVCFG_HC1EN (1<<12) | ||
198 | #define EP93XX_SYSCON_DEVCFG_HONIDE (1<<11) | ||
199 | #define EP93XX_SYSCON_DEVCFG_GONIDE (1<<10) | ||
200 | #define EP93XX_SYSCON_DEVCFG_PONG (1<<9) | ||
201 | #define EP93XX_SYSCON_DEVCFG_EONIDE (1<<8) | ||
202 | #define EP93XX_SYSCON_DEVCFG_I2SONSSP (1<<7) | ||
203 | #define EP93XX_SYSCON_DEVCFG_I2SONAC97 (1<<6) | ||
204 | #define EP93XX_SYSCON_DEVCFG_RASONP3 (1<<4) | ||
205 | #define EP93XX_SYSCON_DEVCFG_RAS (1<<3) | ||
206 | #define EP93XX_SYSCON_DEVCFG_ADCPD (1<<2) | ||
207 | #define EP93XX_SYSCON_DEVCFG_KEYS (1<<1) | ||
208 | #define EP93XX_SYSCON_DEVCFG_SHENA (1<<0) | ||
183 | #define EP93XX_SYSCON_SWLOCK EP93XX_SYSCON_REG(0xc0) | 209 | #define EP93XX_SYSCON_SWLOCK EP93XX_SYSCON_REG(0xc0) |
184 | 210 | ||
185 | #define EP93XX_WATCHDOG_BASE EP93XX_APB_IOMEM(0x00140000) | 211 | #define EP93XX_WATCHDOG_BASE EP93XX_APB_IOMEM(0x00140000) |