1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/mach-dove/include/mach/dove.h b/arch/arm/mach-dove/include/mach/dove.h
index cccfd1d45f4c..735dd2ef3931 100644
--- a/arch/arm/mach-dove/include/mach/dove.h
+++ b/arch/arm/mach-dove/include/mach/dove.h
@@ -25,7 +25,7 @@
 */
 #define DOVE_CESA_PHYS_BASE             0xc8000000
-#define DOVE_CESA_VIRT_BASE             0xfdb00000
+#define DOVE_CESA_VIRT_BASE             IOMEM(0xfdb00000)
 #define DOVE_CESA_SIZE                  SZ_1M
 #define DOVE_PCIE0_MEM_PHYS_BASE        0xe0000000
@@ -38,24 +38,24 @@
 #define DOVE_BOOTROM_SIZE               SZ_128M
 #define DOVE_SCRATCHPAD_PHYS_BASE       0xf0000000
-#define DOVE_SCRATCHPAD_VIRT_BASE       0xfdd00000
+#define DOVE_SCRATCHPAD_VIRT_BASE       IOMEM(0xfdd00000)
 #define DOVE_SCRATCHPAD_SIZE            SZ_1M
 #define DOVE_SB_REGS_PHYS_BASE          0xf1000000
-#define DOVE_SB_REGS_VIRT_BASE          0xfde00000
+#define DOVE_SB_REGS_VIRT_BASE          IOMEM(0xfde00000)
 #define DOVE_SB_REGS_SIZE               SZ_8M
 #define DOVE_NB_REGS_PHYS_BASE          0xf1800000
-#define DOVE_NB_REGS_VIRT_BASE          0xfe600000
+#define DOVE_NB_REGS_VIRT_BASE          IOMEM(0xfe600000)
 #define DOVE_NB_REGS_SIZE               SZ_8M
 #define DOVE_PCIE0_IO_PHYS_BASE         0xf2000000
-#define DOVE_PCIE0_IO_VIRT_BASE         0xfee00000
+#define DOVE_PCIE0_IO_VIRT_BASE         IOMEM(0xfee00000)
 #define DOVE_PCIE0_IO_BUS_BASE          0x00000000
 #define DOVE_PCIE0_IO_SIZE              SZ_1M
 #define DOVE_PCIE1_IO_PHYS_BASE         0xf2100000
-#define DOVE_PCIE1_IO_VIRT_BASE         0xfef00000
+#define DOVE_PCIE1_IO_VIRT_BASE         IOMEM(0xfef00000)
 #define DOVE_PCIE1_IO_BUS_BASE          0x00100000
 #define DOVE_PCIE1_IO_SIZE              SZ_1M

diff --git a/arch/arm/mach-dove/include/mach/dove.h b/arch/arm/mach-dove/include/mach/dove.h index cccfd1d45f4c..735dd2ef3931 100644 --- a/arch/arm/mach-dove/include/mach/dove.h +++ b/arch/arm/mach-dove/include/mach/dove.h
@@ -25,7 +25,7 @@
25	*/	25	*/
26		26
27	#define DOVE_CESA_PHYS_BASE 0xc8000000	27	#define DOVE_CESA_PHYS_BASE 0xc8000000
28	#define DOVE_CESA_VIRT_BASE 0xfdb00000	28	#define DOVE_CESA_VIRT_BASE IOMEM(0xfdb00000)
29	#define DOVE_CESA_SIZE SZ_1M	29	#define DOVE_CESA_SIZE SZ_1M
30		30
31	#define DOVE_PCIE0_MEM_PHYS_BASE 0xe0000000	31	#define DOVE_PCIE0_MEM_PHYS_BASE 0xe0000000
@@ -38,24 +38,24 @@
38	#define DOVE_BOOTROM_SIZE SZ_128M	38	#define DOVE_BOOTROM_SIZE SZ_128M
39		39
40	#define DOVE_SCRATCHPAD_PHYS_BASE 0xf0000000	40	#define DOVE_SCRATCHPAD_PHYS_BASE 0xf0000000
41	#define DOVE_SCRATCHPAD_VIRT_BASE 0xfdd00000	41	#define DOVE_SCRATCHPAD_VIRT_BASE IOMEM(0xfdd00000)
42	#define DOVE_SCRATCHPAD_SIZE SZ_1M	42	#define DOVE_SCRATCHPAD_SIZE SZ_1M
43		43
44	#define DOVE_SB_REGS_PHYS_BASE 0xf1000000	44	#define DOVE_SB_REGS_PHYS_BASE 0xf1000000
45	#define DOVE_SB_REGS_VIRT_BASE 0xfde00000	45	#define DOVE_SB_REGS_VIRT_BASE IOMEM(0xfde00000)
46	#define DOVE_SB_REGS_SIZE SZ_8M	46	#define DOVE_SB_REGS_SIZE SZ_8M
47		47
48	#define DOVE_NB_REGS_PHYS_BASE 0xf1800000	48	#define DOVE_NB_REGS_PHYS_BASE 0xf1800000
49	#define DOVE_NB_REGS_VIRT_BASE 0xfe600000	49	#define DOVE_NB_REGS_VIRT_BASE IOMEM(0xfe600000)
50	#define DOVE_NB_REGS_SIZE SZ_8M	50	#define DOVE_NB_REGS_SIZE SZ_8M
51		51
52	#define DOVE_PCIE0_IO_PHYS_BASE 0xf2000000	52	#define DOVE_PCIE0_IO_PHYS_BASE 0xf2000000
53	#define DOVE_PCIE0_IO_VIRT_BASE 0xfee00000	53	#define DOVE_PCIE0_IO_VIRT_BASE IOMEM(0xfee00000)
54	#define DOVE_PCIE0_IO_BUS_BASE 0x00000000	54	#define DOVE_PCIE0_IO_BUS_BASE 0x00000000
55	#define DOVE_PCIE0_IO_SIZE SZ_1M	55	#define DOVE_PCIE0_IO_SIZE SZ_1M
56		56
57	#define DOVE_PCIE1_IO_PHYS_BASE 0xf2100000	57	#define DOVE_PCIE1_IO_PHYS_BASE 0xf2100000
58	#define DOVE_PCIE1_IO_VIRT_BASE 0xfef00000	58	#define DOVE_PCIE1_IO_VIRT_BASE IOMEM(0xfef00000)
59	#define DOVE_PCIE1_IO_BUS_BASE 0x00100000	59	#define DOVE_PCIE1_IO_BUS_BASE 0x00100000
60	#define DOVE_PCIE1_IO_SIZE SZ_1M	60	#define DOVE_PCIE1_IO_SIZE SZ_1M
61		61