aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-dove/common.c
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/mach-dove/common.c')
-rw-r--r--arch/arm/mach-dove/common.c120
1 files changed, 10 insertions, 110 deletions
diff --git a/arch/arm/mach-dove/common.c b/arch/arm/mach-dove/common.c
index 89f4f993cd03..c6b3b2bb50e7 100644
--- a/arch/arm/mach-dove/common.c
+++ b/arch/arm/mach-dove/common.c
@@ -8,35 +8,24 @@
8 * warranty of any kind, whether express or implied. 8 * warranty of any kind, whether express or implied.
9 */ 9 */
10 10
11#include <linux/kernel.h>
12#include <linux/delay.h>
13#include <linux/init.h>
14#include <linux/platform_device.h>
15#include <linux/pci.h>
16#include <linux/clk-provider.h> 11#include <linux/clk-provider.h>
17#include <linux/clk/mvebu.h> 12#include <linux/clk/mvebu.h>
18#include <linux/ata_platform.h> 13#include <linux/dma-mapping.h>
19#include <linux/gpio.h> 14#include <linux/init.h>
20#include <linux/of.h> 15#include <linux/of.h>
21#include <linux/of_platform.h> 16#include <linux/of_platform.h>
22#include <asm/page.h> 17#include <linux/platform_data/dma-mv_xor.h>
23#include <asm/setup.h> 18#include <linux/platform_data/usb-ehci-orion.h>
24#include <asm/timex.h> 19#include <linux/platform_device.h>
25#include <asm/hardware/cache-tauros2.h> 20#include <asm/hardware/cache-tauros2.h>
21#include <asm/mach/arch.h>
26#include <asm/mach/map.h> 22#include <asm/mach/map.h>
27#include <asm/mach/time.h> 23#include <asm/mach/time.h>
28#include <asm/mach/pci.h>
29#include <mach/dove.h>
30#include <mach/pm.h>
31#include <mach/bridge-regs.h> 24#include <mach/bridge-regs.h>
32#include <asm/mach/arch.h> 25#include <mach/pm.h>
33#include <linux/irq.h>
34#include <plat/time.h>
35#include <linux/platform_data/usb-ehci-orion.h>
36#include <linux/platform_data/dma-mv_xor.h>
37#include <plat/irq.h>
38#include <plat/common.h> 26#include <plat/common.h>
39#include <plat/addr-map.h> 27#include <plat/irq.h>
28#include <plat/time.h>
40#include "common.h" 29#include "common.h"
41 30
42/***************************************************************************** 31/*****************************************************************************
@@ -242,17 +231,13 @@ static int __init dove_find_tclk(void)
242 return 166666667; 231 return 166666667;
243} 232}
244 233
245static void __init dove_timer_init(void) 234void __init dove_timer_init(void)
246{ 235{
247 dove_tclk = dove_find_tclk(); 236 dove_tclk = dove_find_tclk();
248 orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR, 237 orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
249 IRQ_DOVE_BRIDGE, dove_tclk); 238 IRQ_DOVE_BRIDGE, dove_tclk);
250} 239}
251 240
252struct sys_timer dove_timer = {
253 .init = dove_timer_init,
254};
255
256/***************************************************************************** 241/*****************************************************************************
257 * Cryptographic Engines and Security Accelerator (CESA) 242 * Cryptographic Engines and Security Accelerator (CESA)
258 ****************************************************************************/ 243 ****************************************************************************/
@@ -375,88 +360,3 @@ void dove_restart(char mode, const char *cmd)
375 while (1) 360 while (1)
376 ; 361 ;
377} 362}
378
379#if defined(CONFIG_MACH_DOVE_DT)
380/*
381 * There are still devices that doesn't even know about DT,
382 * get clock gates here and add a clock lookup.
383 */
384static void __init dove_legacy_clk_init(void)
385{
386 struct device_node *np = of_find_compatible_node(NULL, NULL,
387 "marvell,dove-gating-clock");
388 struct of_phandle_args clkspec;
389
390 clkspec.np = np;
391 clkspec.args_count = 1;
392
393 clkspec.args[0] = CLOCK_GATING_BIT_USB0;
394 orion_clkdev_add(NULL, "orion-ehci.0",
395 of_clk_get_from_provider(&clkspec));
396
397 clkspec.args[0] = CLOCK_GATING_BIT_USB1;
398 orion_clkdev_add(NULL, "orion-ehci.1",
399 of_clk_get_from_provider(&clkspec));
400
401 clkspec.args[0] = CLOCK_GATING_BIT_GBE;
402 orion_clkdev_add(NULL, "mv643xx_eth_port.0",
403 of_clk_get_from_provider(&clkspec));
404
405 clkspec.args[0] = CLOCK_GATING_BIT_PCIE0;
406 orion_clkdev_add("0", "pcie",
407 of_clk_get_from_provider(&clkspec));
408
409 clkspec.args[0] = CLOCK_GATING_BIT_PCIE1;
410 orion_clkdev_add("1", "pcie",
411 of_clk_get_from_provider(&clkspec));
412}
413
414static void __init dove_of_clk_init(void)
415{
416 mvebu_clocks_init();
417 dove_legacy_clk_init();
418}
419
420static struct mv643xx_eth_platform_data dove_dt_ge00_data = {
421 .phy_addr = MV643XX_ETH_PHY_ADDR_DEFAULT,
422};
423
424static void __init dove_dt_init(void)
425{
426 pr_info("Dove 88AP510 SoC, TCLK = %d MHz.\n",
427 (dove_tclk + 499999) / 1000000);
428
429#ifdef CONFIG_CACHE_TAUROS2
430 tauros2_init(0);
431#endif
432 dove_setup_cpu_mbus();
433
434 /* Setup root of clk tree */
435 dove_of_clk_init();
436
437 /* Internal devices not ported to DT yet */
438 dove_rtc_init();
439
440 dove_ge00_init(&dove_dt_ge00_data);
441 dove_ehci0_init();
442 dove_ehci1_init();
443 dove_pcie_init(1, 1);
444
445 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
446}
447
448static const char * const dove_dt_board_compat[] = {
449 "marvell,dove",
450 NULL
451};
452
453DT_MACHINE_START(DOVE_DT, "Marvell Dove (Flattened Device Tree)")
454 .map_io = dove_map_io,
455 .init_early = dove_init_early,
456 .init_irq = orion_dt_init_irq,
457 .timer = &dove_timer,
458 .init_machine = dove_dt_init,
459 .restart = dove_restart,
460 .dt_compat = dove_dt_board_compat,
461MACHINE_END
462#endif