aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-dove/common.c
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/mach-dove/common.c')
-rw-r--r--arch/arm/mach-dove/common.c62
1 files changed, 43 insertions, 19 deletions
diff --git a/arch/arm/mach-dove/common.c b/arch/arm/mach-dove/common.c
index f723fe13d0f0..89f4f993cd03 100644
--- a/arch/arm/mach-dove/common.c
+++ b/arch/arm/mach-dove/common.c
@@ -14,6 +14,7 @@
14#include <linux/platform_device.h> 14#include <linux/platform_device.h>
15#include <linux/pci.h> 15#include <linux/pci.h>
16#include <linux/clk-provider.h> 16#include <linux/clk-provider.h>
17#include <linux/clk/mvebu.h>
17#include <linux/ata_platform.h> 18#include <linux/ata_platform.h>
18#include <linux/gpio.h> 19#include <linux/gpio.h>
19#include <linux/of.h> 20#include <linux/of.h>
@@ -32,6 +33,7 @@
32#include <linux/irq.h> 33#include <linux/irq.h>
33#include <plat/time.h> 34#include <plat/time.h>
34#include <linux/platform_data/usb-ehci-orion.h> 35#include <linux/platform_data/usb-ehci-orion.h>
36#include <linux/platform_data/dma-mv_xor.h>
35#include <plat/irq.h> 37#include <plat/irq.h>
36#include <plat/common.h> 38#include <plat/common.h>
37#include <plat/addr-map.h> 39#include <plat/addr-map.h>
@@ -123,8 +125,8 @@ static void __init dove_clk_init(void)
123 orion_clkdev_add(NULL, "mv_crypto", crypto); 125 orion_clkdev_add(NULL, "mv_crypto", crypto);
124 orion_clkdev_add(NULL, "dove-ac97", ac97); 126 orion_clkdev_add(NULL, "dove-ac97", ac97);
125 orion_clkdev_add(NULL, "dove-pdma", pdma); 127 orion_clkdev_add(NULL, "dove-pdma", pdma);
126 orion_clkdev_add(NULL, "mv_xor_shared.0", xor0); 128 orion_clkdev_add(NULL, MV_XOR_NAME ".0", xor0);
127 orion_clkdev_add(NULL, "mv_xor_shared.1", xor1); 129 orion_clkdev_add(NULL, MV_XOR_NAME ".1", xor1);
128} 130}
129 131
130/***************************************************************************** 132/*****************************************************************************
@@ -376,19 +378,44 @@ void dove_restart(char mode, const char *cmd)
376 378
377#if defined(CONFIG_MACH_DOVE_DT) 379#if defined(CONFIG_MACH_DOVE_DT)
378/* 380/*
379 * Auxdata required until real OF clock provider 381 * There are still devices that doesn't even know about DT,
382 * get clock gates here and add a clock lookup.
380 */ 383 */
381struct of_dev_auxdata dove_auxdata_lookup[] __initdata = { 384static void __init dove_legacy_clk_init(void)
382 OF_DEV_AUXDATA("marvell,orion-spi", 0xf1010600, "orion_spi.0", NULL), 385{
383 OF_DEV_AUXDATA("marvell,orion-spi", 0xf1014600, "orion_spi.1", NULL), 386 struct device_node *np = of_find_compatible_node(NULL, NULL,
384 OF_DEV_AUXDATA("marvell,orion-wdt", 0xf1020300, "orion_wdt", NULL), 387 "marvell,dove-gating-clock");
385 OF_DEV_AUXDATA("marvell,mv64xxx-i2c", 0xf1011000, "mv64xxx_i2c.0", 388 struct of_phandle_args clkspec;
386 NULL), 389
387 OF_DEV_AUXDATA("marvell,orion-sata", 0xf10a0000, "sata_mv.0", NULL), 390 clkspec.np = np;
388 OF_DEV_AUXDATA("marvell,dove-sdhci", 0xf1092000, "sdhci-dove.0", NULL), 391 clkspec.args_count = 1;
389 OF_DEV_AUXDATA("marvell,dove-sdhci", 0xf1090000, "sdhci-dove.1", NULL), 392
390 {}, 393 clkspec.args[0] = CLOCK_GATING_BIT_USB0;
391}; 394 orion_clkdev_add(NULL, "orion-ehci.0",
395 of_clk_get_from_provider(&clkspec));
396
397 clkspec.args[0] = CLOCK_GATING_BIT_USB1;
398 orion_clkdev_add(NULL, "orion-ehci.1",
399 of_clk_get_from_provider(&clkspec));
400
401 clkspec.args[0] = CLOCK_GATING_BIT_GBE;
402 orion_clkdev_add(NULL, "mv643xx_eth_port.0",
403 of_clk_get_from_provider(&clkspec));
404
405 clkspec.args[0] = CLOCK_GATING_BIT_PCIE0;
406 orion_clkdev_add("0", "pcie",
407 of_clk_get_from_provider(&clkspec));
408
409 clkspec.args[0] = CLOCK_GATING_BIT_PCIE1;
410 orion_clkdev_add("1", "pcie",
411 of_clk_get_from_provider(&clkspec));
412}
413
414static void __init dove_of_clk_init(void)
415{
416 mvebu_clocks_init();
417 dove_legacy_clk_init();
418}
392 419
393static struct mv643xx_eth_platform_data dove_dt_ge00_data = { 420static struct mv643xx_eth_platform_data dove_dt_ge00_data = {
394 .phy_addr = MV643XX_ETH_PHY_ADDR_DEFAULT, 421 .phy_addr = MV643XX_ETH_PHY_ADDR_DEFAULT,
@@ -405,20 +432,17 @@ static void __init dove_dt_init(void)
405 dove_setup_cpu_mbus(); 432 dove_setup_cpu_mbus();
406 433
407 /* Setup root of clk tree */ 434 /* Setup root of clk tree */
408 dove_clk_init(); 435 dove_of_clk_init();
409 436
410 /* Internal devices not ported to DT yet */ 437 /* Internal devices not ported to DT yet */
411 dove_rtc_init(); 438 dove_rtc_init();
412 dove_xor0_init();
413 dove_xor1_init();
414 439
415 dove_ge00_init(&dove_dt_ge00_data); 440 dove_ge00_init(&dove_dt_ge00_data);
416 dove_ehci0_init(); 441 dove_ehci0_init();
417 dove_ehci1_init(); 442 dove_ehci1_init();
418 dove_pcie_init(1, 1); 443 dove_pcie_init(1, 1);
419 444
420 of_platform_populate(NULL, of_default_bus_match_table, 445 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
421 dove_auxdata_lookup, NULL);
422} 446}
423 447
424static const char * const dove_dt_board_compat[] = { 448static const char * const dove_dt_board_compat[] = {