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-rw-r--r--arch/arm/mach-dove/common.c616
1 files changed, 32 insertions, 584 deletions
diff --git a/arch/arm/mach-dove/common.c b/arch/arm/mach-dove/common.c
index e06a88f1f81d..5ed51b84c1b2 100644
--- a/arch/arm/mach-dove/common.c
+++ b/arch/arm/mach-dove/common.c
@@ -16,10 +16,8 @@
16#include <linux/serial_8250.h> 16#include <linux/serial_8250.h>
17#include <linux/clk.h> 17#include <linux/clk.h>
18#include <linux/mbus.h> 18#include <linux/mbus.h>
19#include <linux/mv643xx_eth.h>
20#include <linux/mv643xx_i2c.h>
21#include <linux/ata_platform.h> 19#include <linux/ata_platform.h>
22#include <linux/spi/orion_spi.h> 20#include <linux/serial_8250.h>
23#include <linux/gpio.h> 21#include <linux/gpio.h>
24#include <asm/page.h> 22#include <asm/page.h>
25#include <asm/setup.h> 23#include <asm/setup.h>
@@ -32,11 +30,12 @@
32#include <mach/bridge-regs.h> 30#include <mach/bridge-regs.h>
33#include <asm/mach/arch.h> 31#include <asm/mach/arch.h>
34#include <linux/irq.h> 32#include <linux/irq.h>
35#include <plat/mv_xor.h>
36#include <plat/ehci-orion.h>
37#include <plat/time.h> 33#include <plat/time.h>
34#include <plat/common.h>
38#include "common.h" 35#include "common.h"
39 36
37static int get_tclk(void);
38
40/***************************************************************************** 39/*****************************************************************************
41 * I/O Address Mapping 40 * I/O Address Mapping
42 ****************************************************************************/ 41 ****************************************************************************/
@@ -70,463 +69,106 @@ void __init dove_map_io(void)
70} 69}
71 70
72/***************************************************************************** 71/*****************************************************************************
73 * EHCI
74 ****************************************************************************/
75static struct orion_ehci_data dove_ehci_data = {
76 .dram = &dove_mbus_dram_info,
77 .phy_version = EHCI_PHY_NA,
78};
79
80static u64 ehci_dmamask = DMA_BIT_MASK(32);
81
82/*****************************************************************************
83 * EHCI0 72 * EHCI0
84 ****************************************************************************/ 73 ****************************************************************************/
85static struct resource dove_ehci0_resources[] = {
86 {
87 .start = DOVE_USB0_PHYS_BASE,
88 .end = DOVE_USB0_PHYS_BASE + SZ_4K - 1,
89 .flags = IORESOURCE_MEM,
90 }, {
91 .start = IRQ_DOVE_USB0,
92 .end = IRQ_DOVE_USB0,
93 .flags = IORESOURCE_IRQ,
94 },
95};
96
97static struct platform_device dove_ehci0 = {
98 .name = "orion-ehci",
99 .id = 0,
100 .dev = {
101 .dma_mask = &ehci_dmamask,
102 .coherent_dma_mask = DMA_BIT_MASK(32),
103 .platform_data = &dove_ehci_data,
104 },
105 .resource = dove_ehci0_resources,
106 .num_resources = ARRAY_SIZE(dove_ehci0_resources),
107};
108
109void __init dove_ehci0_init(void) 74void __init dove_ehci0_init(void)
110{ 75{
111 platform_device_register(&dove_ehci0); 76 orion_ehci_init(&dove_mbus_dram_info,
77 DOVE_USB0_PHYS_BASE, IRQ_DOVE_USB0);
112} 78}
113 79
114/***************************************************************************** 80/*****************************************************************************
115 * EHCI1 81 * EHCI1
116 ****************************************************************************/ 82 ****************************************************************************/
117static struct resource dove_ehci1_resources[] = {
118 {
119 .start = DOVE_USB1_PHYS_BASE,
120 .end = DOVE_USB1_PHYS_BASE + SZ_4K - 1,
121 .flags = IORESOURCE_MEM,
122 }, {
123 .start = IRQ_DOVE_USB1,
124 .end = IRQ_DOVE_USB1,
125 .flags = IORESOURCE_IRQ,
126 },
127};
128
129static struct platform_device dove_ehci1 = {
130 .name = "orion-ehci",
131 .id = 1,
132 .dev = {
133 .dma_mask = &ehci_dmamask,
134 .coherent_dma_mask = DMA_BIT_MASK(32),
135 .platform_data = &dove_ehci_data,
136 },
137 .resource = dove_ehci1_resources,
138 .num_resources = ARRAY_SIZE(dove_ehci1_resources),
139};
140
141void __init dove_ehci1_init(void) 83void __init dove_ehci1_init(void)
142{ 84{
143 platform_device_register(&dove_ehci1); 85 orion_ehci_1_init(&dove_mbus_dram_info,
86 DOVE_USB1_PHYS_BASE, IRQ_DOVE_USB1);
144} 87}
145 88
146/***************************************************************************** 89/*****************************************************************************
147 * GE00 90 * GE00
148 ****************************************************************************/ 91 ****************************************************************************/
149struct mv643xx_eth_shared_platform_data dove_ge00_shared_data = {
150 .t_clk = 0,
151 .dram = &dove_mbus_dram_info,
152};
153
154static struct resource dove_ge00_shared_resources[] = {
155 {
156 .name = "ge00 base",
157 .start = DOVE_GE00_PHYS_BASE + 0x2000,
158 .end = DOVE_GE00_PHYS_BASE + SZ_16K - 1,
159 .flags = IORESOURCE_MEM,
160 },
161};
162
163static struct platform_device dove_ge00_shared = {
164 .name = MV643XX_ETH_SHARED_NAME,
165 .id = 0,
166 .dev = {
167 .platform_data = &dove_ge00_shared_data,
168 },
169 .num_resources = 1,
170 .resource = dove_ge00_shared_resources,
171};
172
173static struct resource dove_ge00_resources[] = {
174 {
175 .name = "ge00 irq",
176 .start = IRQ_DOVE_GE00_SUM,
177 .end = IRQ_DOVE_GE00_SUM,
178 .flags = IORESOURCE_IRQ,
179 },
180};
181
182static struct platform_device dove_ge00 = {
183 .name = MV643XX_ETH_NAME,
184 .id = 0,
185 .num_resources = 1,
186 .resource = dove_ge00_resources,
187 .dev = {
188 .coherent_dma_mask = 0xffffffff,
189 },
190};
191
192void __init dove_ge00_init(struct mv643xx_eth_platform_data *eth_data) 92void __init dove_ge00_init(struct mv643xx_eth_platform_data *eth_data)
193{ 93{
194 eth_data->shared = &dove_ge00_shared; 94 orion_ge00_init(eth_data, &dove_mbus_dram_info,
195 dove_ge00.dev.platform_data = eth_data; 95 DOVE_GE00_PHYS_BASE, IRQ_DOVE_GE00_SUM,
196 96 0, get_tclk());
197 platform_device_register(&dove_ge00_shared);
198 platform_device_register(&dove_ge00);
199} 97}
200 98
201/***************************************************************************** 99/*****************************************************************************
202 * SoC RTC 100 * SoC RTC
203 ****************************************************************************/ 101 ****************************************************************************/
204static struct resource dove_rtc_resource[] = {
205 {
206 .start = DOVE_RTC_PHYS_BASE,
207 .end = DOVE_RTC_PHYS_BASE + 32 - 1,
208 .flags = IORESOURCE_MEM,
209 }, {
210 .start = IRQ_DOVE_RTC,
211 .flags = IORESOURCE_IRQ,
212 }
213};
214
215void __init dove_rtc_init(void) 102void __init dove_rtc_init(void)
216{ 103{
217 platform_device_register_simple("rtc-mv", -1, dove_rtc_resource, 2); 104 orion_rtc_init(DOVE_RTC_PHYS_BASE, IRQ_DOVE_RTC);
218} 105}
219 106
220/***************************************************************************** 107/*****************************************************************************
221 * SATA 108 * SATA
222 ****************************************************************************/ 109 ****************************************************************************/
223static struct resource dove_sata_resources[] = {
224 {
225 .name = "sata base",
226 .start = DOVE_SATA_PHYS_BASE,
227 .end = DOVE_SATA_PHYS_BASE + 0x5000 - 1,
228 .flags = IORESOURCE_MEM,
229 }, {
230 .name = "sata irq",
231 .start = IRQ_DOVE_SATA,
232 .end = IRQ_DOVE_SATA,
233 .flags = IORESOURCE_IRQ,
234 },
235};
236
237static struct platform_device dove_sata = {
238 .name = "sata_mv",
239 .id = 0,
240 .dev = {
241 .coherent_dma_mask = DMA_BIT_MASK(32),
242 },
243 .num_resources = ARRAY_SIZE(dove_sata_resources),
244 .resource = dove_sata_resources,
245};
246
247void __init dove_sata_init(struct mv_sata_platform_data *sata_data) 110void __init dove_sata_init(struct mv_sata_platform_data *sata_data)
248{ 111{
249 sata_data->dram = &dove_mbus_dram_info; 112 orion_sata_init(sata_data, &dove_mbus_dram_info,
250 dove_sata.dev.platform_data = sata_data; 113 DOVE_SATA_PHYS_BASE, IRQ_DOVE_SATA);
251 platform_device_register(&dove_sata); 114
252} 115}
253 116
254/***************************************************************************** 117/*****************************************************************************
255 * UART0 118 * UART0
256 ****************************************************************************/ 119 ****************************************************************************/
257static struct plat_serial8250_port dove_uart0_data[] = {
258 {
259 .mapbase = DOVE_UART0_PHYS_BASE,
260 .membase = (char *)DOVE_UART0_VIRT_BASE,
261 .irq = IRQ_DOVE_UART_0,
262 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
263 .iotype = UPIO_MEM,
264 .regshift = 2,
265 .uartclk = 0,
266 }, {
267 },
268};
269
270static struct resource dove_uart0_resources[] = {
271 {
272 .start = DOVE_UART0_PHYS_BASE,
273 .end = DOVE_UART0_PHYS_BASE + SZ_256 - 1,
274 .flags = IORESOURCE_MEM,
275 }, {
276 .start = IRQ_DOVE_UART_0,
277 .end = IRQ_DOVE_UART_0,
278 .flags = IORESOURCE_IRQ,
279 },
280};
281
282static struct platform_device dove_uart0 = {
283 .name = "serial8250",
284 .id = 0,
285 .dev = {
286 .platform_data = dove_uart0_data,
287 },
288 .resource = dove_uart0_resources,
289 .num_resources = ARRAY_SIZE(dove_uart0_resources),
290};
291
292void __init dove_uart0_init(void) 120void __init dove_uart0_init(void)
293{ 121{
294 platform_device_register(&dove_uart0); 122 orion_uart0_init(DOVE_UART0_VIRT_BASE, DOVE_UART0_PHYS_BASE,
123 IRQ_DOVE_UART_0, get_tclk());
295} 124}
296 125
297/***************************************************************************** 126/*****************************************************************************
298 * UART1 127 * UART1
299 ****************************************************************************/ 128 ****************************************************************************/
300static struct plat_serial8250_port dove_uart1_data[] = {
301 {
302 .mapbase = DOVE_UART1_PHYS_BASE,
303 .membase = (char *)DOVE_UART1_VIRT_BASE,
304 .irq = IRQ_DOVE_UART_1,
305 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
306 .iotype = UPIO_MEM,
307 .regshift = 2,
308 .uartclk = 0,
309 }, {
310 },
311};
312
313static struct resource dove_uart1_resources[] = {
314 {
315 .start = DOVE_UART1_PHYS_BASE,
316 .end = DOVE_UART1_PHYS_BASE + SZ_256 - 1,
317 .flags = IORESOURCE_MEM,
318 }, {
319 .start = IRQ_DOVE_UART_1,
320 .end = IRQ_DOVE_UART_1,
321 .flags = IORESOURCE_IRQ,
322 },
323};
324
325static struct platform_device dove_uart1 = {
326 .name = "serial8250",
327 .id = 1,
328 .dev = {
329 .platform_data = dove_uart1_data,
330 },
331 .resource = dove_uart1_resources,
332 .num_resources = ARRAY_SIZE(dove_uart1_resources),
333};
334
335void __init dove_uart1_init(void) 129void __init dove_uart1_init(void)
336{ 130{
337 platform_device_register(&dove_uart1); 131 orion_uart1_init(DOVE_UART1_VIRT_BASE, DOVE_UART1_PHYS_BASE,
132 IRQ_DOVE_UART_1, get_tclk());
338} 133}
339 134
340/***************************************************************************** 135/*****************************************************************************
341 * UART2 136 * UART2
342 ****************************************************************************/ 137 ****************************************************************************/
343static struct plat_serial8250_port dove_uart2_data[] = {
344 {
345 .mapbase = DOVE_UART2_PHYS_BASE,
346 .membase = (char *)DOVE_UART2_VIRT_BASE,
347 .irq = IRQ_DOVE_UART_2,
348 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
349 .iotype = UPIO_MEM,
350 .regshift = 2,
351 .uartclk = 0,
352 }, {
353 },
354};
355
356static struct resource dove_uart2_resources[] = {
357 {
358 .start = DOVE_UART2_PHYS_BASE,
359 .end = DOVE_UART2_PHYS_BASE + SZ_256 - 1,
360 .flags = IORESOURCE_MEM,
361 }, {
362 .start = IRQ_DOVE_UART_2,
363 .end = IRQ_DOVE_UART_2,
364 .flags = IORESOURCE_IRQ,
365 },
366};
367
368static struct platform_device dove_uart2 = {
369 .name = "serial8250",
370 .id = 2,
371 .dev = {
372 .platform_data = dove_uart2_data,
373 },
374 .resource = dove_uart2_resources,
375 .num_resources = ARRAY_SIZE(dove_uart2_resources),
376};
377
378void __init dove_uart2_init(void) 138void __init dove_uart2_init(void)
379{ 139{
380 platform_device_register(&dove_uart2); 140 orion_uart2_init(DOVE_UART2_VIRT_BASE, DOVE_UART2_PHYS_BASE,
141 IRQ_DOVE_UART_2, get_tclk());
381} 142}
382 143
383/***************************************************************************** 144/*****************************************************************************
384 * UART3 145 * UART3
385 ****************************************************************************/ 146 ****************************************************************************/
386static struct plat_serial8250_port dove_uart3_data[] = {
387 {
388 .mapbase = DOVE_UART3_PHYS_BASE,
389 .membase = (char *)DOVE_UART3_VIRT_BASE,
390 .irq = IRQ_DOVE_UART_3,
391 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
392 .iotype = UPIO_MEM,
393 .regshift = 2,
394 .uartclk = 0,
395 }, {
396 },
397};
398
399static struct resource dove_uart3_resources[] = {
400 {
401 .start = DOVE_UART3_PHYS_BASE,
402 .end = DOVE_UART3_PHYS_BASE + SZ_256 - 1,
403 .flags = IORESOURCE_MEM,
404 }, {
405 .start = IRQ_DOVE_UART_3,
406 .end = IRQ_DOVE_UART_3,
407 .flags = IORESOURCE_IRQ,
408 },
409};
410
411static struct platform_device dove_uart3 = {
412 .name = "serial8250",
413 .id = 3,
414 .dev = {
415 .platform_data = dove_uart3_data,
416 },
417 .resource = dove_uart3_resources,
418 .num_resources = ARRAY_SIZE(dove_uart3_resources),
419};
420
421void __init dove_uart3_init(void) 147void __init dove_uart3_init(void)
422{ 148{
423 platform_device_register(&dove_uart3); 149 orion_uart3_init(DOVE_UART3_VIRT_BASE, DOVE_UART3_PHYS_BASE,
150 IRQ_DOVE_UART_3, get_tclk());
424} 151}
425 152
426/***************************************************************************** 153/*****************************************************************************
427 * SPI0 154 * SPI
428 ****************************************************************************/ 155 ****************************************************************************/
429static struct orion_spi_info dove_spi0_data = {
430 .tclk = 0,
431};
432
433static struct resource dove_spi0_resources[] = {
434 {
435 .start = DOVE_SPI0_PHYS_BASE,
436 .end = DOVE_SPI0_PHYS_BASE + SZ_512 - 1,
437 .flags = IORESOURCE_MEM,
438 }, {
439 .start = IRQ_DOVE_SPI0,
440 .end = IRQ_DOVE_SPI0,
441 .flags = IORESOURCE_IRQ,
442 },
443};
444
445static struct platform_device dove_spi0 = {
446 .name = "orion_spi",
447 .id = 0,
448 .resource = dove_spi0_resources,
449 .dev = {
450 .platform_data = &dove_spi0_data,
451 },
452 .num_resources = ARRAY_SIZE(dove_spi0_resources),
453};
454
455void __init dove_spi0_init(void) 156void __init dove_spi0_init(void)
456{ 157{
457 platform_device_register(&dove_spi0); 158 orion_spi_init(DOVE_SPI0_PHYS_BASE, get_tclk());
458} 159}
459 160
460/*****************************************************************************
461 * SPI1
462 ****************************************************************************/
463static struct orion_spi_info dove_spi1_data = {
464 .tclk = 0,
465};
466
467static struct resource dove_spi1_resources[] = {
468 {
469 .start = DOVE_SPI1_PHYS_BASE,
470 .end = DOVE_SPI1_PHYS_BASE + SZ_512 - 1,
471 .flags = IORESOURCE_MEM,
472 }, {
473 .start = IRQ_DOVE_SPI1,
474 .end = IRQ_DOVE_SPI1,
475 .flags = IORESOURCE_IRQ,
476 },
477};
478
479static struct platform_device dove_spi1 = {
480 .name = "orion_spi",
481 .id = 1,
482 .resource = dove_spi1_resources,
483 .dev = {
484 .platform_data = &dove_spi1_data,
485 },
486 .num_resources = ARRAY_SIZE(dove_spi1_resources),
487};
488
489void __init dove_spi1_init(void) 161void __init dove_spi1_init(void)
490{ 162{
491 platform_device_register(&dove_spi1); 163 orion_spi_init(DOVE_SPI1_PHYS_BASE, get_tclk());
492} 164}
493 165
494/***************************************************************************** 166/*****************************************************************************
495 * I2C 167 * I2C
496 ****************************************************************************/ 168 ****************************************************************************/
497static struct mv64xxx_i2c_pdata dove_i2c_data = {
498 .freq_m = 10, /* assumes 166 MHz TCLK gets 94.3kHz */
499 .freq_n = 3,
500 .timeout = 1000, /* Default timeout of 1 second */
501};
502
503static struct resource dove_i2c_resources[] = {
504 {
505 .name = "i2c base",
506 .start = DOVE_I2C_PHYS_BASE,
507 .end = DOVE_I2C_PHYS_BASE + 0x20 - 1,
508 .flags = IORESOURCE_MEM,
509 }, {
510 .name = "i2c irq",
511 .start = IRQ_DOVE_I2C,
512 .end = IRQ_DOVE_I2C,
513 .flags = IORESOURCE_IRQ,
514 },
515};
516
517static struct platform_device dove_i2c = {
518 .name = MV64XXX_I2C_CTLR_NAME,
519 .id = 0,
520 .num_resources = ARRAY_SIZE(dove_i2c_resources),
521 .resource = dove_i2c_resources,
522 .dev = {
523 .platform_data = &dove_i2c_data,
524 },
525};
526
527void __init dove_i2c_init(void) 169void __init dove_i2c_init(void)
528{ 170{
529 platform_device_register(&dove_i2c); 171 orion_i2c_init(DOVE_I2C_PHYS_BASE, IRQ_DOVE_I2C, 10);
530} 172}
531 173
532/***************************************************************************** 174/*****************************************************************************
@@ -554,208 +196,22 @@ struct sys_timer dove_timer = {
554}; 196};
555 197
556/***************************************************************************** 198/*****************************************************************************
557 * XOR
558 ****************************************************************************/
559static struct mv_xor_platform_shared_data dove_xor_shared_data = {
560 .dram = &dove_mbus_dram_info,
561};
562
563/*****************************************************************************
564 * XOR 0 199 * XOR 0
565 ****************************************************************************/ 200 ****************************************************************************/
566static u64 dove_xor0_dmamask = DMA_BIT_MASK(32);
567
568static struct resource dove_xor0_shared_resources[] = {
569 {
570 .name = "xor 0 low",
571 .start = DOVE_XOR0_PHYS_BASE,
572 .end = DOVE_XOR0_PHYS_BASE + 0xff,
573 .flags = IORESOURCE_MEM,
574 }, {
575 .name = "xor 0 high",
576 .start = DOVE_XOR0_HIGH_PHYS_BASE,
577 .end = DOVE_XOR0_HIGH_PHYS_BASE + 0xff,
578 .flags = IORESOURCE_MEM,
579 },
580};
581
582static struct platform_device dove_xor0_shared = {
583 .name = MV_XOR_SHARED_NAME,
584 .id = 0,
585 .dev = {
586 .platform_data = &dove_xor_shared_data,
587 },
588 .num_resources = ARRAY_SIZE(dove_xor0_shared_resources),
589 .resource = dove_xor0_shared_resources,
590};
591
592static struct resource dove_xor00_resources[] = {
593 [0] = {
594 .start = IRQ_DOVE_XOR_00,
595 .end = IRQ_DOVE_XOR_00,
596 .flags = IORESOURCE_IRQ,
597 },
598};
599
600static struct mv_xor_platform_data dove_xor00_data = {
601 .shared = &dove_xor0_shared,
602 .hw_id = 0,
603 .pool_size = PAGE_SIZE,
604};
605
606static struct platform_device dove_xor00_channel = {
607 .name = MV_XOR_NAME,
608 .id = 0,
609 .num_resources = ARRAY_SIZE(dove_xor00_resources),
610 .resource = dove_xor00_resources,
611 .dev = {
612 .dma_mask = &dove_xor0_dmamask,
613 .coherent_dma_mask = DMA_BIT_MASK(64),
614 .platform_data = &dove_xor00_data,
615 },
616};
617
618static struct resource dove_xor01_resources[] = {
619 [0] = {
620 .start = IRQ_DOVE_XOR_01,
621 .end = IRQ_DOVE_XOR_01,
622 .flags = IORESOURCE_IRQ,
623 },
624};
625
626static struct mv_xor_platform_data dove_xor01_data = {
627 .shared = &dove_xor0_shared,
628 .hw_id = 1,
629 .pool_size = PAGE_SIZE,
630};
631
632static struct platform_device dove_xor01_channel = {
633 .name = MV_XOR_NAME,
634 .id = 1,
635 .num_resources = ARRAY_SIZE(dove_xor01_resources),
636 .resource = dove_xor01_resources,
637 .dev = {
638 .dma_mask = &dove_xor0_dmamask,
639 .coherent_dma_mask = DMA_BIT_MASK(64),
640 .platform_data = &dove_xor01_data,
641 },
642};
643
644void __init dove_xor0_init(void) 201void __init dove_xor0_init(void)
645{ 202{
646 platform_device_register(&dove_xor0_shared); 203 orion_xor0_init(&dove_mbus_dram_info,
647 204 DOVE_XOR0_PHYS_BASE, DOVE_XOR0_HIGH_PHYS_BASE,
648 /* 205 IRQ_DOVE_XOR_00, IRQ_DOVE_XOR_01);
649 * two engines can't do memset simultaneously, this limitation
650 * satisfied by removing memset support from one of the engines.
651 */
652 dma_cap_set(DMA_MEMCPY, dove_xor00_data.cap_mask);
653 dma_cap_set(DMA_XOR, dove_xor00_data.cap_mask);
654 platform_device_register(&dove_xor00_channel);
655
656 dma_cap_set(DMA_MEMCPY, dove_xor01_data.cap_mask);
657 dma_cap_set(DMA_MEMSET, dove_xor01_data.cap_mask);
658 dma_cap_set(DMA_XOR, dove_xor01_data.cap_mask);
659 platform_device_register(&dove_xor01_channel);
660} 206}
661 207
662/***************************************************************************** 208/*****************************************************************************
663 * XOR 1 209 * XOR 1
664 ****************************************************************************/ 210 ****************************************************************************/
665static u64 dove_xor1_dmamask = DMA_BIT_MASK(32);
666
667static struct resource dove_xor1_shared_resources[] = {
668 {
669 .name = "xor 0 low",
670 .start = DOVE_XOR1_PHYS_BASE,
671 .end = DOVE_XOR1_PHYS_BASE + 0xff,
672 .flags = IORESOURCE_MEM,
673 }, {
674 .name = "xor 0 high",
675 .start = DOVE_XOR1_HIGH_PHYS_BASE,
676 .end = DOVE_XOR1_HIGH_PHYS_BASE + 0xff,
677 .flags = IORESOURCE_MEM,
678 },
679};
680
681static struct platform_device dove_xor1_shared = {
682 .name = MV_XOR_SHARED_NAME,
683 .id = 1,
684 .dev = {
685 .platform_data = &dove_xor_shared_data,
686 },
687 .num_resources = ARRAY_SIZE(dove_xor1_shared_resources),
688 .resource = dove_xor1_shared_resources,
689};
690
691static struct resource dove_xor10_resources[] = {
692 [0] = {
693 .start = IRQ_DOVE_XOR_10,
694 .end = IRQ_DOVE_XOR_10,
695 .flags = IORESOURCE_IRQ,
696 },
697};
698
699static struct mv_xor_platform_data dove_xor10_data = {
700 .shared = &dove_xor1_shared,
701 .hw_id = 0,
702 .pool_size = PAGE_SIZE,
703};
704
705static struct platform_device dove_xor10_channel = {
706 .name = MV_XOR_NAME,
707 .id = 2,
708 .num_resources = ARRAY_SIZE(dove_xor10_resources),
709 .resource = dove_xor10_resources,
710 .dev = {
711 .dma_mask = &dove_xor1_dmamask,
712 .coherent_dma_mask = DMA_BIT_MASK(64),
713 .platform_data = &dove_xor10_data,
714 },
715};
716
717static struct resource dove_xor11_resources[] = {
718 [0] = {
719 .start = IRQ_DOVE_XOR_11,
720 .end = IRQ_DOVE_XOR_11,
721 .flags = IORESOURCE_IRQ,
722 },
723};
724
725static struct mv_xor_platform_data dove_xor11_data = {
726 .shared = &dove_xor1_shared,
727 .hw_id = 1,
728 .pool_size = PAGE_SIZE,
729};
730
731static struct platform_device dove_xor11_channel = {
732 .name = MV_XOR_NAME,
733 .id = 3,
734 .num_resources = ARRAY_SIZE(dove_xor11_resources),
735 .resource = dove_xor11_resources,
736 .dev = {
737 .dma_mask = &dove_xor1_dmamask,
738 .coherent_dma_mask = DMA_BIT_MASK(64),
739 .platform_data = &dove_xor11_data,
740 },
741};
742
743void __init dove_xor1_init(void) 211void __init dove_xor1_init(void)
744{ 212{
745 platform_device_register(&dove_xor1_shared); 213 orion_xor1_init(DOVE_XOR1_PHYS_BASE, DOVE_XOR1_HIGH_PHYS_BASE,
746 214 IRQ_DOVE_XOR_10, IRQ_DOVE_XOR_11);
747 /*
748 * two engines can't do memset simultaneously, this limitation
749 * satisfied by removing memset support from one of the engines.
750 */
751 dma_cap_set(DMA_MEMCPY, dove_xor10_data.cap_mask);
752 dma_cap_set(DMA_XOR, dove_xor10_data.cap_mask);
753 platform_device_register(&dove_xor10_channel);
754
755 dma_cap_set(DMA_MEMCPY, dove_xor11_data.cap_mask);
756 dma_cap_set(DMA_MEMSET, dove_xor11_data.cap_mask);
757 dma_cap_set(DMA_XOR, dove_xor11_data.cap_mask);
758 platform_device_register(&dove_xor11_channel);
759} 215}
760 216
761/***************************************************************************** 217/*****************************************************************************
@@ -833,14 +289,6 @@ void __init dove_init(void)
833#endif 289#endif
834 dove_setup_cpu_mbus(); 290 dove_setup_cpu_mbus();
835 291
836 dove_ge00_shared_data.t_clk = tclk;
837 dove_uart0_data[0].uartclk = tclk;
838 dove_uart1_data[0].uartclk = tclk;
839 dove_uart2_data[0].uartclk = tclk;
840 dove_uart3_data[0].uartclk = tclk;
841 dove_spi0_data.tclk = tclk;
842 dove_spi1_data.tclk = tclk;
843
844 /* internal devices that every board has */ 292 /* internal devices that every board has */
845 dove_rtc_init(); 293 dove_rtc_init();
846 dove_xor0_init(); 294 dove_xor0_init();
generated by cgit v1.2.2 (git 2.25.0) at 2026-01-07 05:45:27 -0500