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-rw-r--r--arch/arm/mach-davinci/board-da830-evm.c9
-rw-r--r--arch/arm/mach-davinci/board-da850-evm.c9
-rw-r--r--arch/arm/mach-davinci/board-mityomapl138.c9
-rw-r--r--arch/arm/mach-davinci/clock.c39
-rw-r--r--arch/arm/mach-davinci/clock.h3
-rw-r--r--arch/arm/mach-davinci/da850.c17
-rw-r--r--arch/arm/mach-davinci/devices-da8xx.c16
-rw-r--r--arch/arm/mach-davinci/include/mach/clock.h3
-rw-r--r--arch/arm/mach-davinci/include/mach/da8xx.h4
-rw-r--r--arch/arm/mach-davinci/include/mach/psc.h3
-rw-r--r--arch/arm/mach-davinci/psc.c29
11 files changed, 117 insertions, 24 deletions
diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c
index e3742716cbaa..6da25eebf911 100644
--- a/arch/arm/mach-davinci/board-da830-evm.c
+++ b/arch/arm/mach-davinci/board-da830-evm.c
@@ -652,8 +652,13 @@ static __init void da830_evm_init(void)
652 if (ret) 652 if (ret)
653 pr_warning("da830_evm_init: rtc setup failed: %d\n", ret); 653 pr_warning("da830_evm_init: rtc setup failed: %d\n", ret);
654 654
655 ret = da8xx_register_spi(0, da830evm_spi_info, 655 ret = spi_register_board_info(da830evm_spi_info,
656 ARRAY_SIZE(da830evm_spi_info)); 656 ARRAY_SIZE(da830evm_spi_info));
657 if (ret)
658 pr_warn("%s: spi info registration failed: %d\n", __func__,
659 ret);
660
661 ret = da8xx_register_spi_bus(0, ARRAY_SIZE(da830evm_spi_info));
657 if (ret) 662 if (ret)
658 pr_warning("da830_evm_init: spi 0 registration failed: %d\n", 663 pr_warning("da830_evm_init: spi 0 registration failed: %d\n",
659 ret); 664 ret);
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
index 3b3356097bb0..3a76a47df39c 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -1565,8 +1565,13 @@ static __init void da850_evm_init(void)
1565 1565
1566 da850_vpif_init(); 1566 da850_vpif_init();
1567 1567
1568 ret = da8xx_register_spi(1, da850evm_spi_info, 1568 ret = spi_register_board_info(da850evm_spi_info,
1569 ARRAY_SIZE(da850evm_spi_info)); 1569 ARRAY_SIZE(da850evm_spi_info));
1570 if (ret)
1571 pr_warn("%s: spi info registration failed: %d\n", __func__,
1572 ret);
1573
1574 ret = da8xx_register_spi_bus(1, ARRAY_SIZE(da850evm_spi_info));
1570 if (ret) 1575 if (ret)
1571 pr_warning("da850_evm_init: spi 1 registration failed: %d\n", 1576 pr_warning("da850_evm_init: spi 1 registration failed: %d\n",
1572 ret); 1577 ret);
diff --git a/arch/arm/mach-davinci/board-mityomapl138.c b/arch/arm/mach-davinci/board-mityomapl138.c
index b0df578bf744..9549d53aa63f 100644
--- a/arch/arm/mach-davinci/board-mityomapl138.c
+++ b/arch/arm/mach-davinci/board-mityomapl138.c
@@ -529,8 +529,13 @@ static void __init mityomapl138_init(void)
529 529
530 mityomapl138_setup_nand(); 530 mityomapl138_setup_nand();
531 531
532 ret = da8xx_register_spi(1, mityomapl138_spi_flash_info, 532 ret = spi_register_board_info(mityomapl138_spi_flash_info,
533 ARRAY_SIZE(mityomapl138_spi_flash_info)); 533 ARRAY_SIZE(mityomapl138_spi_flash_info));
534 if (ret)
535 pr_warn("spi info registration failed: %d\n", ret);
536
537 ret = da8xx_register_spi_bus(1,
538 ARRAY_SIZE(mityomapl138_spi_flash_info));
534 if (ret) 539 if (ret)
535 pr_warning("spi 1 registration failed: %d\n", ret); 540 pr_warning("spi 1 registration failed: %d\n", ret);
536 541
diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c
index 34668ead53c7..d458558ee84a 100644
--- a/arch/arm/mach-davinci/clock.c
+++ b/arch/arm/mach-davinci/clock.c
@@ -52,6 +52,40 @@ static void __clk_disable(struct clk *clk)
52 __clk_disable(clk->parent); 52 __clk_disable(clk->parent);
53} 53}
54 54
55int davinci_clk_reset(struct clk *clk, bool reset)
56{
57 unsigned long flags;
58
59 if (clk == NULL || IS_ERR(clk))
60 return -EINVAL;
61
62 spin_lock_irqsave(&clockfw_lock, flags);
63 if (clk->flags & CLK_PSC)
64 davinci_psc_reset(clk->gpsc, clk->lpsc, reset);
65 spin_unlock_irqrestore(&clockfw_lock, flags);
66
67 return 0;
68}
69EXPORT_SYMBOL(davinci_clk_reset);
70
71int davinci_clk_reset_assert(struct clk *clk)
72{
73 if (clk == NULL || IS_ERR(clk) || !clk->reset)
74 return -EINVAL;
75
76 return clk->reset(clk, true);
77}
78EXPORT_SYMBOL(davinci_clk_reset_assert);
79
80int davinci_clk_reset_deassert(struct clk *clk)
81{
82 if (clk == NULL || IS_ERR(clk) || !clk->reset)
83 return -EINVAL;
84
85 return clk->reset(clk, false);
86}
87EXPORT_SYMBOL(davinci_clk_reset_deassert);
88
55int clk_enable(struct clk *clk) 89int clk_enable(struct clk *clk)
56{ 90{
57 unsigned long flags; 91 unsigned long flags;
@@ -535,7 +569,7 @@ int davinci_set_refclk_rate(unsigned long rate)
535} 569}
536 570
537int __init davinci_clk_init(struct clk_lookup *clocks) 571int __init davinci_clk_init(struct clk_lookup *clocks)
538 { 572{
539 struct clk_lookup *c; 573 struct clk_lookup *c;
540 struct clk *clk; 574 struct clk *clk;
541 size_t num_clocks = 0; 575 size_t num_clocks = 0;
@@ -576,6 +610,9 @@ int __init davinci_clk_init(struct clk_lookup *clocks)
576 if (clk->lpsc) 610 if (clk->lpsc)
577 clk->flags |= CLK_PSC; 611 clk->flags |= CLK_PSC;
578 612
613 if (clk->flags & PSC_LRST)
614 clk->reset = davinci_clk_reset;
615
579 clk_register(clk); 616 clk_register(clk);
580 num_clocks++; 617 num_clocks++;
581 618
diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h
index 46f0f1bf1a4c..8694b395fc92 100644
--- a/arch/arm/mach-davinci/clock.h
+++ b/arch/arm/mach-davinci/clock.h
@@ -103,6 +103,7 @@ struct clk {
103 unsigned long (*recalc) (struct clk *); 103 unsigned long (*recalc) (struct clk *);
104 int (*set_rate) (struct clk *clk, unsigned long rate); 104 int (*set_rate) (struct clk *clk, unsigned long rate);
105 int (*round_rate) (struct clk *clk, unsigned long rate); 105 int (*round_rate) (struct clk *clk, unsigned long rate);
106 int (*reset) (struct clk *clk, bool reset);
106}; 107};
107 108
108/* Clock flags: SoC-specific flags start at BIT(16) */ 109/* Clock flags: SoC-specific flags start at BIT(16) */
@@ -112,6 +113,7 @@ struct clk {
112#define PRE_PLL BIT(4) /* source is before PLL mult/div */ 113#define PRE_PLL BIT(4) /* source is before PLL mult/div */
113#define PSC_SWRSTDISABLE BIT(5) /* Disable state is SwRstDisable */ 114#define PSC_SWRSTDISABLE BIT(5) /* Disable state is SwRstDisable */
114#define PSC_FORCE BIT(6) /* Force module state transtition */ 115#define PSC_FORCE BIT(6) /* Force module state transtition */
116#define PSC_LRST BIT(8) /* Use local reset on enable/disable */
115 117
116#define CLK(dev, con, ck) \ 118#define CLK(dev, con, ck) \
117 { \ 119 { \
@@ -126,6 +128,7 @@ int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv,
126int davinci_set_sysclk_rate(struct clk *clk, unsigned long rate); 128int davinci_set_sysclk_rate(struct clk *clk, unsigned long rate);
127int davinci_set_refclk_rate(unsigned long rate); 129int davinci_set_refclk_rate(unsigned long rate);
128int davinci_simple_set_rate(struct clk *clk, unsigned long rate); 130int davinci_simple_set_rate(struct clk *clk, unsigned long rate);
131int davinci_clk_reset(struct clk *clk, bool reset);
129 132
130extern struct platform_device davinci_wdt_device; 133extern struct platform_device davinci_wdt_device;
131extern void davinci_watchdog_reset(struct platform_device *); 134extern void davinci_watchdog_reset(struct platform_device *);
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 6b9154e9f908..0c4a26ddebba 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -76,6 +76,13 @@ static struct clk pll0_aux_clk = {
76 .flags = CLK_PLL | PRE_PLL, 76 .flags = CLK_PLL | PRE_PLL,
77}; 77};
78 78
79static struct clk pll0_sysclk1 = {
80 .name = "pll0_sysclk1",
81 .parent = &pll0_clk,
82 .flags = CLK_PLL,
83 .div_reg = PLLDIV1,
84};
85
79static struct clk pll0_sysclk2 = { 86static struct clk pll0_sysclk2 = {
80 .name = "pll0_sysclk2", 87 .name = "pll0_sysclk2",
81 .parent = &pll0_clk, 88 .parent = &pll0_clk,
@@ -368,10 +375,19 @@ static struct clk sata_clk = {
368 .flags = PSC_FORCE, 375 .flags = PSC_FORCE,
369}; 376};
370 377
378static struct clk dsp_clk = {
379 .name = "dsp",
380 .parent = &pll0_sysclk1,
381 .domain = DAVINCI_GPSC_DSPDOMAIN,
382 .lpsc = DA8XX_LPSC0_GEM,
383 .flags = PSC_LRST | PSC_FORCE,
384};
385
371static struct clk_lookup da850_clks[] = { 386static struct clk_lookup da850_clks[] = {
372 CLK(NULL, "ref", &ref_clk), 387 CLK(NULL, "ref", &ref_clk),
373 CLK(NULL, "pll0", &pll0_clk), 388 CLK(NULL, "pll0", &pll0_clk),
374 CLK(NULL, "pll0_aux", &pll0_aux_clk), 389 CLK(NULL, "pll0_aux", &pll0_aux_clk),
390 CLK(NULL, "pll0_sysclk1", &pll0_sysclk1),
375 CLK(NULL, "pll0_sysclk2", &pll0_sysclk2), 391 CLK(NULL, "pll0_sysclk2", &pll0_sysclk2),
376 CLK(NULL, "pll0_sysclk3", &pll0_sysclk3), 392 CLK(NULL, "pll0_sysclk3", &pll0_sysclk3),
377 CLK(NULL, "pll0_sysclk4", &pll0_sysclk4), 393 CLK(NULL, "pll0_sysclk4", &pll0_sysclk4),
@@ -413,6 +429,7 @@ static struct clk_lookup da850_clks[] = {
413 CLK("spi_davinci.1", NULL, &spi1_clk), 429 CLK("spi_davinci.1", NULL, &spi1_clk),
414 CLK("vpif", NULL, &vpif_clk), 430 CLK("vpif", NULL, &vpif_clk),
415 CLK("ahci", NULL, &sata_clk), 431 CLK("ahci", NULL, &sata_clk),
432 CLK("davinci-rproc.0", NULL, &dsp_clk),
416 CLK(NULL, NULL, NULL), 433 CLK(NULL, NULL, NULL),
417}; 434};
418 435
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
index 2d5502d84a22..aa402bc160c8 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -751,7 +751,7 @@ void __iomem * __init da8xx_get_mem_ctlr(void)
751 751
752 da8xx_ddr2_ctlr_base = ioremap(DA8XX_DDR2_CTL_BASE, SZ_32K); 752 da8xx_ddr2_ctlr_base = ioremap(DA8XX_DDR2_CTL_BASE, SZ_32K);
753 if (!da8xx_ddr2_ctlr_base) 753 if (!da8xx_ddr2_ctlr_base)
754 pr_warning("%s: Unable to map DDR2 controller", __func__); 754 pr_warn("%s: Unable to map DDR2 controller", __func__);
755 755
756 return da8xx_ddr2_ctlr_base; 756 return da8xx_ddr2_ctlr_base;
757} 757}
@@ -832,7 +832,7 @@ static struct resource da8xx_spi1_resources[] = {
832 }, 832 },
833}; 833};
834 834
835struct davinci_spi_platform_data da8xx_spi_pdata[] = { 835static struct davinci_spi_platform_data da8xx_spi_pdata[] = {
836 [0] = { 836 [0] = {
837 .version = SPI_VERSION_2, 837 .version = SPI_VERSION_2,
838 .intr_line = 1, 838 .intr_line = 1,
@@ -866,20 +866,12 @@ static struct platform_device da8xx_spi_device[] = {
866 }, 866 },
867}; 867};
868 868
869int __init da8xx_register_spi(int instance, const struct spi_board_info *info, 869int __init da8xx_register_spi_bus(int instance, unsigned num_chipselect)
870 unsigned len)
871{ 870{
872 int ret;
873
874 if (instance < 0 || instance > 1) 871 if (instance < 0 || instance > 1)
875 return -EINVAL; 872 return -EINVAL;
876 873
877 ret = spi_register_board_info(info, len); 874 da8xx_spi_pdata[instance].num_chipselect = num_chipselect;
878 if (ret)
879 pr_warning("%s: failed to register board info for spi %d :"
880 " %d\n", __func__, instance, ret);
881
882 da8xx_spi_pdata[instance].num_chipselect = len;
883 875
884 if (instance == 1 && cpu_is_davinci_da850()) { 876 if (instance == 1 && cpu_is_davinci_da850()) {
885 da8xx_spi1_resources[0].start = DA850_SPI1_BASE; 877 da8xx_spi1_resources[0].start = DA850_SPI1_BASE;
diff --git a/arch/arm/mach-davinci/include/mach/clock.h b/arch/arm/mach-davinci/include/mach/clock.h
index a3b040219876..3e8af6a0b64c 100644
--- a/arch/arm/mach-davinci/include/mach/clock.h
+++ b/arch/arm/mach-davinci/include/mach/clock.h
@@ -18,4 +18,7 @@ struct clk;
18extern int clk_register(struct clk *clk); 18extern int clk_register(struct clk *clk);
19extern void clk_unregister(struct clk *clk); 19extern void clk_unregister(struct clk *clk);
20 20
21int davinci_clk_reset_assert(struct clk *c);
22int davinci_clk_reset_deassert(struct clk *c);
23
21#endif 24#endif
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index 700d311c6854..1b14aea40310 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -82,8 +82,7 @@ void __init da850_init(void);
82int da830_register_edma(struct edma_rsv_info *rsv); 82int da830_register_edma(struct edma_rsv_info *rsv);
83int da850_register_edma(struct edma_rsv_info *rsv[2]); 83int da850_register_edma(struct edma_rsv_info *rsv[2]);
84int da8xx_register_i2c(int instance, struct davinci_i2c_platform_data *pdata); 84int da8xx_register_i2c(int instance, struct davinci_i2c_platform_data *pdata);
85int da8xx_register_spi(int instance, 85int da8xx_register_spi_bus(int instance, unsigned num_chipselect);
86 const struct spi_board_info *info, unsigned len);
87int da8xx_register_watchdog(void); 86int da8xx_register_watchdog(void);
88int da8xx_register_usb20(unsigned mA, unsigned potpgt); 87int da8xx_register_usb20(unsigned mA, unsigned potpgt);
89int da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata); 88int da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata);
@@ -110,7 +109,6 @@ extern struct platform_device da8xx_serial_device;
110extern struct emac_platform_data da8xx_emac_pdata; 109extern struct emac_platform_data da8xx_emac_pdata;
111extern struct da8xx_lcdc_platform_data sharp_lcd035q3dg01_pdata; 110extern struct da8xx_lcdc_platform_data sharp_lcd035q3dg01_pdata;
112extern struct da8xx_lcdc_platform_data sharp_lk043t1dg01_pdata; 111extern struct da8xx_lcdc_platform_data sharp_lk043t1dg01_pdata;
113extern struct davinci_spi_platform_data da8xx_spi_pdata[];
114 112
115extern struct platform_device da8xx_wdt_device; 113extern struct platform_device da8xx_wdt_device;
116 114
diff --git a/arch/arm/mach-davinci/include/mach/psc.h b/arch/arm/mach-davinci/include/mach/psc.h
index 40a0027838e8..0a22710493fd 100644
--- a/arch/arm/mach-davinci/include/mach/psc.h
+++ b/arch/arm/mach-davinci/include/mach/psc.h
@@ -246,6 +246,7 @@
246 246
247#define MDSTAT_STATE_MASK 0x3f 247#define MDSTAT_STATE_MASK 0x3f
248#define PDSTAT_STATE_MASK 0x1f 248#define PDSTAT_STATE_MASK 0x1f
249#define MDCTL_LRST BIT(8)
249#define MDCTL_FORCE BIT(31) 250#define MDCTL_FORCE BIT(31)
250#define PDCTL_NEXT BIT(0) 251#define PDCTL_NEXT BIT(0)
251#define PDCTL_EPCGOOD BIT(8) 252#define PDCTL_EPCGOOD BIT(8)
@@ -253,6 +254,8 @@
253#ifndef __ASSEMBLER__ 254#ifndef __ASSEMBLER__
254 255
255extern int davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id); 256extern int davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id);
257extern void davinci_psc_reset(unsigned int ctlr, unsigned int id,
258 bool reset);
256extern void davinci_psc_config(unsigned int domain, unsigned int ctlr, 259extern void davinci_psc_config(unsigned int domain, unsigned int ctlr,
257 unsigned int id, bool enable, u32 flags); 260 unsigned int id, bool enable, u32 flags);
258 261
diff --git a/arch/arm/mach-davinci/psc.c b/arch/arm/mach-davinci/psc.c
index d7e210f4b55c..82fdc69d5728 100644
--- a/arch/arm/mach-davinci/psc.c
+++ b/arch/arm/mach-davinci/psc.c
@@ -35,7 +35,7 @@ int __init davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id)
35 struct davinci_soc_info *soc_info = &davinci_soc_info; 35 struct davinci_soc_info *soc_info = &davinci_soc_info;
36 36
37 if (!soc_info->psc_bases || (ctlr >= soc_info->psc_bases_num)) { 37 if (!soc_info->psc_bases || (ctlr >= soc_info->psc_bases_num)) {
38 pr_warning("PSC: Bad psc data: 0x%x[%d]\n", 38 pr_warn("PSC: Bad psc data: 0x%x[%d]\n",
39 (int)soc_info->psc_bases, ctlr); 39 (int)soc_info->psc_bases, ctlr);
40 return 0; 40 return 0;
41 } 41 }
@@ -48,6 +48,31 @@ int __init davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id)
48 return mdstat & BIT(12); 48 return mdstat & BIT(12);
49} 49}
50 50
51/* Control "reset" line associated with PSC domain */
52void davinci_psc_reset(unsigned int ctlr, unsigned int id, bool reset)
53{
54 u32 mdctl;
55 void __iomem *psc_base;
56 struct davinci_soc_info *soc_info = &davinci_soc_info;
57
58 if (!soc_info->psc_bases || (ctlr >= soc_info->psc_bases_num)) {
59 pr_warn("PSC: Bad psc data: 0x%x[%d]\n",
60 (int)soc_info->psc_bases, ctlr);
61 return;
62 }
63
64 psc_base = ioremap(soc_info->psc_bases[ctlr], SZ_4K);
65
66 mdctl = readl(psc_base + MDCTL + 4 * id);
67 if (reset)
68 mdctl &= ~MDCTL_LRST;
69 else
70 mdctl |= MDCTL_LRST;
71 writel(mdctl, psc_base + MDCTL + 4 * id);
72
73 iounmap(psc_base);
74}
75
51/* Enable or disable a PSC domain */ 76/* Enable or disable a PSC domain */
52void davinci_psc_config(unsigned int domain, unsigned int ctlr, 77void davinci_psc_config(unsigned int domain, unsigned int ctlr,
53 unsigned int id, bool enable, u32 flags) 78 unsigned int id, bool enable, u32 flags)
@@ -58,7 +83,7 @@ void davinci_psc_config(unsigned int domain, unsigned int ctlr,
58 u32 next_state = PSC_STATE_ENABLE; 83 u32 next_state = PSC_STATE_ENABLE;
59 84
60 if (!soc_info->psc_bases || (ctlr >= soc_info->psc_bases_num)) { 85 if (!soc_info->psc_bases || (ctlr >= soc_info->psc_bases_num)) {
61 pr_warning("PSC: Bad psc data: 0x%x[%d]\n", 86 pr_warn("PSC: Bad psc data: 0x%x[%d]\n",
62 (int)soc_info->psc_bases, ctlr); 87 (int)soc_info->psc_bases, ctlr);
63 return; 88 return;
64 } 89 }