19 files changed, 161 insertions, 114 deletions

diff --git a/arch/arm/mach-davinci/include/mach/aemif.h b/arch/arm/mach-davinci/include/mach/aemif.h
new file mode 100644
index 000000000000..05b293443097
--- /dev/null
+++ b/arch/arm/mach-davinci/include/mach/aemif.h
@@ -0,0 +1,36 @@
+/*
+ * TI DaVinci AEMIF support
+ *
+ * Copyright 2010 (C) Texas Instruments, Inc. http://www.ti.com/
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+#ifndef _MACH_DAVINCI_AEMIF_H
+#define _MACH_DAVINCI_AEMIF_H
+
+#define NRCSR_OFFSET            0x00
+#define AWCCR_OFFSET            0x04
+#define A1CR_OFFSET             0x10
+
+#define ACR_ASIZE_MASK          0x3
+#define ACR_EW_MASK             BIT(30)
+#define ACR_SS_MASK             BIT(31)
+
+/* All timings in nanoseconds */
+struct davinci_aemif_timing {
+        u8      wsetup;
+        u8      wstrobe;
+        u8      whold;
+
+        u8      rsetup;
+        u8      rstrobe;
+        u8      rhold;
+
+        u8      ta;
+};
+
+int davinci_aemif_setup_timing(struct davinci_aemif_timing *t,
+                                        void __iomem *base, unsigned cs);
+#endif
diff --git a/arch/arm/mach-davinci/include/mach/clkdev.h b/arch/arm/mach-davinci/include/mach/clkdev.h
index 730c49d1ebd8..14a504887189 100644
--- a/arch/arm/mach-davinci/include/mach/clkdev.h
+++ b/arch/arm/mach-davinci/include/mach/clkdev.h
@@ -1,6 +1,8 @@
 #ifndef __MACH_CLKDEV_H
 #define __MACH_CLKDEV_H
 
+struct clk;
+
 static inline int __clk_get(struct clk *clk)
 {
         return 1;
diff --git a/arch/arm/mach-davinci/include/mach/cputype.h b/arch/arm/mach-davinci/include/mach/cputype.h
index cea6b8972043..957fb87e832e 100644
--- a/arch/arm/mach-davinci/include/mach/cputype.h
+++ b/arch/arm/mach-davinci/include/mach/cputype.h
@@ -4,7 +4,7 @@
  * Author: Kevin Hilman, Deep Root Systems, LLC
  *
  * Defines the cpu_is_*() macros for runtime detection of DaVinci
- * device type.  In addtion, if support for a given device is not
+ * device type.  In addition, if support for a given device is not
  * compiled in to the kernel, the macros return 0 so that
  * resulting code can be optimized out.
  *
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index 3c07059f526e..ad64da713fc8 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -15,6 +15,7 @@
 
 #include <linux/platform_device.h>
 #include <linux/davinci_emac.h>
+#include <linux/spi/spi.h>
 
 #include <mach/serial.h>
 #include <mach/edma.h>
@@ -23,11 +24,19 @@
 #include <mach/mmc.h>
 #include <mach/usb.h>
 #include <mach/pm.h>
+#include <mach/spi.h>
 
 extern void __iomem *da8xx_syscfg0_base;
 extern void __iomem *da8xx_syscfg1_base;
 
 /*
+ * If the DA850/OMAP-L138/AM18x SoC on board is of a higher speed grade
+ * (than the regular 300Mhz variant), the board code should set this up
+ * with the supported speed before calling da850_register_cpufreq().
+ */
+extern unsigned int da850_max_speed;
+
+/*
  * The cp_intc interrupt controller for the da8xx isn't in the same
  * chunk of physical memory space as the other registers (like it is
  * on the davincis) so it needs to be mapped separately.  It will be
@@ -55,13 +64,9 @@ extern void __iomem *da8xx_syscfg1_base;
 #define DA8XX_TIMER64P1_BASE    0x01c21000
 #define DA8XX_GPIO_BASE         0x01e26000
 #define DA8XX_PSC1_BASE         0x01e27000
-#define DA8XX_LCD_CNTRL_BASE    0x01e13000
-#define DA8XX_PLL1_BASE         0x01e1a000
-#define DA8XX_MMCSD0_BASE       0x01c40000
 #define DA8XX_AEMIF_CS2_BASE    0x60000000
 #define DA8XX_AEMIF_CS3_BASE    0x62000000
 #define DA8XX_AEMIF_CTL_BASE    0x68000000
-#define DA8XX_DDR2_CTL_BASE     0xb0000000
 #define DA8XX_ARM_RAM_BASE      0xffff0000
 
 void __init da830_init(void);
@@ -70,15 +75,17 @@ void __init da850_init(void);
 int da830_register_edma(struct edma_rsv_info *rsv);
 int da850_register_edma(struct edma_rsv_info *rsv[2]);
 int da8xx_register_i2c(int instance, struct davinci_i2c_platform_data *pdata);
+int da8xx_register_spi(int instance, struct spi_board_info *info, unsigned len);
 int da8xx_register_watchdog(void);
 int da8xx_register_usb20(unsigned mA, unsigned potpgt);
 int da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata);
 int da8xx_register_emac(void);
 int da8xx_register_lcdc(struct da8xx_lcdc_platform_data *pdata);
 int da8xx_register_mmcsd0(struct davinci_mmc_config *config);
+int da850_register_mmcsd1(struct davinci_mmc_config *config);
 void __init da8xx_register_mcasp(int id, struct snd_platform_data *pdata);
 int da8xx_register_rtc(void);
-int da850_register_cpufreq(void);
+int da850_register_cpufreq(char *async_clk);
 int da8xx_register_cpuidle(void);
 void __iomem * __init da8xx_get_mem_ctlr(void);
 int da850_register_pm(struct platform_device *pdev);
@@ -87,6 +94,7 @@ extern struct platform_device da8xx_serial_device;
 extern struct emac_platform_data da8xx_emac_pdata;
 extern struct da8xx_lcdc_platform_data sharp_lcd035q3dg01_pdata;
 extern struct da8xx_lcdc_platform_data sharp_lk043t1dg01_pdata;
+extern struct davinci_spi_platform_data da8xx_spi_pdata[];
 
 extern struct platform_device da8xx_wdt_device;
 
@@ -115,17 +123,8 @@ extern const short da830_ecap2_pins[];
 extern const short da830_eqep0_pins[];
 extern const short da830_eqep1_pins[];
 
-extern const short da850_uart0_pins[];
-extern const short da850_uart1_pins[];
-extern const short da850_uart2_pins[];
 extern const short da850_i2c0_pins[];
 extern const short da850_i2c1_pins[];
-extern const short da850_cpgmac_pins[];
-extern const short da850_rmii_pins[];
-extern const short da850_mcasp_pins[];
 extern const short da850_lcdcntl_pins[];
-extern const short da850_mmcsd0_pins[];
-extern const short da850_nand_pins[];
-extern const short da850_nor_pins[];
 
 #endif /* __ASM_ARCH_DAVINCI_DA8XX_H */
diff --git a/arch/arm/mach-davinci/include/mach/debug-macro.S b/arch/arm/mach-davinci/include/mach/debug-macro.S
index f761dfdb8689..f8b7ea4f6235 100644
--- a/arch/arm/mach-davinci/include/mach/debug-macro.S
+++ b/arch/arm/mach-davinci/include/mach/debug-macro.S
@@ -24,40 +24,47 @@
 
 #define UART_SHIFT      2
 
+#define davinci_uart_v2p(x)     ((x) - PAGE_OFFSET + PLAT_PHYS_OFFSET)
+#define davinci_uart_p2v(x)     ((x) - PLAT_PHYS_OFFSET + PAGE_OFFSET)
+
                 .pushsection .data
 davinci_uart_phys:      .word   0
 davinci_uart_virt:      .word   0
                 .popsection
 
-                .macro addruart, rx, tmp
+                .macro addruart, rp, rv
 
                 /* Use davinci_uart_phys/virt if already configured */
-10:             mrc     p15, 0, \rx, c1, c0
-                tst     \rx, #1                 @ MMU enabled?
-                ldreq   \rx, =__virt_to_phys(davinci_uart_phys)
-                ldrne   \rx, =davinci_uart_virt
-                ldr     \rx, [\rx]
-                cmp     \rx, #0                 @ is port configured?
+10:             mrc     p15, 0, \rp, c1, c0
+                tst     \rp, #1                 @ MMU enabled?
+                ldreq   \rp, =davinci_uart_v2p(davinci_uart_phys)
+                ldrne   \rp, =davinci_uart_phys
+                add     \rv, \rp, #4            @ davinci_uart_virt
+                ldr     \rp, [\rp, #0]
+                ldr     \rv, [\rv, #0]
+                cmp     \rp, #0                 @ is port configured?
+                cmpne   \rv, #0
                 bne     99f                     @ already configured
 
-                mrc     p15, 0, \rx, c1, c0
-                tst     \rx, #1                 @ MMU enabled?
+                /* Check the debug UART address set in uncompress.h */
+                mrc     p15, 0, \rp, c1, c0
+                tst     \rp, #1                 @ MMU enabled?
 
                 /* Copy uart phys address from decompressor uart info */
-                ldreq   \tmp, =__virt_to_phys(davinci_uart_phys)
-                ldrne   \tmp, =davinci_uart_phys
-                ldreq   \rx, =DAVINCI_UART_INFO
-                ldrne   \rx, =__phys_to_virt(DAVINCI_UART_INFO)
-                ldr     \rx, [\rx, #0]
-                str     \rx, [\tmp]
+                ldreq   \rv, =davinci_uart_v2p(davinci_uart_phys)
+                ldrne   \rv, =davinci_uart_phys
+                ldreq   \rp, =DAVINCI_UART_INFO
+                ldrne   \rp, =davinci_uart_p2v(DAVINCI_UART_INFO)
+                ldr     \rp, [\rp, #0]
+                str     \rp, [\rv]
 
                 /* Copy uart virt address from decompressor uart info */
-                ldreq   \tmp, =__virt_to_phys(davinci_uart_virt)
-                ldrne   \tmp, =davinci_uart_virt
-                ldreq   \rx, =DAVINCI_UART_INFO
-                ldrne   \rx, =__phys_to_virt(DAVINCI_UART_INFO)
-                ldr     \rx, [\rx, #4]
-                str     \rx, [\tmp]
+                ldreq   \rv, =davinci_uart_v2p(davinci_uart_virt)
+                ldrne   \rv, =davinci_uart_virt
+                ldreq   \rp, =DAVINCI_UART_INFO
+                ldrne   \rp, =davinci_uart_p2v(DAVINCI_UART_INFO)
+                ldr     \rp, [\rp, #4]
+                str     \rp, [\rv]
 
                 b       10b
 99:
diff --git a/arch/arm/mach-davinci/include/mach/dm365.h b/arch/arm/mach-davinci/include/mach/dm365.h
index ea5df3b49ec4..2563bf4e93a1 100644
--- a/arch/arm/mach-davinci/include/mach/dm365.h
+++ b/arch/arm/mach-davinci/include/mach/dm365.h
@@ -21,10 +21,10 @@
 #include <media/davinci/vpfe_capture.h>
 
 #define DM365_EMAC_BASE                 (0x01D07000)
+#define DM365_EMAC_MDIO_BASE            (DM365_EMAC_BASE + 0x4000)
 #define DM365_EMAC_CNTRL_OFFSET         (0x0000)
 #define DM365_EMAC_CNTRL_MOD_OFFSET     (0x3000)
 #define DM365_EMAC_CNTRL_RAM_OFFSET     (0x1000)
-#define DM365_EMAC_MDIO_OFFSET          (0x4000)
 #define DM365_EMAC_CNTRL_RAM_SIZE       (0x2000)
 
 /* Base of key scan register bank */
diff --git a/arch/arm/mach-davinci/include/mach/dm644x.h b/arch/arm/mach-davinci/include/mach/dm644x.h
index 6fca568a0fd2..5a1b26d4e68b 100644
--- a/arch/arm/mach-davinci/include/mach/dm644x.h
+++ b/arch/arm/mach-davinci/include/mach/dm644x.h
@@ -28,10 +28,10 @@
 #include <media/davinci/vpfe_capture.h>
 
 #define DM644X_EMAC_BASE                (0x01C80000)
+#define DM644X_EMAC_MDIO_BASE           (DM644X_EMAC_BASE + 0x4000)
 #define DM644X_EMAC_CNTRL_OFFSET        (0x0000)
 #define DM644X_EMAC_CNTRL_MOD_OFFSET    (0x1000)
 #define DM644X_EMAC_CNTRL_RAM_OFFSET    (0x2000)
-#define DM644X_EMAC_MDIO_OFFSET         (0x4000)
 #define DM644X_EMAC_CNTRL_RAM_SIZE      (0x2000)
 
 #define DM644X_ASYNC_EMIF_CONTROL_BASE  0x01E00000
diff --git a/arch/arm/mach-davinci/include/mach/dm646x.h b/arch/arm/mach-davinci/include/mach/dm646x.h
index 0a27ee9a70e1..7a27f3f13913 100644
--- a/arch/arm/mach-davinci/include/mach/dm646x.h
+++ b/arch/arm/mach-davinci/include/mach/dm646x.h
@@ -19,10 +19,10 @@
 #include <linux/davinci_emac.h>
 
 #define DM646X_EMAC_BASE                (0x01C80000)
+#define DM646X_EMAC_MDIO_BASE           (DM646X_EMAC_BASE + 0x4000)
 #define DM646X_EMAC_CNTRL_OFFSET        (0x0000)
 #define DM646X_EMAC_CNTRL_MOD_OFFSET    (0x1000)
 #define DM646X_EMAC_CNTRL_RAM_OFFSET    (0x2000)
-#define DM646X_EMAC_MDIO_OFFSET         (0x4000)
 #define DM646X_EMAC_CNTRL_RAM_SIZE      (0x2000)
 
 #define DM646X_ASYNC_EMIF_CONTROL_BASE  0x20008000
diff --git a/arch/arm/mach-davinci/include/mach/edma.h b/arch/arm/mach-davinci/include/mach/edma.h
index dc10ef6cf572..20c77f29bf0f 100644
--- a/arch/arm/mach-davinci/include/mach/edma.h
+++ b/arch/arm/mach-davinci/include/mach/edma.h
@@ -151,42 +151,6 @@ struct edmacc_param {
 #define DA830_DMACH2EVENT_MAP1          0x00000000u
 #define DA830_EDMA_ARM_OWN              0x30FFCCFFu
 
-/* DA830 specific EDMA3 Events Information */
-enum DA830_edma_ch {
-        DA830_DMACH_MCASP0_RX,
-        DA830_DMACH_MCASP0_TX,
-        DA830_DMACH_MCASP1_RX,
-        DA830_DMACH_MCASP1_TX,
-        DA830_DMACH_MCASP2_RX,
-        DA830_DMACH_MCASP2_TX,
-        DA830_DMACH_GPIO_BNK0INT,
-        DA830_DMACH_GPIO_BNK1INT,
-        DA830_DMACH_UART0_RX,
-        DA830_DMACH_UART0_TX,
-        DA830_DMACH_TMR64P0_EVTOUT12,
-        DA830_DMACH_TMR64P0_EVTOUT34,
-        DA830_DMACH_UART1_RX,
-        DA830_DMACH_UART1_TX,
-        DA830_DMACH_SPI0_RX,
-        DA830_DMACH_SPI0_TX,
-        DA830_DMACH_MMCSD_RX,
-        DA830_DMACH_MMCSD_TX,
-        DA830_DMACH_SPI1_RX,
-        DA830_DMACH_SPI1_TX,
-        DA830_DMACH_DMAX_EVTOUT6,
-        DA830_DMACH_DMAX_EVTOUT7,
-        DA830_DMACH_GPIO_BNK2INT,
-        DA830_DMACH_GPIO_BNK3INT,
-        DA830_DMACH_I2C0_RX,
-        DA830_DMACH_I2C0_TX,
-        DA830_DMACH_I2C1_RX,
-        DA830_DMACH_I2C1_TX,
-        DA830_DMACH_GPIO_BNK4INT,
-        DA830_DMACH_GPIO_BNK5INT,
-        DA830_DMACH_UART2_RX,
-        DA830_DMACH_UART2_TX
-};
-
 /*ch_status paramater of callback function possible values*/
 #define DMA_COMPLETE 1
 #define DMA_CC_ERROR 2
diff --git a/arch/arm/mach-davinci/include/mach/hardware.h b/arch/arm/mach-davinci/include/mach/hardware.h
index c45ba1f62a11..414e0b93e741 100644
--- a/arch/arm/mach-davinci/include/mach/hardware.h
+++ b/arch/arm/mach-davinci/include/mach/hardware.h
@@ -21,9 +21,6 @@
  */
 #define DAVINCI_SYSTEM_MODULE_BASE        0x01C40000
 
-/* System control register offsets */
-#define DM64XX_VDD3P3V_PWDN     0x48
-
 /*
  * I/O mapping
  */
diff --git a/arch/arm/mach-davinci/include/mach/io.h b/arch/arm/mach-davinci/include/mach/io.h
index 62b0a90309ad..d1b954955c12 100644
--- a/arch/arm/mach-davinci/include/mach/io.h
+++ b/arch/arm/mach-davinci/include/mach/io.h
@@ -22,8 +22,8 @@
 #define __mem_isa(a)            (a)
 
 #ifndef __ASSEMBLER__
-#define __arch_ioremap(p, s, t) davinci_ioremap(p, s, t)
-#define __arch_iounmap(v)       davinci_iounmap(v)
+#define __arch_ioremap          davinci_ioremap
+#define __arch_iounmap          davinci_iounmap
 
 void __iomem *davinci_ioremap(unsigned long phys, size_t size,
                               unsigned int type);
diff --git a/arch/arm/mach-davinci/include/mach/memory.h b/arch/arm/mach-davinci/include/mach/memory.h
index 22eb97c1c30b..491249ef209c 100644
--- a/arch/arm/mach-davinci/include/mach/memory.h
+++ b/arch/arm/mach-davinci/include/mach/memory.h
@@ -26,9 +26,9 @@
 #if defined(CONFIG_ARCH_DAVINCI_DA8XX) && defined(CONFIG_ARCH_DAVINCI_DMx)
 #error Cannot enable DaVinci and DA8XX platforms concurrently
 #elif defined(CONFIG_ARCH_DAVINCI_DA8XX)
-#define PHYS_OFFSET DA8XX_DDR_BASE
+#define PLAT_PHYS_OFFSET DA8XX_DDR_BASE
 #else
-#define PHYS_OFFSET DAVINCI_DDR_BASE
+#define PLAT_PHYS_OFFSET DAVINCI_DDR_BASE
 #endif
 
 #define DDR2_SDRCR_OFFSET       0xc
@@ -41,27 +41,11 @@
  */
 #define CONSISTENT_DMA_SIZE (14<<20)
 
-#ifndef __ASSEMBLY__
 /*
  * Restrict DMA-able region to workaround silicon bug.  The bug
  * restricts buffers available for DMA to video hardware to be
  * below 128M
  */
-static inline void
-__arch_adjust_zones(unsigned long *size, unsigned long *holes)
-{
-        unsigned int sz = (128<<20) >> PAGE_SHIFT;
-
-        size[1] = size[0] - sz;
-        size[0] = sz;
-}
-
-#define arch_adjust_zones(zone_size, holes) \
-        if ((meminfo.bank[0].size >> 20) > 128) __arch_adjust_zones(zone_size, holes)
-
-#define ISA_DMA_THRESHOLD       (PHYS_OFFSET + (128<<20) - 1)
-#define MAX_DMA_ADDRESS         (PAGE_OFFSET + (128<<20))
-
-#endif
+#define ARM_DMA_ZONE_SIZE       SZ_128M
 
 #endif /* __ASM_ARCH_MEMORY_H */
diff --git a/arch/arm/mach-davinci/include/mach/mux.h b/arch/arm/mach-davinci/include/mach/mux.h
index de11aac76a80..5d4e0fed828a 100644
--- a/arch/arm/mach-davinci/include/mach/mux.h
+++ b/arch/arm/mach-davinci/include/mach/mux.h
@@ -908,11 +908,15 @@ enum davinci_da850_index {
         DA850_NEMA_CS_2,
 
         /* GPIO function */
+        DA850_GPIO2_4,
         DA850_GPIO2_6,
         DA850_GPIO2_8,
         DA850_GPIO2_15,
+        DA850_GPIO3_12,
+        DA850_GPIO3_13,
         DA850_GPIO4_0,
         DA850_GPIO4_1,
+        DA850_GPIO6_13,
         DA850_RTC_ALARM,
 };
 
diff --git a/arch/arm/mach-davinci/include/mach/nand.h b/arch/arm/mach-davinci/include/mach/nand.h
index b2ad8090bd10..025151049f05 100644
--- a/arch/arm/mach-davinci/include/mach/nand.h
+++ b/arch/arm/mach-davinci/include/mach/nand.h
@@ -30,9 +30,6 @@
 
 #include <linux/mtd/nand.h>
 
-#define NRCSR_OFFSET            0x00
-#define AWCCR_OFFSET            0x04
-#define A1CR_OFFSET             0x10
 #define NANDFCR_OFFSET          0x60
 #define NANDFSR_OFFSET          0x64
 #define NANDF1ECC_OFFSET        0x70
@@ -83,6 +80,9 @@ struct davinci_nand_pdata {		/* platform_data */
         /* Main and mirror bbt descriptor overrides */
         struct nand_bbt_descr   *bbt_td;
         struct nand_bbt_descr   *bbt_md;
+
+        /* Access timings */
+        struct davinci_aemif_timing     *timing;
 };
 
 #endif  /* __ARCH_ARM_DAVINCI_NAND_H */
diff --git a/arch/arm/mach-davinci/include/mach/psc.h b/arch/arm/mach-davinci/include/mach/psc.h
index 983da6e4554c..a47e6f29206e 100644
--- a/arch/arm/mach-davinci/include/mach/psc.h
+++ b/arch/arm/mach-davinci/include/mach/psc.h
@@ -150,7 +150,7 @@
 #define DA8XX_LPSC0_SCR0_SS             10
 #define DA8XX_LPSC0_SCR1_SS             11
 #define DA8XX_LPSC0_SCR2_SS             12
-#define DA8XX_LPSC0_DMAX                13
+#define DA8XX_LPSC0_PRUSS               13
 #define DA8XX_LPSC0_ARM                 14
 #define DA8XX_LPSC0_GEM                 15
 
@@ -172,6 +172,7 @@
 #define DA8XX_LPSC1_UART2               13
 #define DA8XX_LPSC1_LCDC                16
 #define DA8XX_LPSC1_PWM                 17
+#define DA850_LPSC1_MMC_SD1             18
 #define DA8XX_LPSC1_ECAP                20
 #define DA830_LPSC1_EQEP                21
 #define DA850_LPSC1_TPTC2               21
diff --git a/arch/arm/mach-davinci/include/mach/serial.h b/arch/arm/mach-davinci/include/mach/serial.h
index 8051110b8ac3..c9e6ce185a66 100644
--- a/arch/arm/mach-davinci/include/mach/serial.h
+++ b/arch/arm/mach-davinci/include/mach/serial.h
@@ -22,7 +22,7 @@
  *
  * This area sits just below the page tables (see arch/arm/kernel/head.S).
  */
-#define DAVINCI_UART_INFO       (PHYS_OFFSET + 0x3ff8)
+#define DAVINCI_UART_INFO       (PLAT_PHYS_OFFSET + 0x3ff8)
 
 #define DAVINCI_UART0_BASE      (IO_PHYS + 0x20000)
 #define DAVINCI_UART1_BASE      (IO_PHYS + 0x20400)
diff --git a/arch/arm/mach-davinci/include/mach/spi.h b/arch/arm/mach-davinci/include/mach/spi.h
index 910efbf099c0..7af305b37868 100644
--- a/arch/arm/mach-davinci/include/mach/spi.h
+++ b/arch/arm/mach-davinci/include/mach/spi.h
@@ -19,26 +19,71 @@
 #ifndef __ARCH_ARM_DAVINCI_SPI_H
 #define __ARCH_ARM_DAVINCI_SPI_H
 
+#include <mach/edma.h>
+
+#define SPI_INTERN_CS   0xFF
+
 enum {
         SPI_VERSION_1, /* For DM355/DM365/DM6467 */
         SPI_VERSION_2, /* For DA8xx */
 };
 
+/**
+ * davinci_spi_platform_data - Platform data for SPI master device on DaVinci
+ *
+ * @version:    version of the SPI IP. Different DaVinci devices have slightly
+ *              varying versions of the same IP.
+ * @num_chipselect: number of chipselects supported by this SPI master
+ * @intr_line:  interrupt line used to connect the SPI IP to the ARM interrupt
+ *              controller withn the SoC. Possible values are 0 and 1.
+ * @chip_sel:   list of GPIOs which can act as chip-selects for the SPI.
+ *              SPI_INTERN_CS denotes internal SPI chip-select. Not necessary
+ *              to populate if all chip-selects are internal.
+ * @cshold_bug: set this to true if the SPI controller on your chip requires
+ *              a write to CSHOLD bit in between transfers (like in DM355).
+ * @dma_event_q: DMA event queue to use if SPI_IO_TYPE_DMA is used for any
+ *              device on the bus.
+ */
 struct davinci_spi_platform_data {
-        u8      version;
-        u8      num_chipselect;
+        u8                      version;
+        u8                      num_chipselect;
+        u8                      intr_line;
+        u8                      *chip_sel;
+        bool                    cshold_bug;
+        enum dma_event_q        dma_event_q;
+};
+
+/**
+ * davinci_spi_config - Per-chip-select configuration for SPI slave devices
+ *
+ * @wdelay:     amount of delay between transmissions. Measured in number of
+ *              SPI module clocks.
+ * @odd_parity: polarity of parity flag at the end of transmit data stream.
+ *              0 - odd parity, 1 - even parity.
+ * @parity_enable: enable transmission of parity at end of each transmit
+ *              data stream.
+ * @io_type:    type of IO transfer. Choose between polled, interrupt and DMA.
+ * @timer_disable: disable chip-select timers (setup and hold)
+ * @c2tdelay:   chip-select setup time. Measured in number of SPI module clocks.
+ * @t2cdelay:   chip-select hold time. Measured in number of SPI module clocks.
+ * @t2edelay:   transmit data finished to SPI ENAn pin inactive time. Measured
+ *              in number of SPI clocks.
+ * @c2edelay:   chip-select active to SPI ENAn signal active time. Measured in
+ *              number of SPI clocks.
+ */
+struct davinci_spi_config {
         u8      wdelay;
         u8      odd_parity;
         u8      parity_enable;
-        u8      wait_enable;
+#define SPI_IO_TYPE_INTR        0
+#define SPI_IO_TYPE_POLL        1
+#define SPI_IO_TYPE_DMA         2
+        u8      io_type;
         u8      timer_disable;
-        u8      clk_internal;
-        u8      cs_hold;
-        u8      intr_level;
-        u8      poll_mode;
-        u8      use_dma;
         u8      c2tdelay;
         u8      t2cdelay;
+        u8      t2edelay;
+        u8      c2edelay;
 };
 
 #endif  /* __ARCH_ARM_DAVINCI_SPI_H */
diff --git a/arch/arm/mach-davinci/include/mach/tnetv107x.h b/arch/arm/mach-davinci/include/mach/tnetv107x.h
index c72064733123..89c1fdc63c0b 100644
--- a/arch/arm/mach-davinci/include/mach/tnetv107x.h
+++ b/arch/arm/mach-davinci/include/mach/tnetv107x.h
@@ -33,6 +33,9 @@
 #ifndef __ASSEMBLY__
 
 #include <linux/serial_8250.h>
+#include <linux/input/matrix_keypad.h>
+#include <linux/mfd/ti_ssp.h>
+
 #include <mach/mmc.h>
 #include <mach/nand.h>
 #include <mach/serial.h>
@@ -41,6 +44,8 @@ struct tnetv107x_device_info {
         struct davinci_uart_config      *serial_config;
         struct davinci_mmc_config       *mmc_config[2];  /* 2 controllers */
         struct davinci_nand_pdata       *nand_config[4]; /* 4 chipsels */
+        struct matrix_keypad_platform_data *keypad_config;
+        struct ti_ssp_data              *ssp_config;
 };
 
 extern struct platform_device tnetv107x_wdt_device;
diff --git a/arch/arm/mach-davinci/include/mach/uncompress.h b/arch/arm/mach-davinci/include/mach/uncompress.h
index 15a6192ad6eb..78d80683cdc2 100644
--- a/arch/arm/mach-davinci/include/mach/uncompress.h
+++ b/arch/arm/mach-davinci/include/mach/uncompress.h
@@ -25,8 +25,7 @@
 
 #include <mach/serial.h>
 
-static u32 *uart;
-static u32 *uart_info = (u32 *)(DAVINCI_UART_INFO);
+u32 *uart;
 
 /* PORT_16C550A, in polled non-fifo mode */
 static void putc(char c)
@@ -44,6 +43,8 @@ static inline void flush(void)
 
 static inline void set_uart_info(u32 phys, void * __iomem virt)
 {
+        u32 *uart_info = (u32 *)(DAVINCI_UART_INFO);
+
         uart = (u32 *)phys;
         uart_info[0] = phys;
         uart_info[1] = (u32)virt;
@@ -88,6 +89,8 @@ static inline void __arch_decomp_setup(unsigned long arch_id)
                 /* DA8xx boards */
                 DEBUG_LL_DA8XX(davinci_da830_evm,       2);
                 DEBUG_LL_DA8XX(davinci_da850_evm,       2);
+                DEBUG_LL_DA8XX(mityomapl138,            1);
+                DEBUG_LL_DA8XX(omapl138_hawkboard,      2);
 
                 /* TNETV107x boards */
                 DEBUG_LL_TNETV107X(tnetv107x,           1);