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-rw-r--r--arch/arm/mach-davinci/include/mach/aemif.h36
-rw-r--r--arch/arm/mach-davinci/include/mach/da8xx.h8
-rw-r--r--arch/arm/mach-davinci/include/mach/i2c.h26
-rw-r--r--arch/arm/mach-davinci/include/mach/keyscan.h42
-rw-r--r--arch/arm/mach-davinci/include/mach/mmc.h39
-rw-r--r--arch/arm/mach-davinci/include/mach/nand.h90
-rw-r--r--arch/arm/mach-davinci/include/mach/spi.h89
-rw-r--r--arch/arm/mach-davinci/include/mach/tnetv107x.h4
-rw-r--r--arch/arm/mach-davinci/include/mach/usb.h59
9 files changed, 6 insertions, 387 deletions
diff --git a/arch/arm/mach-davinci/include/mach/aemif.h b/arch/arm/mach-davinci/include/mach/aemif.h
deleted file mode 100644
index 05b293443097..000000000000
--- a/arch/arm/mach-davinci/include/mach/aemif.h
+++ /dev/null
@@ -1,36 +0,0 @@
1/*
2 * TI DaVinci AEMIF support
3 *
4 * Copyright 2010 (C) Texas Instruments, Inc. http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10#ifndef _MACH_DAVINCI_AEMIF_H
11#define _MACH_DAVINCI_AEMIF_H
12
13#define NRCSR_OFFSET 0x00
14#define AWCCR_OFFSET 0x04
15#define A1CR_OFFSET 0x10
16
17#define ACR_ASIZE_MASK 0x3
18#define ACR_EW_MASK BIT(30)
19#define ACR_SS_MASK BIT(31)
20
21/* All timings in nanoseconds */
22struct davinci_aemif_timing {
23 u8 wsetup;
24 u8 wstrobe;
25 u8 whold;
26
27 u8 rsetup;
28 u8 rstrobe;
29 u8 rhold;
30
31 u8 ta;
32};
33
34int davinci_aemif_setup_timing(struct davinci_aemif_timing *t,
35 void __iomem *base, unsigned cs);
36#endif
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index a2f1f274f189..33e78ae2a254 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -19,12 +19,12 @@
19 19
20#include <mach/serial.h> 20#include <mach/serial.h>
21#include <mach/edma.h> 21#include <mach/edma.h>
22#include <mach/i2c.h>
23#include <mach/asp.h> 22#include <mach/asp.h>
24#include <mach/mmc.h>
25#include <mach/usb.h>
26#include <mach/pm.h> 23#include <mach/pm.h>
27#include <mach/spi.h> 24#include <linux/platform_data/i2c-davinci.h>
25#include <linux/platform_data/mmc-davinci.h>
26#include <linux/platform_data/usb-davinci.h>
27#include <linux/platform_data/spi-davinci.h>
28 28
29extern void __iomem *da8xx_syscfg0_base; 29extern void __iomem *da8xx_syscfg0_base;
30extern void __iomem *da8xx_syscfg1_base; 30extern void __iomem *da8xx_syscfg1_base;
diff --git a/arch/arm/mach-davinci/include/mach/i2c.h b/arch/arm/mach-davinci/include/mach/i2c.h
deleted file mode 100644
index 2312d197dfb7..000000000000
--- a/arch/arm/mach-davinci/include/mach/i2c.h
+++ /dev/null
@@ -1,26 +0,0 @@
1/*
2 * DaVinci I2C controller platform_device info
3 *
4 * Author: Vladimir Barinov, MontaVista Software, Inc. <source@mvista.com>
5 *
6 * 2007 (c) MontaVista Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
10*/
11
12#ifndef __ASM_ARCH_I2C_H
13#define __ASM_ARCH_I2C_H
14
15/* All frequencies are expressed in kHz */
16struct davinci_i2c_platform_data {
17 unsigned int bus_freq; /* standard bus frequency (kHz) */
18 unsigned int bus_delay; /* post-transaction delay (usec) */
19 unsigned int sda_pin; /* GPIO pin ID to use for SDA */
20 unsigned int scl_pin; /* GPIO pin ID to use for SCL */
21};
22
23/* for board setup code */
24void davinci_init_i2c(struct davinci_i2c_platform_data *);
25
26#endif /* __ASM_ARCH_I2C_H */
diff --git a/arch/arm/mach-davinci/include/mach/keyscan.h b/arch/arm/mach-davinci/include/mach/keyscan.h
deleted file mode 100644
index 7a560e05bda8..000000000000
--- a/arch/arm/mach-davinci/include/mach/keyscan.h
+++ /dev/null
@@ -1,42 +0,0 @@
1/*
2 * Copyright (C) 2009 Texas Instruments, Inc
3 *
4 * Author: Miguel Aguilar <miguel.aguilar@ridgerun.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#ifndef DAVINCI_KEYSCAN_H
22#define DAVINCI_KEYSCAN_H
23
24#include <linux/io.h>
25
26enum davinci_matrix_types {
27 DAVINCI_KEYSCAN_MATRIX_4X4,
28 DAVINCI_KEYSCAN_MATRIX_5X3,
29};
30
31struct davinci_ks_platform_data {
32 int (*device_enable)(struct device *dev);
33 unsigned short *keymap;
34 u32 keymapsize;
35 u8 rep:1;
36 u8 strobe;
37 u8 interval;
38 u8 matrix_type;
39};
40
41#endif
42
diff --git a/arch/arm/mach-davinci/include/mach/mmc.h b/arch/arm/mach-davinci/include/mach/mmc.h
deleted file mode 100644
index 5ba6b22ce338..000000000000
--- a/arch/arm/mach-davinci/include/mach/mmc.h
+++ /dev/null
@@ -1,39 +0,0 @@
1/*
2 * Board-specific MMC configuration
3 */
4
5#ifndef _DAVINCI_MMC_H
6#define _DAVINCI_MMC_H
7
8#include <linux/types.h>
9#include <linux/mmc/host.h>
10
11struct davinci_mmc_config {
12 /* get_cd()/get_wp() may sleep */
13 int (*get_cd)(int module);
14 int (*get_ro)(int module);
15
16 void (*set_power)(int module, bool on);
17
18 /* wires == 0 is equivalent to wires == 4 (4-bit parallel) */
19 u8 wires;
20
21 u32 max_freq;
22
23 /* any additional host capabilities: OR'd in to mmc->f_caps */
24 u32 caps;
25
26 /* Version of the MMC/SD controller */
27 u8 version;
28
29 /* Number of sg segments */
30 u8 nr_sg;
31};
32void davinci_setup_mmc(int module, struct davinci_mmc_config *config);
33
34enum {
35 MMC_CTLR_VERSION_1 = 0, /* DM644x and DM355 */
36 MMC_CTLR_VERSION_2, /* DA830 */
37};
38
39#endif
diff --git a/arch/arm/mach-davinci/include/mach/nand.h b/arch/arm/mach-davinci/include/mach/nand.h
deleted file mode 100644
index 1cf555aef896..000000000000
--- a/arch/arm/mach-davinci/include/mach/nand.h
+++ /dev/null
@@ -1,90 +0,0 @@
1/*
2 * mach-davinci/nand.h
3 *
4 * Copyright © 2006 Texas Instruments.
5 *
6 * Ported to 2.6.23 Copyright © 2008 by
7 * Sander Huijsen <Shuijsen@optelecom-nkf.com>
8 * Troy Kisky <troy.kisky@boundarydevices.com>
9 * Dirk Behme <Dirk.Behme@gmail.com>
10 *
11 * --------------------------------------------------------------------------
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26 */
27
28#ifndef __ARCH_ARM_DAVINCI_NAND_H
29#define __ARCH_ARM_DAVINCI_NAND_H
30
31#include <linux/mtd/nand.h>
32
33#define NANDFCR_OFFSET 0x60
34#define NANDFSR_OFFSET 0x64
35#define NANDF1ECC_OFFSET 0x70
36
37/* 4-bit ECC syndrome registers */
38#define NAND_4BIT_ECC_LOAD_OFFSET 0xbc
39#define NAND_4BIT_ECC1_OFFSET 0xc0
40#define NAND_4BIT_ECC2_OFFSET 0xc4
41#define NAND_4BIT_ECC3_OFFSET 0xc8
42#define NAND_4BIT_ECC4_OFFSET 0xcc
43#define NAND_ERR_ADD1_OFFSET 0xd0
44#define NAND_ERR_ADD2_OFFSET 0xd4
45#define NAND_ERR_ERRVAL1_OFFSET 0xd8
46#define NAND_ERR_ERRVAL2_OFFSET 0xdc
47
48/* NOTE: boards don't need to use these address bits
49 * for ALE/CLE unless they support booting from NAND.
50 * They're used unless platform data overrides them.
51 */
52#define MASK_ALE 0x08
53#define MASK_CLE 0x10
54
55struct davinci_nand_pdata { /* platform_data */
56 uint32_t mask_ale;
57 uint32_t mask_cle;
58
59 /* for packages using two chipselects */
60 uint32_t mask_chipsel;
61
62 /* board's default static partition info */
63 struct mtd_partition *parts;
64 unsigned nr_parts;
65
66 /* none == NAND_ECC_NONE (strongly *not* advised!!)
67 * soft == NAND_ECC_SOFT
68 * else == NAND_ECC_HW, according to ecc_bits
69 *
70 * All DaVinci-family chips support 1-bit hardware ECC.
71 * Newer ones also support 4-bit ECC, but are awkward
72 * using it with large page chips.
73 */
74 nand_ecc_modes_t ecc_mode;
75 u8 ecc_bits;
76
77 /* e.g. NAND_BUSWIDTH_16 */
78 unsigned options;
79 /* e.g. NAND_BBT_USE_FLASH */
80 unsigned bbt_options;
81
82 /* Main and mirror bbt descriptor overrides */
83 struct nand_bbt_descr *bbt_td;
84 struct nand_bbt_descr *bbt_md;
85
86 /* Access timings */
87 struct davinci_aemif_timing *timing;
88};
89
90#endif /* __ARCH_ARM_DAVINCI_NAND_H */
diff --git a/arch/arm/mach-davinci/include/mach/spi.h b/arch/arm/mach-davinci/include/mach/spi.h
deleted file mode 100644
index 7af305b37868..000000000000
--- a/arch/arm/mach-davinci/include/mach/spi.h
+++ /dev/null
@@ -1,89 +0,0 @@
1/*
2 * Copyright 2009 Texas Instruments.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 */
18
19#ifndef __ARCH_ARM_DAVINCI_SPI_H
20#define __ARCH_ARM_DAVINCI_SPI_H
21
22#include <mach/edma.h>
23
24#define SPI_INTERN_CS 0xFF
25
26enum {
27 SPI_VERSION_1, /* For DM355/DM365/DM6467 */
28 SPI_VERSION_2, /* For DA8xx */
29};
30
31/**
32 * davinci_spi_platform_data - Platform data for SPI master device on DaVinci
33 *
34 * @version: version of the SPI IP. Different DaVinci devices have slightly
35 * varying versions of the same IP.
36 * @num_chipselect: number of chipselects supported by this SPI master
37 * @intr_line: interrupt line used to connect the SPI IP to the ARM interrupt
38 * controller withn the SoC. Possible values are 0 and 1.
39 * @chip_sel: list of GPIOs which can act as chip-selects for the SPI.
40 * SPI_INTERN_CS denotes internal SPI chip-select. Not necessary
41 * to populate if all chip-selects are internal.
42 * @cshold_bug: set this to true if the SPI controller on your chip requires
43 * a write to CSHOLD bit in between transfers (like in DM355).
44 * @dma_event_q: DMA event queue to use if SPI_IO_TYPE_DMA is used for any
45 * device on the bus.
46 */
47struct davinci_spi_platform_data {
48 u8 version;
49 u8 num_chipselect;
50 u8 intr_line;
51 u8 *chip_sel;
52 bool cshold_bug;
53 enum dma_event_q dma_event_q;
54};
55
56/**
57 * davinci_spi_config - Per-chip-select configuration for SPI slave devices
58 *
59 * @wdelay: amount of delay between transmissions. Measured in number of
60 * SPI module clocks.
61 * @odd_parity: polarity of parity flag at the end of transmit data stream.
62 * 0 - odd parity, 1 - even parity.
63 * @parity_enable: enable transmission of parity at end of each transmit
64 * data stream.
65 * @io_type: type of IO transfer. Choose between polled, interrupt and DMA.
66 * @timer_disable: disable chip-select timers (setup and hold)
67 * @c2tdelay: chip-select setup time. Measured in number of SPI module clocks.
68 * @t2cdelay: chip-select hold time. Measured in number of SPI module clocks.
69 * @t2edelay: transmit data finished to SPI ENAn pin inactive time. Measured
70 * in number of SPI clocks.
71 * @c2edelay: chip-select active to SPI ENAn signal active time. Measured in
72 * number of SPI clocks.
73 */
74struct davinci_spi_config {
75 u8 wdelay;
76 u8 odd_parity;
77 u8 parity_enable;
78#define SPI_IO_TYPE_INTR 0
79#define SPI_IO_TYPE_POLL 1
80#define SPI_IO_TYPE_DMA 2
81 u8 io_type;
82 u8 timer_disable;
83 u8 c2tdelay;
84 u8 t2cdelay;
85 u8 t2edelay;
86 u8 c2edelay;
87};
88
89#endif /* __ARCH_ARM_DAVINCI_SPI_H */
diff --git a/arch/arm/mach-davinci/include/mach/tnetv107x.h b/arch/arm/mach-davinci/include/mach/tnetv107x.h
index 83e5926f3c46..1656a02e3eda 100644
--- a/arch/arm/mach-davinci/include/mach/tnetv107x.h
+++ b/arch/arm/mach-davinci/include/mach/tnetv107x.h
@@ -36,8 +36,8 @@
36#include <linux/input/matrix_keypad.h> 36#include <linux/input/matrix_keypad.h>
37#include <linux/mfd/ti_ssp.h> 37#include <linux/mfd/ti_ssp.h>
38 38
39#include <mach/mmc.h> 39#include <linux/platform_data/mmc-davinci.h>
40#include <mach/nand.h> 40#include <linux/platform_data/mtd-davinci.h>
41#include <mach/serial.h> 41#include <mach/serial.h>
42 42
43struct tnetv107x_device_info { 43struct tnetv107x_device_info {
diff --git a/arch/arm/mach-davinci/include/mach/usb.h b/arch/arm/mach-davinci/include/mach/usb.h
deleted file mode 100644
index e0bc4abe69c2..000000000000
--- a/arch/arm/mach-davinci/include/mach/usb.h
+++ /dev/null
@@ -1,59 +0,0 @@
1/*
2 * USB related definitions
3 *
4 * Copyright (C) 2009 MontaVista Software, Inc. <source@mvista.com>
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11#ifndef __ASM_ARCH_USB_H
12#define __ASM_ARCH_USB_H
13
14/* DA8xx CFGCHIP2 (USB 2.0 PHY Control) register bits */
15#define CFGCHIP2_PHYCLKGD (1 << 17)
16#define CFGCHIP2_VBUSSENSE (1 << 16)
17#define CFGCHIP2_RESET (1 << 15)
18#define CFGCHIP2_OTGMODE (3 << 13)
19#define CFGCHIP2_NO_OVERRIDE (0 << 13)
20#define CFGCHIP2_FORCE_HOST (1 << 13)
21#define CFGCHIP2_FORCE_DEVICE (2 << 13)
22#define CFGCHIP2_FORCE_HOST_VBUS_LOW (3 << 13)
23#define CFGCHIP2_USB1PHYCLKMUX (1 << 12)
24#define CFGCHIP2_USB2PHYCLKMUX (1 << 11)
25#define CFGCHIP2_PHYPWRDN (1 << 10)
26#define CFGCHIP2_OTGPWRDN (1 << 9)
27#define CFGCHIP2_DATPOL (1 << 8)
28#define CFGCHIP2_USB1SUSPENDM (1 << 7)
29#define CFGCHIP2_PHY_PLLON (1 << 6) /* override PLL suspend */
30#define CFGCHIP2_SESENDEN (1 << 5) /* Vsess_end comparator */
31#define CFGCHIP2_VBDTCTEN (1 << 4) /* Vbus comparator */
32#define CFGCHIP2_REFFREQ (0xf << 0)
33#define CFGCHIP2_REFFREQ_12MHZ (1 << 0)
34#define CFGCHIP2_REFFREQ_24MHZ (2 << 0)
35#define CFGCHIP2_REFFREQ_48MHZ (3 << 0)
36
37struct da8xx_ohci_root_hub;
38
39typedef void (*da8xx_ocic_handler_t)(struct da8xx_ohci_root_hub *hub,
40 unsigned port);
41
42/* Passed as the platform data to the OHCI driver */
43struct da8xx_ohci_root_hub {
44 /* Switch the port power on/off */
45 int (*set_power)(unsigned port, int on);
46 /* Read the port power status */
47 int (*get_power)(unsigned port);
48 /* Read the port over-current indicator */
49 int (*get_oci)(unsigned port);
50 /* Over-current indicator change notification (pass NULL to disable) */
51 int (*ocic_notify)(da8xx_ocic_handler_t handler);
52
53 /* Time from power on to power good (in 2 ms units) */
54 u8 potpgt;
55};
56
57void davinci_setup_usb(unsigned mA, unsigned potpgt_ms);
58
59#endif /* ifndef __ASM_ARCH_USB_H */
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