diff options
Diffstat (limited to 'arch/arm/mach-davinci/include/mach/irqs.h')
-rw-r--r-- | arch/arm/mach-davinci/include/mach/irqs.h | 205 |
1 files changed, 202 insertions, 3 deletions
diff --git a/arch/arm/mach-davinci/include/mach/irqs.h b/arch/arm/mach-davinci/include/mach/irqs.h index bc5d6aaa69a3..3c918a772619 100644 --- a/arch/arm/mach-davinci/include/mach/irqs.h +++ b/arch/arm/mach-davinci/include/mach/irqs.h | |||
@@ -99,9 +99,6 @@ | |||
99 | #define IRQ_EMUINT 63 | 99 | #define IRQ_EMUINT 63 |
100 | 100 | ||
101 | #define DAVINCI_N_AINTC_IRQ 64 | 101 | #define DAVINCI_N_AINTC_IRQ 64 |
102 | #define DAVINCI_N_GPIO 104 | ||
103 | |||
104 | #define NR_IRQS (DAVINCI_N_AINTC_IRQ + DAVINCI_N_GPIO) | ||
105 | 102 | ||
106 | #define ARCH_TIMER_IRQ IRQ_TINT1_TINT34 | 103 | #define ARCH_TIMER_IRQ IRQ_TINT1_TINT34 |
107 | 104 | ||
@@ -206,4 +203,206 @@ | |||
206 | #define IRQ_DM355_GPIOBNK5 59 | 203 | #define IRQ_DM355_GPIOBNK5 59 |
207 | #define IRQ_DM355_GPIOBNK6 60 | 204 | #define IRQ_DM355_GPIOBNK6 60 |
208 | 205 | ||
206 | /* DaVinci DM365-specific Interrupts */ | ||
207 | #define IRQ_DM365_INSFINT 7 | ||
208 | #define IRQ_DM365_IMXINT1 8 | ||
209 | #define IRQ_DM365_IMXINT0 10 | ||
210 | #define IRQ_DM365_KLD_ARMINT 10 | ||
211 | #define IRQ_DM365_IMCOPINT 11 | ||
212 | #define IRQ_DM365_RTOINT 13 | ||
213 | #define IRQ_DM365_TINT5 14 | ||
214 | #define IRQ_DM365_TINT6 15 | ||
215 | #define IRQ_DM365_SPINT2_1 21 | ||
216 | #define IRQ_DM365_TINT7 22 | ||
217 | #define IRQ_DM365_SDIOINT0 23 | ||
218 | #define IRQ_DM365_MMCINT1 27 | ||
219 | #define IRQ_DM365_PWMINT3 28 | ||
220 | #define IRQ_DM365_SDIOINT1 31 | ||
221 | #define IRQ_DM365_SPIINT0_0 42 | ||
222 | #define IRQ_DM365_SPIINT3_0 43 | ||
223 | #define IRQ_DM365_GPIO0 44 | ||
224 | #define IRQ_DM365_GPIO1 45 | ||
225 | #define IRQ_DM365_GPIO2 46 | ||
226 | #define IRQ_DM365_GPIO3 47 | ||
227 | #define IRQ_DM365_GPIO4 48 | ||
228 | #define IRQ_DM365_GPIO5 49 | ||
229 | #define IRQ_DM365_GPIO6 50 | ||
230 | #define IRQ_DM365_GPIO7 51 | ||
231 | #define IRQ_DM365_EMAC_RXTHRESH 52 | ||
232 | #define IRQ_DM365_EMAC_RXPULSE 53 | ||
233 | #define IRQ_DM365_EMAC_TXPULSE 54 | ||
234 | #define IRQ_DM365_EMAC_MISCPULSE 55 | ||
235 | #define IRQ_DM365_GPIO12 56 | ||
236 | #define IRQ_DM365_GPIO13 57 | ||
237 | #define IRQ_DM365_GPIO14 58 | ||
238 | #define IRQ_DM365_GPIO15 59 | ||
239 | #define IRQ_DM365_ADCINT 59 | ||
240 | #define IRQ_DM365_KEYINT 60 | ||
241 | #define IRQ_DM365_TCERRINT2 61 | ||
242 | #define IRQ_DM365_TCERRINT3 62 | ||
243 | #define IRQ_DM365_EMUINT 63 | ||
244 | |||
245 | /* DA8XX interrupts */ | ||
246 | #define IRQ_DA8XX_COMMTX 0 | ||
247 | #define IRQ_DA8XX_COMMRX 1 | ||
248 | #define IRQ_DA8XX_NINT 2 | ||
249 | #define IRQ_DA8XX_EVTOUT0 3 | ||
250 | #define IRQ_DA8XX_EVTOUT1 4 | ||
251 | #define IRQ_DA8XX_EVTOUT2 5 | ||
252 | #define IRQ_DA8XX_EVTOUT3 6 | ||
253 | #define IRQ_DA8XX_EVTOUT4 7 | ||
254 | #define IRQ_DA8XX_EVTOUT5 8 | ||
255 | #define IRQ_DA8XX_EVTOUT6 9 | ||
256 | #define IRQ_DA8XX_EVTOUT7 10 | ||
257 | #define IRQ_DA8XX_CCINT0 11 | ||
258 | #define IRQ_DA8XX_CCERRINT 12 | ||
259 | #define IRQ_DA8XX_TCERRINT0 13 | ||
260 | #define IRQ_DA8XX_AEMIFINT 14 | ||
261 | #define IRQ_DA8XX_I2CINT0 15 | ||
262 | #define IRQ_DA8XX_MMCSDINT0 16 | ||
263 | #define IRQ_DA8XX_MMCSDINT1 17 | ||
264 | #define IRQ_DA8XX_ALLINT0 18 | ||
265 | #define IRQ_DA8XX_RTC 19 | ||
266 | #define IRQ_DA8XX_SPINT0 20 | ||
267 | #define IRQ_DA8XX_TINT12_0 21 | ||
268 | #define IRQ_DA8XX_TINT34_0 22 | ||
269 | #define IRQ_DA8XX_TINT12_1 23 | ||
270 | #define IRQ_DA8XX_TINT34_1 24 | ||
271 | #define IRQ_DA8XX_UARTINT0 25 | ||
272 | #define IRQ_DA8XX_KEYMGRINT 26 | ||
273 | #define IRQ_DA8XX_SECINT 26 | ||
274 | #define IRQ_DA8XX_SECKEYERR 26 | ||
275 | #define IRQ_DA8XX_CHIPINT0 28 | ||
276 | #define IRQ_DA8XX_CHIPINT1 29 | ||
277 | #define IRQ_DA8XX_CHIPINT2 30 | ||
278 | #define IRQ_DA8XX_CHIPINT3 31 | ||
279 | #define IRQ_DA8XX_TCERRINT1 32 | ||
280 | #define IRQ_DA8XX_C0_RX_THRESH_PULSE 33 | ||
281 | #define IRQ_DA8XX_C0_RX_PULSE 34 | ||
282 | #define IRQ_DA8XX_C0_TX_PULSE 35 | ||
283 | #define IRQ_DA8XX_C0_MISC_PULSE 36 | ||
284 | #define IRQ_DA8XX_C1_RX_THRESH_PULSE 37 | ||
285 | #define IRQ_DA8XX_C1_RX_PULSE 38 | ||
286 | #define IRQ_DA8XX_C1_TX_PULSE 39 | ||
287 | #define IRQ_DA8XX_C1_MISC_PULSE 40 | ||
288 | #define IRQ_DA8XX_MEMERR 41 | ||
289 | #define IRQ_DA8XX_GPIO0 42 | ||
290 | #define IRQ_DA8XX_GPIO1 43 | ||
291 | #define IRQ_DA8XX_GPIO2 44 | ||
292 | #define IRQ_DA8XX_GPIO3 45 | ||
293 | #define IRQ_DA8XX_GPIO4 46 | ||
294 | #define IRQ_DA8XX_GPIO5 47 | ||
295 | #define IRQ_DA8XX_GPIO6 48 | ||
296 | #define IRQ_DA8XX_GPIO7 49 | ||
297 | #define IRQ_DA8XX_GPIO8 50 | ||
298 | #define IRQ_DA8XX_I2CINT1 51 | ||
299 | #define IRQ_DA8XX_LCDINT 52 | ||
300 | #define IRQ_DA8XX_UARTINT1 53 | ||
301 | #define IRQ_DA8XX_MCASPINT 54 | ||
302 | #define IRQ_DA8XX_ALLINT1 55 | ||
303 | #define IRQ_DA8XX_SPINT1 56 | ||
304 | #define IRQ_DA8XX_UHPI_INT1 57 | ||
305 | #define IRQ_DA8XX_USB_INT 58 | ||
306 | #define IRQ_DA8XX_IRQN 59 | ||
307 | #define IRQ_DA8XX_RWAKEUP 60 | ||
308 | #define IRQ_DA8XX_UARTINT2 61 | ||
309 | #define IRQ_DA8XX_DFTSSINT 62 | ||
310 | #define IRQ_DA8XX_EHRPWM0 63 | ||
311 | #define IRQ_DA8XX_EHRPWM0TZ 64 | ||
312 | #define IRQ_DA8XX_EHRPWM1 65 | ||
313 | #define IRQ_DA8XX_EHRPWM1TZ 66 | ||
314 | #define IRQ_DA8XX_ECAP0 69 | ||
315 | #define IRQ_DA8XX_ECAP1 70 | ||
316 | #define IRQ_DA8XX_ECAP2 71 | ||
317 | #define IRQ_DA8XX_ARMCLKSTOPREQ 90 | ||
318 | |||
319 | /* DA830 specific interrupts */ | ||
320 | #define IRQ_DA830_MPUERR 27 | ||
321 | #define IRQ_DA830_IOPUERR 27 | ||
322 | #define IRQ_DA830_BOOTCFGERR 27 | ||
323 | #define IRQ_DA830_EHRPWM2 67 | ||
324 | #define IRQ_DA830_EHRPWM2TZ 68 | ||
325 | #define IRQ_DA830_EQEP0 72 | ||
326 | #define IRQ_DA830_EQEP1 73 | ||
327 | #define IRQ_DA830_T12CMPINT0_0 74 | ||
328 | #define IRQ_DA830_T12CMPINT1_0 75 | ||
329 | #define IRQ_DA830_T12CMPINT2_0 76 | ||
330 | #define IRQ_DA830_T12CMPINT3_0 77 | ||
331 | #define IRQ_DA830_T12CMPINT4_0 78 | ||
332 | #define IRQ_DA830_T12CMPINT5_0 79 | ||
333 | #define IRQ_DA830_T12CMPINT6_0 80 | ||
334 | #define IRQ_DA830_T12CMPINT7_0 81 | ||
335 | #define IRQ_DA830_T12CMPINT0_1 82 | ||
336 | #define IRQ_DA830_T12CMPINT1_1 83 | ||
337 | #define IRQ_DA830_T12CMPINT2_1 84 | ||
338 | #define IRQ_DA830_T12CMPINT3_1 85 | ||
339 | #define IRQ_DA830_T12CMPINT4_1 86 | ||
340 | #define IRQ_DA830_T12CMPINT5_1 87 | ||
341 | #define IRQ_DA830_T12CMPINT6_1 88 | ||
342 | #define IRQ_DA830_T12CMPINT7_1 89 | ||
343 | |||
344 | #define DA830_N_CP_INTC_IRQ 96 | ||
345 | |||
346 | /* DA850 speicific interrupts */ | ||
347 | #define IRQ_DA850_MPUADDRERR0 27 | ||
348 | #define IRQ_DA850_MPUPROTERR0 27 | ||
349 | #define IRQ_DA850_IOPUADDRERR0 27 | ||
350 | #define IRQ_DA850_IOPUPROTERR0 27 | ||
351 | #define IRQ_DA850_IOPUADDRERR1 27 | ||
352 | #define IRQ_DA850_IOPUPROTERR1 27 | ||
353 | #define IRQ_DA850_IOPUADDRERR2 27 | ||
354 | #define IRQ_DA850_IOPUPROTERR2 27 | ||
355 | #define IRQ_DA850_BOOTCFG_ADDR_ERR 27 | ||
356 | #define IRQ_DA850_BOOTCFG_PROT_ERR 27 | ||
357 | #define IRQ_DA850_MPUADDRERR1 27 | ||
358 | #define IRQ_DA850_MPUPROTERR1 27 | ||
359 | #define IRQ_DA850_IOPUADDRERR3 27 | ||
360 | #define IRQ_DA850_IOPUPROTERR3 27 | ||
361 | #define IRQ_DA850_IOPUADDRERR4 27 | ||
362 | #define IRQ_DA850_IOPUPROTERR4 27 | ||
363 | #define IRQ_DA850_IOPUADDRERR5 27 | ||
364 | #define IRQ_DA850_IOPUPROTERR5 27 | ||
365 | #define IRQ_DA850_MIOPU_BOOTCFG_ERR 27 | ||
366 | #define IRQ_DA850_SATAINT 67 | ||
367 | #define IRQ_DA850_TINT12_2 68 | ||
368 | #define IRQ_DA850_TINT34_2 68 | ||
369 | #define IRQ_DA850_TINTALL_2 68 | ||
370 | #define IRQ_DA850_MMCSDINT0_1 72 | ||
371 | #define IRQ_DA850_MMCSDINT1_1 73 | ||
372 | #define IRQ_DA850_T12CMPINT0_2 74 | ||
373 | #define IRQ_DA850_T12CMPINT1_2 75 | ||
374 | #define IRQ_DA850_T12CMPINT2_2 76 | ||
375 | #define IRQ_DA850_T12CMPINT3_2 77 | ||
376 | #define IRQ_DA850_T12CMPINT4_2 78 | ||
377 | #define IRQ_DA850_T12CMPINT5_2 79 | ||
378 | #define IRQ_DA850_T12CMPINT6_2 80 | ||
379 | #define IRQ_DA850_T12CMPINT7_2 81 | ||
380 | #define IRQ_DA850_T12CMPINT0_3 82 | ||
381 | #define IRQ_DA850_T12CMPINT1_3 83 | ||
382 | #define IRQ_DA850_T12CMPINT2_3 84 | ||
383 | #define IRQ_DA850_T12CMPINT3_3 85 | ||
384 | #define IRQ_DA850_T12CMPINT4_3 86 | ||
385 | #define IRQ_DA850_T12CMPINT5_3 87 | ||
386 | #define IRQ_DA850_T12CMPINT6_3 88 | ||
387 | #define IRQ_DA850_T12CMPINT7_3 89 | ||
388 | #define IRQ_DA850_RPIINT 91 | ||
389 | #define IRQ_DA850_VPIFINT 92 | ||
390 | #define IRQ_DA850_CCINT1 93 | ||
391 | #define IRQ_DA850_CCERRINT1 94 | ||
392 | #define IRQ_DA850_TCERRINT2 95 | ||
393 | #define IRQ_DA850_TINT12_3 96 | ||
394 | #define IRQ_DA850_TINT34_3 96 | ||
395 | #define IRQ_DA850_TINTALL_3 96 | ||
396 | #define IRQ_DA850_MCBSP0RINT 97 | ||
397 | #define IRQ_DA850_MCBSP0XINT 98 | ||
398 | #define IRQ_DA850_MCBSP1RINT 99 | ||
399 | #define IRQ_DA850_MCBSP1XINT 100 | ||
400 | |||
401 | #define DA850_N_CP_INTC_IRQ 101 | ||
402 | |||
403 | /* da850 currently has the most gpio pins (144) */ | ||
404 | #define DAVINCI_N_GPIO 144 | ||
405 | /* da850 currently has the most irqs so use DA850_N_CP_INTC_IRQ */ | ||
406 | #define NR_IRQS (DA850_N_CP_INTC_IRQ + DAVINCI_N_GPIO) | ||
407 | |||
209 | #endif /* __ASM_ARCH_IRQS_H */ | 408 | #endif /* __ASM_ARCH_IRQS_H */ |