diff options
Diffstat (limited to 'arch/arm/mach-davinci/include/mach/gpio.h')
-rw-r--r-- | arch/arm/mach-davinci/include/mach/gpio.h | 27 |
1 files changed, 13 insertions, 14 deletions
diff --git a/arch/arm/mach-davinci/include/mach/gpio.h b/arch/arm/mach-davinci/include/mach/gpio.h index b456f079f43f..efe3281364e6 100644 --- a/arch/arm/mach-davinci/include/mach/gpio.h +++ b/arch/arm/mach-davinci/include/mach/gpio.h | |||
@@ -15,9 +15,11 @@ | |||
15 | 15 | ||
16 | #include <linux/io.h> | 16 | #include <linux/io.h> |
17 | #include <asm-generic/gpio.h> | 17 | #include <asm-generic/gpio.h> |
18 | #include <mach/hardware.h> | 18 | |
19 | #include <mach/irqs.h> | 19 | #include <mach/irqs.h> |
20 | 20 | ||
21 | #define DAVINCI_GPIO_BASE 0x01C67000 | ||
22 | |||
21 | /* | 23 | /* |
22 | * basic gpio routines | 24 | * basic gpio routines |
23 | * | 25 | * |
@@ -26,23 +28,18 @@ | |||
26 | * go through boot loaders. | 28 | * go through boot loaders. |
27 | * | 29 | * |
28 | * the gpio clock will be turned on when gpios are used, and you may also | 30 | * the gpio clock will be turned on when gpios are used, and you may also |
29 | * need to pay attention to PINMUX0 and PINMUX1 to be sure those pins are | 31 | * need to pay attention to PINMUX registers to be sure those pins are |
30 | * used as gpios, not with other peripherals. | 32 | * used as gpios, not with other peripherals. |
31 | * | 33 | * |
32 | * On-chip GPIOs are numbered 0..(DAVINCI_N_GPIO-1). For documentation, | 34 | * On-chip GPIOs are numbered 0..(DAVINCI_N_GPIO-1). For documentation, |
33 | * and maybe for later updates, code should write GPIO(N) or: | 35 | * and maybe for later updates, code may write GPIO(N). These may be |
34 | * - GPIOV18(N) for 1.8V pins, N in 0..53; same as GPIO(0)..GPIO(53) | 36 | * all 1.8V signals, all 3.3V ones, or a mix of the two. A given chip |
35 | * - GPIOV33(N) for 3.3V pins, N in 0..17; same as GPIO(54)..GPIO(70) | 37 | * may not support all the GPIOs in that range. |
36 | * | ||
37 | * For GPIO IRQs use gpio_to_irq(GPIO(N)) or gpio_to_irq(GPIOV33(N)) etc | ||
38 | * for now, that's != GPIO(N) | ||
39 | * | 38 | * |
40 | * GPIOs can also be on external chips, numbered after the ones built-in | 39 | * GPIOs can also be on external chips, numbered after the ones built-in |
41 | * to the DaVinci chip. For now, they won't be usable as IRQ sources. | 40 | * to the DaVinci chip. For now, they won't be usable as IRQ sources. |
42 | */ | 41 | */ |
43 | #define GPIO(X) (X) /* 0 <= X <= 70 */ | 42 | #define GPIO(X) (X) /* 0 <= X <= (DAVINCI_N_GPIO - 1) */ |
44 | #define GPIOV18(X) (X) /* 1.8V i/o; 0 <= X <= 53 */ | ||
45 | #define GPIOV33(X) ((X)+54) /* 3.3V i/o; 0 <= X <= 17 */ | ||
46 | 43 | ||
47 | struct gpio_controller { | 44 | struct gpio_controller { |
48 | u32 dir; | 45 | u32 dir; |
@@ -71,12 +68,14 @@ __gpio_to_controller(unsigned gpio) | |||
71 | { | 68 | { |
72 | void *__iomem ptr; | 69 | void *__iomem ptr; |
73 | 70 | ||
74 | if (gpio < 32) | 71 | if (gpio < 32 * 1) |
75 | ptr = IO_ADDRESS(DAVINCI_GPIO_BASE + 0x10); | 72 | ptr = IO_ADDRESS(DAVINCI_GPIO_BASE + 0x10); |
76 | else if (gpio < 64) | 73 | else if (gpio < 32 * 2) |
77 | ptr = IO_ADDRESS(DAVINCI_GPIO_BASE + 0x38); | 74 | ptr = IO_ADDRESS(DAVINCI_GPIO_BASE + 0x38); |
78 | else if (gpio < DAVINCI_N_GPIO) | 75 | else if (gpio < 32 * 3) |
79 | ptr = IO_ADDRESS(DAVINCI_GPIO_BASE + 0x60); | 76 | ptr = IO_ADDRESS(DAVINCI_GPIO_BASE + 0x60); |
77 | else if (gpio < 32 * 4) | ||
78 | ptr = IO_ADDRESS(DAVINCI_GPIO_BASE + 0x88); | ||
80 | else | 79 | else |
81 | ptr = NULL; | 80 | ptr = NULL; |
82 | return ptr; | 81 | return ptr; |