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Diffstat (limited to 'arch/arm/mach-davinci/include/mach/gpio.h')
-rw-r--r--arch/arm/mach-davinci/include/mach/gpio.h76
1 files changed, 2 insertions, 74 deletions
diff --git a/arch/arm/mach-davinci/include/mach/gpio.h b/arch/arm/mach-davinci/include/mach/gpio.h
index 14e7bb20a33a..fbaae4772b91 100644
--- a/arch/arm/mach-davinci/include/mach/gpio.h
+++ b/arch/arm/mach-davinci/include/mach/gpio.h
@@ -13,82 +13,10 @@
13#ifndef __DAVINCI_GPIO_H 13#ifndef __DAVINCI_GPIO_H
14#define __DAVINCI_GPIO_H 14#define __DAVINCI_GPIO_H
15 15
16#include <linux/io.h>
17#include <linux/spinlock.h>
18
19#include <asm-generic/gpio.h> 16#include <asm-generic/gpio.h>
20 17
21#include <mach/irqs.h> 18/* The inline versions use the static inlines in the driver header */
22#include <mach/common.h> 19#include "gpio-davinci.h"
23
24#define __ARM_GPIOLIB_COMPLEX
25
26#define DAVINCI_GPIO_BASE 0x01C67000
27
28enum davinci_gpio_type {
29 GPIO_TYPE_DAVINCI = 0,
30 GPIO_TYPE_TNETV107X,
31};
32
33/*
34 * basic gpio routines
35 *
36 * board-specific init should be done by arch/.../.../board-XXX.c (maybe
37 * initializing banks together) rather than boot loaders; kexec() won't
38 * go through boot loaders.
39 *
40 * the gpio clock will be turned on when gpios are used, and you may also
41 * need to pay attention to PINMUX registers to be sure those pins are
42 * used as gpios, not with other peripherals.
43 *
44 * On-chip GPIOs are numbered 0..(DAVINCI_N_GPIO-1). For documentation,
45 * and maybe for later updates, code may write GPIO(N). These may be
46 * all 1.8V signals, all 3.3V ones, or a mix of the two. A given chip
47 * may not support all the GPIOs in that range.
48 *
49 * GPIOs can also be on external chips, numbered after the ones built-in
50 * to the DaVinci chip. For now, they won't be usable as IRQ sources.
51 */
52#define GPIO(X) (X) /* 0 <= X <= (DAVINCI_N_GPIO - 1) */
53
54/* Convert GPIO signal to GPIO pin number */
55#define GPIO_TO_PIN(bank, gpio) (16 * (bank) + (gpio))
56
57struct davinci_gpio_controller {
58 struct gpio_chip chip;
59 int irq_base;
60 spinlock_t lock;
61 void __iomem *regs;
62 void __iomem *set_data;
63 void __iomem *clr_data;
64 void __iomem *in_data;
65};
66
67/* The __gpio_to_controller() and __gpio_mask() functions inline to constants
68 * with constant parameters; or in outlined code they execute at runtime.
69 *
70 * You'd access the controller directly when reading or writing more than
71 * one gpio value at a time, and to support wired logic where the value
72 * being driven by the cpu need not match the value read back.
73 *
74 * These are NOT part of the cross-platform GPIO interface
75 */
76static inline struct davinci_gpio_controller *
77__gpio_to_controller(unsigned gpio)
78{
79 struct davinci_gpio_controller *ctlrs = davinci_soc_info.gpio_ctlrs;
80 int index = gpio / 32;
81
82 if (!ctlrs || index >= davinci_soc_info.gpio_ctlrs_num)
83 return NULL;
84
85 return ctlrs + index;
86}
87
88static inline u32 __gpio_mask(unsigned gpio)
89{
90 return 1 << (gpio % 32);
91}
92 20
93/* 21/*
94 * The get/set/clear functions will inline when called with constant 22 * The get/set/clear functions will inline when called with constant