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-rw-r--r--arch/arm/mach-cns3xxx/Kconfig12
-rw-r--r--arch/arm/mach-cns3xxx/Makefile8
-rw-r--r--arch/arm/mach-cns3xxx/cns3420vb.c6
-rw-r--r--arch/arm/mach-cns3xxx/cns3xxx.h (renamed from arch/arm/mach-cns3xxx/include/mach/cns3xxx.h)7
-rw-r--r--arch/arm/mach-cns3xxx/core.c121
-rw-r--r--arch/arm/mach-cns3xxx/devices.c5
-rw-r--r--arch/arm/mach-cns3xxx/include/mach/debug-macro.S19
-rw-r--r--arch/arm/mach-cns3xxx/include/mach/irqs.h24
-rw-r--r--arch/arm/mach-cns3xxx/include/mach/timex.h12
-rw-r--r--arch/arm/mach-cns3xxx/include/mach/uncompress.h53
-rw-r--r--arch/arm/mach-cns3xxx/pcie.c2
-rw-r--r--arch/arm/mach-cns3xxx/pm.c4
-rw-r--r--arch/arm/mach-cns3xxx/pm.h (renamed from arch/arm/mach-cns3xxx/include/mach/pm.h)0
13 files changed, 147 insertions, 126 deletions
diff --git a/arch/arm/mach-cns3xxx/Kconfig b/arch/arm/mach-cns3xxx/Kconfig
index 9ebfcc46feb1..dbf0df8bb0ac 100644
--- a/arch/arm/mach-cns3xxx/Kconfig
+++ b/arch/arm/mach-cns3xxx/Kconfig
@@ -1,8 +1,20 @@
1config ARCH_CNS3XXX
2 bool "Cavium Networks CNS3XXX family" if ARCH_MULTI_V6
3 select ARM_GIC
4 select CPU_V6K
5 select GENERIC_CLOCKEVENTS
6 select MIGHT_HAVE_CACHE_L2X0
7 select MIGHT_HAVE_PCI
8 select PCI_DOMAINS if PCI
9 help
10 Support for Cavium Networks CNS3XXX platform.
11
1menu "CNS3XXX platform type" 12menu "CNS3XXX platform type"
2 depends on ARCH_CNS3XXX 13 depends on ARCH_CNS3XXX
3 14
4config MACH_CNS3420VB 15config MACH_CNS3420VB
5 bool "Support for CNS3420 Validation Board" 16 bool "Support for CNS3420 Validation Board"
17 depends on ATAGS
6 help 18 help
7 Include support for the Cavium Networks CNS3420 MPCore Platform 19 Include support for the Cavium Networks CNS3420 MPCore Platform
8 Baseboard. 20 Baseboard.
diff --git a/arch/arm/mach-cns3xxx/Makefile b/arch/arm/mach-cns3xxx/Makefile
index 11033f1c2e23..a1ff10848698 100644
--- a/arch/arm/mach-cns3xxx/Makefile
+++ b/arch/arm/mach-cns3xxx/Makefile
@@ -1,3 +1,5 @@
1obj-$(CONFIG_ARCH_CNS3XXX) += core.o pm.o devices.o 1obj-$(CONFIG_ARCH_CNS3XXX) += cns3xxx.o
2obj-$(CONFIG_PCI) += pcie.o 2cns3xxx-y += core.o pm.o
3obj-$(CONFIG_MACH_CNS3420VB) += cns3420vb.o 3cns3xxx-$(CONFIG_ATAGS) += devices.o
4cns3xxx-$(CONFIG_PCI) += pcie.o
5cns3xxx-$(CONFIG_MACH_CNS3420VB) += cns3420vb.o
diff --git a/arch/arm/mach-cns3xxx/cns3420vb.c b/arch/arm/mach-cns3xxx/cns3420vb.c
index a71867e1d8d6..ce096d678aa4 100644
--- a/arch/arm/mach-cns3xxx/cns3420vb.c
+++ b/arch/arm/mach-cns3xxx/cns3420vb.c
@@ -31,9 +31,8 @@
31#include <asm/mach/arch.h> 31#include <asm/mach/arch.h>
32#include <asm/mach/map.h> 32#include <asm/mach/map.h>
33#include <asm/mach/time.h> 33#include <asm/mach/time.h>
34#include <mach/cns3xxx.h> 34#include "cns3xxx.h"
35#include <mach/irqs.h> 35#include "pm.h"
36#include <mach/pm.h>
37#include "core.h" 36#include "core.h"
38#include "devices.h" 37#include "devices.h"
39 38
@@ -247,6 +246,7 @@ static void __init cns3420_map_io(void)
247 246
248MACHINE_START(CNS3420VB, "Cavium Networks CNS3420 Validation Board") 247MACHINE_START(CNS3420VB, "Cavium Networks CNS3420 Validation Board")
249 .atag_offset = 0x100, 248 .atag_offset = 0x100,
249 .nr_irqs = NR_IRQS_CNS3XXX,
250 .map_io = cns3420_map_io, 250 .map_io = cns3420_map_io,
251 .init_irq = cns3xxx_init_irq, 251 .init_irq = cns3xxx_init_irq,
252 .init_time = cns3xxx_timer_init, 252 .init_time = cns3xxx_timer_init,
diff --git a/arch/arm/mach-cns3xxx/include/mach/cns3xxx.h b/arch/arm/mach-cns3xxx/cns3xxx.h
index 9b145b1e48ea..a0f5b60662ae 100644
--- a/arch/arm/mach-cns3xxx/include/mach/cns3xxx.h
+++ b/arch/arm/mach-cns3xxx/cns3xxx.h
@@ -526,6 +526,8 @@ int cns3xxx_cpu_clock(void);
526/* 526/*
527 * ARM11 MPCore interrupt sources (primary GIC) 527 * ARM11 MPCore interrupt sources (primary GIC)
528 */ 528 */
529#define IRQ_TC11MP_GIC_START 32
530
529#define IRQ_CNS3XXX_PMU (IRQ_TC11MP_GIC_START + 0) 531#define IRQ_CNS3XXX_PMU (IRQ_TC11MP_GIC_START + 0)
530#define IRQ_CNS3XXX_SDIO (IRQ_TC11MP_GIC_START + 1) 532#define IRQ_CNS3XXX_SDIO (IRQ_TC11MP_GIC_START + 1)
531#define IRQ_CNS3XXX_L2CC (IRQ_TC11MP_GIC_START + 2) 533#define IRQ_CNS3XXX_L2CC (IRQ_TC11MP_GIC_START + 2)
@@ -597,9 +599,4 @@ int cns3xxx_cpu_clock(void);
597 599
598#define NR_IRQS_CNS3XXX (IRQ_TC11MP_GIC_START + 64) 600#define NR_IRQS_CNS3XXX (IRQ_TC11MP_GIC_START + 64)
599 601
600#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_CNS3XXX)
601#undef NR_IRQS
602#define NR_IRQS NR_IRQS_CNS3XXX
603#endif
604
605#endif /* __MACH_BOARD_CNS3XXX_H */ 602#endif /* __MACH_BOARD_CNS3XXX_H */
diff --git a/arch/arm/mach-cns3xxx/core.c b/arch/arm/mach-cns3xxx/core.c
index 126f74f6087c..e38b279f402c 100644
--- a/arch/arm/mach-cns3xxx/core.c
+++ b/arch/arm/mach-cns3xxx/core.c
@@ -13,12 +13,18 @@
13#include <linux/clockchips.h> 13#include <linux/clockchips.h>
14#include <linux/io.h> 14#include <linux/io.h>
15#include <linux/irqchip/arm-gic.h> 15#include <linux/irqchip/arm-gic.h>
16#include <linux/of_platform.h>
17#include <linux/platform_device.h>
18#include <linux/usb/ehci_pdriver.h>
19#include <linux/usb/ohci_pdriver.h>
20#include <asm/mach/arch.h>
16#include <asm/mach/map.h> 21#include <asm/mach/map.h>
17#include <asm/mach/time.h> 22#include <asm/mach/time.h>
18#include <asm/mach/irq.h> 23#include <asm/mach/irq.h>
19#include <asm/hardware/cache-l2x0.h> 24#include <asm/hardware/cache-l2x0.h>
20#include <mach/cns3xxx.h> 25#include "cns3xxx.h"
21#include "core.h" 26#include "core.h"
27#include "pm.h"
22 28
23static struct map_desc cns3xxx_io_desc[] __initdata = { 29static struct map_desc cns3xxx_io_desc[] __initdata = {
24 { 30 {
@@ -256,3 +262,116 @@ void __init cns3xxx_l2x0_init(void)
256} 262}
257 263
258#endif /* CONFIG_CACHE_L2X0 */ 264#endif /* CONFIG_CACHE_L2X0 */
265
266static int csn3xxx_usb_power_on(struct platform_device *pdev)
267{
268 /*
269 * EHCI and OHCI share the same clock and power,
270 * resetting twice would cause the 1st controller been reset.
271 * Therefore only do power up at the first up device, and
272 * power down at the last down device.
273 *
274 * Set USB AHB INCR length to 16
275 */
276 if (atomic_inc_return(&usb_pwr_ref) == 1) {
277 cns3xxx_pwr_power_up(1 << PM_PLL_HM_PD_CTRL_REG_OFFSET_PLL_USB);
278 cns3xxx_pwr_clk_en(1 << PM_CLK_GATE_REG_OFFSET_USB_HOST);
279 cns3xxx_pwr_soft_rst(1 << PM_SOFT_RST_REG_OFFST_USB_HOST);
280 __raw_writel((__raw_readl(MISC_CHIP_CONFIG_REG) | (0X2 << 24)),
281 MISC_CHIP_CONFIG_REG);
282 }
283
284 return 0;
285}
286
287static void csn3xxx_usb_power_off(struct platform_device *pdev)
288{
289 /*
290 * EHCI and OHCI share the same clock and power,
291 * resetting twice would cause the 1st controller been reset.
292 * Therefore only do power up at the first up device, and
293 * power down at the last down device.
294 */
295 if (atomic_dec_return(&usb_pwr_ref) == 0)
296 cns3xxx_pwr_clk_dis(1 << PM_CLK_GATE_REG_OFFSET_USB_HOST);
297}
298
299static struct usb_ehci_pdata cns3xxx_usb_ehci_pdata = {
300 .power_on = csn3xxx_usb_power_on,
301 .power_off = csn3xxx_usb_power_off,
302};
303
304static struct usb_ohci_pdata cns3xxx_usb_ohci_pdata = {
305 .num_ports = 1,
306 .power_on = csn3xxx_usb_power_on,
307 .power_off = csn3xxx_usb_power_off,
308};
309
310static struct of_dev_auxdata cns3xxx_auxdata[] __initconst = {
311 { "intel,usb-ehci", CNS3XXX_USB_BASE, "ehci-platform", &cns3xxx_usb_ehci_pdata },
312 { "intel,usb-ohci", CNS3XXX_USB_OHCI_BASE, "ohci-platform", &cns3xxx_usb_ohci_pdata },
313 { "cavium,cns3420-ahci", CNS3XXX_SATA2_BASE, "ahci", NULL },
314 { "cavium,cns3420-sdhci", CNS3XXX_SDIO_BASE, "ahci", NULL },
315 {},
316};
317
318static void __init cns3xxx_init(void)
319{
320 struct device_node *dn;
321
322 cns3xxx_l2x0_init();
323
324 dn = of_find_compatible_node(NULL, NULL, "cavium,cns3420-ahci");
325 if (of_device_is_available(dn)) {
326 u32 tmp;
327
328 tmp = __raw_readl(MISC_SATA_POWER_MODE);
329 tmp |= 0x1 << 16; /* Disable SATA PHY 0 from SLUMBER Mode */
330 tmp |= 0x1 << 17; /* Disable SATA PHY 1 from SLUMBER Mode */
331 __raw_writel(tmp, MISC_SATA_POWER_MODE);
332
333 /* Enable SATA PHY */
334 cns3xxx_pwr_power_up(0x1 << PM_PLL_HM_PD_CTRL_REG_OFFSET_SATA_PHY0);
335 cns3xxx_pwr_power_up(0x1 << PM_PLL_HM_PD_CTRL_REG_OFFSET_SATA_PHY1);
336
337 /* Enable SATA Clock */
338 cns3xxx_pwr_clk_en(0x1 << PM_CLK_GATE_REG_OFFSET_SATA);
339
340 /* De-Asscer SATA Reset */
341 cns3xxx_pwr_soft_rst(CNS3XXX_PWR_SOFTWARE_RST(SATA));
342 }
343
344 dn = of_find_compatible_node(NULL, NULL, "cavium,cns3420-sdhci");
345 if (of_device_is_available(dn)) {
346 u32 __iomem *gpioa = IOMEM(CNS3XXX_MISC_BASE_VIRT + 0x0014);
347 u32 gpioa_pins = __raw_readl(gpioa);
348
349 /* MMC/SD pins share with GPIOA */
350 gpioa_pins |= 0x1fff0004;
351 __raw_writel(gpioa_pins, gpioa);
352
353 cns3xxx_pwr_clk_en(CNS3XXX_PWR_CLK_EN(SDIO));
354 cns3xxx_pwr_soft_rst(CNS3XXX_PWR_SOFTWARE_RST(SDIO));
355 }
356
357 pm_power_off = cns3xxx_power_off;
358
359 of_platform_populate(NULL, of_default_bus_match_table,
360 cns3xxx_auxdata, NULL);
361}
362
363static const char *cns3xxx_dt_compat[] __initdata = {
364 "cavium,cns3410",
365 "cavium,cns3420",
366 NULL,
367};
368
369DT_MACHINE_START(CNS3XXX_DT, "Cavium Networks CNS3xxx")
370 .dt_compat = cns3xxx_dt_compat,
371 .nr_irqs = NR_IRQS_CNS3XXX,
372 .map_io = cns3xxx_map_io,
373 .init_irq = cns3xxx_init_irq,
374 .init_time = cns3xxx_timer_init,
375 .init_machine = cns3xxx_init,
376 .restart = cns3xxx_restart,
377MACHINE_END
diff --git a/arch/arm/mach-cns3xxx/devices.c b/arch/arm/mach-cns3xxx/devices.c
index 1e40c99b015f..7da78a2451f1 100644
--- a/arch/arm/mach-cns3xxx/devices.c
+++ b/arch/arm/mach-cns3xxx/devices.c
@@ -16,9 +16,8 @@
16#include <linux/compiler.h> 16#include <linux/compiler.h>
17#include <linux/dma-mapping.h> 17#include <linux/dma-mapping.h>
18#include <linux/platform_device.h> 18#include <linux/platform_device.h>
19#include <mach/cns3xxx.h> 19#include "cns3xxx.h"
20#include <mach/irqs.h> 20#include "pm.h"
21#include <mach/pm.h>
22#include "core.h" 21#include "core.h"
23#include "devices.h" 22#include "devices.h"
24 23
diff --git a/arch/arm/mach-cns3xxx/include/mach/debug-macro.S b/arch/arm/mach-cns3xxx/include/mach/debug-macro.S
deleted file mode 100644
index d04c150baa1c..000000000000
--- a/arch/arm/mach-cns3xxx/include/mach/debug-macro.S
+++ /dev/null
@@ -1,19 +0,0 @@
1/*
2 * Debugging macro include header
3 *
4 * Copyright 1994-1999 Russell King
5 * Copyright 2008 Cavium Networks
6 * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
7 *
8 * This file is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License, Version 2, as
10 * published by the Free Software Foundation.
11 */
12
13 .macro addruart,rp,rv,tmp
14 mov \rp, #0x00009000
15 orr \rv, \rp, #0xf0000000 @ virtual base
16 orr \rp, \rp, #0x10000000
17 .endm
18
19#include <asm/hardware/debug-pl01x.S>
diff --git a/arch/arm/mach-cns3xxx/include/mach/irqs.h b/arch/arm/mach-cns3xxx/include/mach/irqs.h
deleted file mode 100644
index 2ab96f8085c8..000000000000
--- a/arch/arm/mach-cns3xxx/include/mach/irqs.h
+++ /dev/null
@@ -1,24 +0,0 @@
1/*
2 * Copyright 2000 Deep Blue Solutions Ltd.
3 * Copyright 2003 ARM Limited
4 * Copyright 2008 Cavium Networks
5 *
6 * This file is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License, Version 2, as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __MACH_IRQS_H
12#define __MACH_IRQS_H
13
14#define IRQ_LOCALTIMER 29
15#define IRQ_LOCALWDOG 30
16#define IRQ_TC11MP_GIC_START 32
17
18#include <mach/cns3xxx.h>
19
20#ifndef NR_IRQS
21#error "NR_IRQS not defined by the board-specific files"
22#endif
23
24#endif
diff --git a/arch/arm/mach-cns3xxx/include/mach/timex.h b/arch/arm/mach-cns3xxx/include/mach/timex.h
deleted file mode 100644
index 1fd04217cacb..000000000000
--- a/arch/arm/mach-cns3xxx/include/mach/timex.h
+++ /dev/null
@@ -1,12 +0,0 @@
1/*
2 * Cavium Networks architecture timex specifications
3 *
4 * Copyright 2003 ARM Limited
5 * Copyright 2008 Cavium Networks
6 *
7 * This file is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License, Version 2, as
9 * published by the Free Software Foundation.
10 */
11
12#define CLOCK_TICK_RATE (50000000 / 16)
diff --git a/arch/arm/mach-cns3xxx/include/mach/uncompress.h b/arch/arm/mach-cns3xxx/include/mach/uncompress.h
deleted file mode 100644
index 7a030b99df84..000000000000
--- a/arch/arm/mach-cns3xxx/include/mach/uncompress.h
+++ /dev/null
@@ -1,53 +0,0 @@
1/*
2 * Copyright 2003 ARM Limited
3 * Copyright 2008 Cavium Networks
4 *
5 * This file is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License, Version 2, as
7 * published by the Free Software Foundation.
8 */
9
10#include <asm/mach-types.h>
11#include <mach/cns3xxx.h>
12
13#define AMBA_UART_DR(base) (*(volatile unsigned char *)((base) + 0x00))
14#define AMBA_UART_LCRH(base) (*(volatile unsigned char *)((base) + 0x2c))
15#define AMBA_UART_CR(base) (*(volatile unsigned char *)((base) + 0x30))
16#define AMBA_UART_FR(base) (*(volatile unsigned char *)((base) + 0x18))
17
18/*
19 * Return the UART base address
20 */
21static inline unsigned long get_uart_base(void)
22{
23 if (machine_is_cns3420vb())
24 return CNS3XXX_UART0_BASE;
25 else
26 return 0;
27}
28
29/*
30 * This does not append a newline
31 */
32static inline void putc(int c)
33{
34 unsigned long base = get_uart_base();
35
36 while (AMBA_UART_FR(base) & (1 << 5))
37 barrier();
38
39 AMBA_UART_DR(base) = c;
40}
41
42static inline void flush(void)
43{
44 unsigned long base = get_uart_base();
45
46 while (AMBA_UART_FR(base) & (1 << 3))
47 barrier();
48}
49
50/*
51 * nothing to do
52 */
53#define arch_decomp_setup()
diff --git a/arch/arm/mach-cns3xxx/pcie.c b/arch/arm/mach-cns3xxx/pcie.c
index 311328314163..c7b204bff386 100644
--- a/arch/arm/mach-cns3xxx/pcie.c
+++ b/arch/arm/mach-cns3xxx/pcie.c
@@ -20,7 +20,7 @@
20#include <linux/interrupt.h> 20#include <linux/interrupt.h>
21#include <linux/ptrace.h> 21#include <linux/ptrace.h>
22#include <asm/mach/map.h> 22#include <asm/mach/map.h>
23#include <mach/cns3xxx.h> 23#include "cns3xxx.h"
24#include "core.h" 24#include "core.h"
25 25
26enum cns3xxx_access_type { 26enum cns3xxx_access_type {
diff --git a/arch/arm/mach-cns3xxx/pm.c b/arch/arm/mach-cns3xxx/pm.c
index 36458080332a..79e3d47aad65 100644
--- a/arch/arm/mach-cns3xxx/pm.c
+++ b/arch/arm/mach-cns3xxx/pm.c
@@ -11,8 +11,8 @@
11#include <linux/io.h> 11#include <linux/io.h>
12#include <linux/delay.h> 12#include <linux/delay.h>
13#include <linux/atomic.h> 13#include <linux/atomic.h>
14#include <mach/cns3xxx.h> 14#include "cns3xxx.h"
15#include <mach/pm.h> 15#include "pm.h"
16#include "core.h" 16#include "core.h"
17 17
18void cns3xxx_pwr_clk_en(unsigned int block) 18void cns3xxx_pwr_clk_en(unsigned int block)
diff --git a/arch/arm/mach-cns3xxx/include/mach/pm.h b/arch/arm/mach-cns3xxx/pm.h
index c2588cc991d1..c2588cc991d1 100644
--- a/arch/arm/mach-cns3xxx/include/mach/pm.h
+++ b/arch/arm/mach-cns3xxx/pm.h
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-26 23:48:03 -0500