1 files changed, 10 insertions, 9 deletions

diff --git a/arch/arm/mach-bcmring/csp/chipc/chipcHw_reset.c b/arch/arm/mach-bcmring/csp/chipc/chipcHw_reset.c
index 2671d8896bbb..f95ce913fa1e 100644
--- a/arch/arm/mach-bcmring/csp/chipc/chipcHw_reset.c
+++ b/arch/arm/mach-bcmring/csp/chipc/chipcHw_reset.c
@@ -13,11 +13,11 @@
 *****************************************************************************/
 
 /* ---- Include Files ---------------------------------------------------- */
-#include <csp/stdint.h>
+#include <linux/types.h>
 #include <mach/csp/chipcHw_def.h>
 #include <mach/csp/chipcHw_inline.h>
-#include <csp/intcHw.h>
-#include <csp/cache.h>
+#include <mach/csp/intcHw_reg.h>
+#include <asm/cacheflush.h>
 
 /* ---- Private Constants and Types --------------------------------------- */
 /* ---- Private Variables ------------------------------------------------- */
@@ -50,17 +50,18 @@ void chipcHw_reset(uint32_t mask)
                         chipcHw_softReset(chipcHw_REG_SOFT_RESET_CHIP_SOFT);
                 }
                 /* Bypass the PLL clocks before reboot */
-                pChipcHw->UARTClock |= chipcHw_REG_PLL_CLOCK_BYPASS_SELECT;
-                pChipcHw->SPIClock |= chipcHw_REG_PLL_CLOCK_BYPASS_SELECT;
+                writel(readl(&pChipcHw->UARTClock) | chipcHw_REG_PLL_CLOCK_BYPASS_SELECT,
+                        &pChipcHw->UARTClock);
+                writel(readl(&pChipcHw->SPIClock) | chipcHw_REG_PLL_CLOCK_BYPASS_SELECT,
+                        &pChipcHw->SPIClock);
 
                 /* Copy the chipcHw_warmReset_run_from_aram function into ARAM */
                 do {
-                        ((uint32_t *) MM_IO_BASE_ARAM)[i] =
-                            ((uint32_t *) &chipcHw_reset_run_from_aram)[i];
+                        writel(((uint32_t *) &chipcHw_reset_run_from_aram)[i], ((uint32_t __iomem *) MM_IO_BASE_ARAM) + i);
                         i++;
-                } while (((uint32_t *) MM_IO_BASE_ARAM)[i - 1] != 0xe1a0f00f);  /* 0xe1a0f00f == asm ("mov r15, r15"); */
+                } while (readl(((uint32_t __iomem*) MM_IO_BASE_ARAM) + i - 1) != 0xe1a0f00f);   /* 0xe1a0f00f == asm ("mov r15, r15"); */
 
-                CSP_CACHE_FLUSH_ALL;
+                flush_cache_all();
 
                 /* run the function from ARAM */
                 runFunc();