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-rw-r--r--arch/arm/mach-at91/Makefile2
-rw-r--r--arch/arm/mach-at91/at91cap9.c45
-rw-r--r--arch/arm/mach-at91/at91rm9200.c47
-rw-r--r--arch/arm/mach-at91/at91sam9260.c100
-rw-r--r--arch/arm/mach-at91/at91sam9261.c62
-rw-r--r--arch/arm/mach-at91/at91sam9261_devices.c2
-rw-r--r--arch/arm/mach-at91/at91sam9263.c51
-rw-r--r--arch/arm/mach-at91/at91sam9g45.c45
-rw-r--r--arch/arm/mach-at91/at91sam9rl.c59
-rw-r--r--arch/arm/mach-at91/board-1arm.c11
-rw-r--r--arch/arm/mach-at91/board-afeb-9260v1.c12
-rw-r--r--arch/arm/mach-at91/board-cam60.c12
-rw-r--r--arch/arm/mach-at91/board-cap9adk.c12
-rw-r--r--arch/arm/mach-at91/board-carmeva.c11
-rw-r--r--arch/arm/mach-at91/board-cpu9krea.c11
-rw-r--r--arch/arm/mach-at91/board-cpuat91.c11
-rw-r--r--arch/arm/mach-at91/board-csb337.c11
-rw-r--r--arch/arm/mach-at91/board-csb637.c11
-rw-r--r--arch/arm/mach-at91/board-eb9200.c11
-rw-r--r--arch/arm/mach-at91/board-ecbat91.c11
-rw-r--r--arch/arm/mach-at91/board-eco920.c11
-rw-r--r--arch/arm/mach-at91/board-flexibity.c11
-rw-r--r--arch/arm/mach-at91/board-foxg20.c12
-rw-r--r--arch/arm/mach-at91/board-gsia18s.c9
-rw-r--r--arch/arm/mach-at91/board-kafa.c11
-rw-r--r--arch/arm/mach-at91/board-kb9202.c11
-rw-r--r--arch/arm/mach-at91/board-neocore926.c12
-rw-r--r--arch/arm/mach-at91/board-pcontrol-g20.c11
-rw-r--r--arch/arm/mach-at91/board-picotux200.c11
-rw-r--r--arch/arm/mach-at91/board-qil-a9260.c12
-rw-r--r--arch/arm/mach-at91/board-rm9200dk.c11
-rw-r--r--arch/arm/mach-at91/board-rm9200ek.c11
-rw-r--r--arch/arm/mach-at91/board-sam9-l9260.c12
-rw-r--r--arch/arm/mach-at91/board-sam9260ek.c12
-rw-r--r--arch/arm/mach-at91/board-sam9261ek.c12
-rw-r--r--arch/arm/mach-at91/board-sam9263ek.c12
-rw-r--r--arch/arm/mach-at91/board-sam9g20ek.c16
-rw-r--r--arch/arm/mach-at91/board-sam9m10g45ek.c12
-rw-r--r--arch/arm/mach-at91/board-sam9rlek.c12
-rw-r--r--arch/arm/mach-at91/board-snapper9260.c13
-rw-r--r--arch/arm/mach-at91/board-stamp9g20.c16
-rw-r--r--arch/arm/mach-at91/board-usb-a9260.c12
-rw-r--r--arch/arm/mach-at91/board-usb-a9263.c12
-rw-r--r--arch/arm/mach-at91/board-yl-9200.c12
-rw-r--r--arch/arm/mach-at91/generic.h34
-rw-r--r--arch/arm/mach-at91/include/mach/at91_dbgu.h27
-rw-r--r--arch/arm/mach-at91/include/mach/at91_mci.h115
-rw-r--r--arch/arm/mach-at91/include/mach/at91_wdt.h37
-rw-r--r--arch/arm/mach-at91/include/mach/at91cap9.h1
-rw-r--r--arch/arm/mach-at91/include/mach/at91rm9200.h1
-rw-r--r--arch/arm/mach-at91/include/mach/at91sam9260.h1
-rw-r--r--arch/arm/mach-at91/include/mach/at91sam9261.h1
-rw-r--r--arch/arm/mach-at91/include/mach/at91sam9263.h1
-rw-r--r--arch/arm/mach-at91/include/mach/at91sam9g45.h1
-rw-r--r--arch/arm/mach-at91/include/mach/at91sam9rl.h1
-rw-r--r--arch/arm/mach-at91/include/mach/clkdev.h7
-rw-r--r--arch/arm/mach-at91/include/mach/cpu.h159
-rw-r--r--arch/arm/mach-at91/include/mach/debug-macro.S14
-rw-r--r--arch/arm/mach-at91/include/mach/hardware.h14
-rw-r--r--arch/arm/mach-at91/include/mach/io.h11
-rw-r--r--arch/arm/mach-at91/pm.c2
-rw-r--r--arch/arm/mach-at91/setup.c297
-rw-r--r--arch/arm/mach-at91/soc.h59
63 files changed, 699 insertions, 907 deletions
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index 96966231920c..bf57e8b1c9d0 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -2,7 +2,7 @@
2# Makefile for the linux kernel. 2# Makefile for the linux kernel.
3# 3#
4 4
5obj-y := irq.o gpio.o 5obj-y := irq.o gpio.o setup.o
6obj-m := 6obj-m :=
7obj-n := 7obj-n :=
8obj- := 8obj- :=
diff --git a/arch/arm/mach-at91/at91cap9.c b/arch/arm/mach-at91/at91cap9.c
index f1013d08bb57..bfc684441ef8 100644
--- a/arch/arm/mach-at91/at91cap9.c
+++ b/arch/arm/mach-at91/at91cap9.c
@@ -25,23 +25,10 @@
25#include <mach/at91_rstc.h> 25#include <mach/at91_rstc.h>
26#include <mach/at91_shdwc.h> 26#include <mach/at91_shdwc.h>
27 27
28#include "soc.h"
28#include "generic.h" 29#include "generic.h"
29#include "clock.h" 30#include "clock.h"
30 31
31static struct map_desc at91cap9_io_desc[] __initdata = {
32 {
33 .virtual = AT91_VA_BASE_SYS,
34 .pfn = __phys_to_pfn(AT91_BASE_SYS),
35 .length = SZ_16K,
36 .type = MT_DEVICE,
37 }, {
38 .virtual = AT91_IO_VIRT_BASE - AT91CAP9_SRAM_SIZE,
39 .pfn = __phys_to_pfn(AT91CAP9_SRAM_BASE),
40 .length = AT91CAP9_SRAM_SIZE,
41 .type = MT_DEVICE,
42 },
43};
44
45/* -------------------------------------------------------------------- 32/* --------------------------------------------------------------------
46 * Clocks 33 * Clocks
47 * -------------------------------------------------------------------- */ 34 * -------------------------------------------------------------------- */
@@ -339,24 +326,17 @@ static void at91cap9_poweroff(void)
339 * AT91CAP9 processor initialization 326 * AT91CAP9 processor initialization
340 * -------------------------------------------------------------------- */ 327 * -------------------------------------------------------------------- */
341 328
342void __init at91cap9_map_io(void) 329static void __init at91cap9_map_io(void)
343{ 330{
344 /* Map peripherals */ 331 at91_init_sram(0, AT91CAP9_SRAM_BASE, AT91CAP9_SRAM_SIZE);
345 iotable_init(at91cap9_io_desc, ARRAY_SIZE(at91cap9_io_desc));
346} 332}
347 333
348void __init at91cap9_initialize(unsigned long main_clock) 334static void __init at91cap9_initialize(void)
349{ 335{
350 at91_arch_reset = at91cap9_reset; 336 at91_arch_reset = at91cap9_reset;
351 pm_power_off = at91cap9_poweroff; 337 pm_power_off = at91cap9_poweroff;
352 at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1); 338 at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1);
353 339
354 /* Init clock subsystem */
355 at91_clock_init(main_clock);
356
357 /* Register the processor-specific clocks */
358 at91cap9_register_clocks();
359
360 /* Register GPIO subsystem */ 340 /* Register GPIO subsystem */
361 at91_gpio_init(at91cap9_gpio, 4); 341 at91_gpio_init(at91cap9_gpio, 4);
362 342
@@ -409,14 +389,9 @@ static unsigned int at91cap9_default_irq_priority[NR_AIC_IRQS] __initdata = {
409 0, /* Advanced Interrupt Controller (IRQ1) */ 389 0, /* Advanced Interrupt Controller (IRQ1) */
410}; 390};
411 391
412void __init at91cap9_init_interrupts(unsigned int priority[NR_AIC_IRQS]) 392struct at91_init_soc __initdata at91cap9_soc = {
413{ 393 .map_io = at91cap9_map_io,
414 if (!priority) 394 .default_irq_priority = at91cap9_default_irq_priority,
415 priority = at91cap9_default_irq_priority; 395 .register_clocks = at91cap9_register_clocks,
416 396 .init = at91cap9_initialize,
417 /* Initialize the AIC interrupt controller */ 397};
418 at91_aic_init(priority);
419
420 /* Enable GPIO interrupts */
421 at91_gpio_irq_setup();
422}
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
index 83a1a3fee554..f73302dbc6a5 100644
--- a/arch/arm/mach-at91/at91rm9200.c
+++ b/arch/arm/mach-at91/at91rm9200.c
@@ -20,25 +20,16 @@
20#include <mach/at91_st.h> 20#include <mach/at91_st.h>
21#include <mach/cpu.h> 21#include <mach/cpu.h>
22 22
23#include "soc.h"
23#include "generic.h" 24#include "generic.h"
24#include "clock.h" 25#include "clock.h"
25 26
26static struct map_desc at91rm9200_io_desc[] __initdata = { 27static struct map_desc at91rm9200_io_desc[] __initdata = {
27 { 28 {
28 .virtual = AT91_VA_BASE_SYS,
29 .pfn = __phys_to_pfn(AT91_BASE_SYS),
30 .length = SZ_4K,
31 .type = MT_DEVICE,
32 }, {
33 .virtual = AT91_VA_BASE_EMAC, 29 .virtual = AT91_VA_BASE_EMAC,
34 .pfn = __phys_to_pfn(AT91RM9200_BASE_EMAC), 30 .pfn = __phys_to_pfn(AT91RM9200_BASE_EMAC),
35 .length = SZ_16K, 31 .length = SZ_16K,
36 .type = MT_DEVICE, 32 .type = MT_DEVICE,
37 }, {
38 .virtual = AT91_IO_VIRT_BASE - AT91RM9200_SRAM_SIZE,
39 .pfn = __phys_to_pfn(AT91RM9200_SRAM_BASE),
40 .length = AT91RM9200_SRAM_SIZE,
41 .type = MT_DEVICE,
42 }, 33 },
43}; 34};
44 35
@@ -304,24 +295,17 @@ static void at91rm9200_reset(void)
304 at91_sys_write(AT91_ST_CR, AT91_ST_WDRST); 295 at91_sys_write(AT91_ST_CR, AT91_ST_WDRST);
305} 296}
306 297
307int rm9200_type;
308EXPORT_SYMBOL(rm9200_type);
309
310void __init at91rm9200_set_type(int type)
311{
312 rm9200_type = type;
313}
314
315/* -------------------------------------------------------------------- 298/* --------------------------------------------------------------------
316 * AT91RM9200 processor initialization 299 * AT91RM9200 processor initialization
317 * -------------------------------------------------------------------- */ 300 * -------------------------------------------------------------------- */
318void __init at91rm9200_map_io(void) 301static void __init at91rm9200_map_io(void)
319{ 302{
320 /* Map peripherals */ 303 /* Map peripherals */
304 at91_init_sram(0, AT91RM9200_SRAM_BASE, AT91RM9200_SRAM_SIZE);
321 iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc)); 305 iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc));
322} 306}
323 307
324void __init at91rm9200_initialize(unsigned long main_clock) 308static void __init at91rm9200_initialize(void)
325{ 309{
326 at91_arch_reset = at91rm9200_reset; 310 at91_arch_reset = at91rm9200_reset;
327 at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1) 311 at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1)
@@ -329,12 +313,6 @@ void __init at91rm9200_initialize(unsigned long main_clock)
329 | (1 << AT91RM9200_ID_IRQ4) | (1 << AT91RM9200_ID_IRQ5) 313 | (1 << AT91RM9200_ID_IRQ4) | (1 << AT91RM9200_ID_IRQ5)
330 | (1 << AT91RM9200_ID_IRQ6); 314 | (1 << AT91RM9200_ID_IRQ6);
331 315
332 /* Init clock subsystem */
333 at91_clock_init(main_clock);
334
335 /* Register the processor-specific clocks */
336 at91rm9200_register_clocks();
337
338 /* Initialize GPIO subsystem */ 316 /* Initialize GPIO subsystem */
339 at91_gpio_init(at91rm9200_gpio, 317 at91_gpio_init(at91rm9200_gpio,
340 cpu_is_at91rm9200_bga() ? AT91RM9200_BGA : AT91RM9200_PQFP); 318 cpu_is_at91rm9200_bga() ? AT91RM9200_BGA : AT91RM9200_PQFP);
@@ -383,14 +361,9 @@ static unsigned int at91rm9200_default_irq_priority[NR_AIC_IRQS] __initdata = {
383 0 /* Advanced Interrupt Controller (IRQ6) */ 361 0 /* Advanced Interrupt Controller (IRQ6) */
384}; 362};
385 363
386void __init at91rm9200_init_interrupts(unsigned int priority[NR_AIC_IRQS]) 364struct at91_init_soc __initdata at91rm9200_soc = {
387{ 365 .map_io = at91rm9200_map_io,
388 if (!priority) 366 .default_irq_priority = at91rm9200_default_irq_priority,
389 priority = at91rm9200_default_irq_priority; 367 .register_clocks = at91rm9200_register_clocks,
390 368 .init = at91rm9200_initialize,
391 /* Initialize the AIC interrupt controller */ 369};
392 at91_aic_init(priority);
393
394 /* Enable GPIO interrupts */
395 at91_gpio_irq_setup();
396}
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index 7d606b04d313..cb397be14448 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -17,58 +17,16 @@
17#include <asm/mach/arch.h> 17#include <asm/mach/arch.h>
18#include <asm/mach/map.h> 18#include <asm/mach/map.h>
19#include <mach/cpu.h> 19#include <mach/cpu.h>
20#include <mach/at91_dbgu.h>
20#include <mach/at91sam9260.h> 21#include <mach/at91sam9260.h>
21#include <mach/at91_pmc.h> 22#include <mach/at91_pmc.h>
22#include <mach/at91_rstc.h> 23#include <mach/at91_rstc.h>
23#include <mach/at91_shdwc.h> 24#include <mach/at91_shdwc.h>
24 25
26#include "soc.h"
25#include "generic.h" 27#include "generic.h"
26#include "clock.h" 28#include "clock.h"
27 29
28static struct map_desc at91sam9260_io_desc[] __initdata = {
29 {
30 .virtual = AT91_VA_BASE_SYS,
31 .pfn = __phys_to_pfn(AT91_BASE_SYS),
32 .length = SZ_16K,
33 .type = MT_DEVICE,
34 }
35};
36
37static struct map_desc at91sam9260_sram_desc[] __initdata = {
38 {
39 .virtual = AT91_IO_VIRT_BASE - AT91SAM9260_SRAM0_SIZE,
40 .pfn = __phys_to_pfn(AT91SAM9260_SRAM0_BASE),
41 .length = AT91SAM9260_SRAM0_SIZE,
42 .type = MT_DEVICE,
43 }, {
44 .virtual = AT91_IO_VIRT_BASE - AT91SAM9260_SRAM0_SIZE - AT91SAM9260_SRAM1_SIZE,
45 .pfn = __phys_to_pfn(AT91SAM9260_SRAM1_BASE),
46 .length = AT91SAM9260_SRAM1_SIZE,
47 .type = MT_DEVICE,
48 }
49};
50
51static struct map_desc at91sam9g20_sram_desc[] __initdata = {
52 {
53 .virtual = AT91_IO_VIRT_BASE - AT91SAM9G20_SRAM0_SIZE,
54 .pfn = __phys_to_pfn(AT91SAM9G20_SRAM0_BASE),
55 .length = AT91SAM9G20_SRAM0_SIZE,
56 .type = MT_DEVICE,
57 }, {
58 .virtual = AT91_IO_VIRT_BASE - AT91SAM9G20_SRAM0_SIZE - AT91SAM9G20_SRAM1_SIZE,
59 .pfn = __phys_to_pfn(AT91SAM9G20_SRAM1_BASE),
60 .length = AT91SAM9G20_SRAM1_SIZE,
61 .type = MT_DEVICE,
62 }
63};
64
65static struct map_desc at91sam9xe_sram_desc[] __initdata = {
66 {
67 .pfn = __phys_to_pfn(AT91SAM9XE_SRAM_BASE),
68 .type = MT_DEVICE,
69 }
70};
71
72/* -------------------------------------------------------------------- 30/* --------------------------------------------------------------------
73 * Clocks 31 * Clocks
74 * -------------------------------------------------------------------- */ 32 * -------------------------------------------------------------------- */
@@ -330,11 +288,9 @@ static void at91sam9260_poweroff(void)
330 288
331static void __init at91sam9xe_map_io(void) 289static void __init at91sam9xe_map_io(void)
332{ 290{
333 unsigned long cidr, sram_size; 291 unsigned long sram_size;
334
335 cidr = at91_sys_read(AT91_DBGU_CIDR);
336 292
337 switch (cidr & AT91_CIDR_SRAMSIZ) { 293 switch (at91_soc_initdata.cidr & AT91_CIDR_SRAMSIZ) {
338 case AT91_CIDR_SRAMSIZ_32K: 294 case AT91_CIDR_SRAMSIZ_32K:
339 sram_size = 2 * SZ_16K; 295 sram_size = 2 * SZ_16K;
340 break; 296 break;
@@ -343,38 +299,29 @@ static void __init at91sam9xe_map_io(void)
343 sram_size = SZ_16K; 299 sram_size = SZ_16K;
344 } 300 }
345 301
346 at91sam9xe_sram_desc->virtual = AT91_IO_VIRT_BASE - sram_size; 302 at91_init_sram(0, AT91SAM9XE_SRAM_BASE, sram_size);
347 at91sam9xe_sram_desc->length = sram_size;
348
349 iotable_init(at91sam9xe_sram_desc, ARRAY_SIZE(at91sam9xe_sram_desc));
350} 303}
351 304
352void __init at91sam9260_map_io(void) 305static void __init at91sam9260_map_io(void)
353{ 306{
354 /* Map peripherals */ 307 if (cpu_is_at91sam9xe()) {
355 iotable_init(at91sam9260_io_desc, ARRAY_SIZE(at91sam9260_io_desc));
356
357 if (cpu_is_at91sam9xe())
358 at91sam9xe_map_io(); 308 at91sam9xe_map_io();
359 else if (cpu_is_at91sam9g20()) 309 } else if (cpu_is_at91sam9g20()) {
360 iotable_init(at91sam9g20_sram_desc, ARRAY_SIZE(at91sam9g20_sram_desc)); 310 at91_init_sram(0, AT91SAM9G20_SRAM0_BASE, AT91SAM9G20_SRAM0_SIZE);
361 else 311 at91_init_sram(1, AT91SAM9G20_SRAM1_BASE, AT91SAM9G20_SRAM1_SIZE);
362 iotable_init(at91sam9260_sram_desc, ARRAY_SIZE(at91sam9260_sram_desc)); 312 } else {
313 at91_init_sram(0, AT91SAM9260_SRAM0_BASE, AT91SAM9260_SRAM0_SIZE);
314 at91_init_sram(1, AT91SAM9260_SRAM1_BASE, AT91SAM9260_SRAM1_SIZE);
315 }
363} 316}
364 317
365void __init at91sam9260_initialize(unsigned long main_clock) 318static void __init at91sam9260_initialize(void)
366{ 319{
367 at91_arch_reset = at91sam9_alt_reset; 320 at91_arch_reset = at91sam9_alt_reset;
368 pm_power_off = at91sam9260_poweroff; 321 pm_power_off = at91sam9260_poweroff;
369 at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1) 322 at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
370 | (1 << AT91SAM9260_ID_IRQ2); 323 | (1 << AT91SAM9260_ID_IRQ2);
371 324
372 /* Init clock subsystem */
373 at91_clock_init(main_clock);
374
375 /* Register the processor-specific clocks */
376 at91sam9260_register_clocks();
377
378 /* Register GPIO subsystem */ 325 /* Register GPIO subsystem */
379 at91_gpio_init(at91sam9260_gpio, 3); 326 at91_gpio_init(at91sam9260_gpio, 3);
380} 327}
@@ -421,14 +368,9 @@ static unsigned int at91sam9260_default_irq_priority[NR_AIC_IRQS] __initdata = {
421 0, /* Advanced Interrupt Controller */ 368 0, /* Advanced Interrupt Controller */
422}; 369};
423 370
424void __init at91sam9260_init_interrupts(unsigned int priority[NR_AIC_IRQS]) 371struct at91_init_soc __initdata at91sam9260_soc = {
425{ 372 .map_io = at91sam9260_map_io,
426 if (!priority) 373 .default_irq_priority = at91sam9260_default_irq_priority,
427 priority = at91sam9260_default_irq_priority; 374 .register_clocks = at91sam9260_register_clocks,
428 375 .init = at91sam9260_initialize,
429 /* Initialize the AIC interrupt controller */ 376};
430 at91_aic_init(priority);
431
432 /* Enable GPIO interrupts */
433 at91_gpio_irq_setup();
434}
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index c1483168c97a..d522b47e30b5 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -22,36 +22,10 @@
22#include <mach/at91_rstc.h> 22#include <mach/at91_rstc.h>
23#include <mach/at91_shdwc.h> 23#include <mach/at91_shdwc.h>
24 24
25#include "soc.h"
25#include "generic.h" 26#include "generic.h"
26#include "clock.h" 27#include "clock.h"
27 28
28static struct map_desc at91sam9261_io_desc[] __initdata = {
29 {
30 .virtual = AT91_VA_BASE_SYS,
31 .pfn = __phys_to_pfn(AT91_BASE_SYS),
32 .length = SZ_16K,
33 .type = MT_DEVICE,
34 },
35};
36
37static struct map_desc at91sam9261_sram_desc[] __initdata = {
38 {
39 .virtual = AT91_IO_VIRT_BASE - AT91SAM9261_SRAM_SIZE,
40 .pfn = __phys_to_pfn(AT91SAM9261_SRAM_BASE),
41 .length = AT91SAM9261_SRAM_SIZE,
42 .type = MT_DEVICE,
43 },
44};
45
46static struct map_desc at91sam9g10_sram_desc[] __initdata = {
47 {
48 .virtual = AT91_IO_VIRT_BASE - AT91SAM9G10_SRAM_SIZE,
49 .pfn = __phys_to_pfn(AT91SAM9G10_SRAM_BASE),
50 .length = AT91SAM9G10_SRAM_SIZE,
51 .type = MT_DEVICE,
52 },
53};
54
55/* -------------------------------------------------------------------- 29/* --------------------------------------------------------------------
56 * Clocks 30 * Clocks
57 * -------------------------------------------------------------------- */ 31 * -------------------------------------------------------------------- */
@@ -302,30 +276,21 @@ static void at91sam9261_poweroff(void)
302 * AT91SAM9261 processor initialization 276 * AT91SAM9261 processor initialization
303 * -------------------------------------------------------------------- */ 277 * -------------------------------------------------------------------- */
304 278
305void __init at91sam9261_map_io(void) 279static void __init at91sam9261_map_io(void)
306{ 280{
307 /* Map peripherals */
308 iotable_init(at91sam9261_io_desc, ARRAY_SIZE(at91sam9261_io_desc));
309
310 if (cpu_is_at91sam9g10()) 281 if (cpu_is_at91sam9g10())
311 iotable_init(at91sam9g10_sram_desc, ARRAY_SIZE(at91sam9g10_sram_desc)); 282 at91_init_sram(0, AT91SAM9G10_SRAM_BASE, AT91SAM9G10_SRAM_SIZE);
312 else 283 else
313 iotable_init(at91sam9261_sram_desc, ARRAY_SIZE(at91sam9261_sram_desc)); 284 at91_init_sram(0, AT91SAM9261_SRAM_BASE, AT91SAM9261_SRAM_SIZE);
314} 285}
315 286
316void __init at91sam9261_initialize(unsigned long main_clock) 287static void __init at91sam9261_initialize(void)
317{ 288{
318 at91_arch_reset = at91sam9_alt_reset; 289 at91_arch_reset = at91sam9_alt_reset;
319 pm_power_off = at91sam9261_poweroff; 290 pm_power_off = at91sam9261_poweroff;
320 at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1) 291 at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1)
321 | (1 << AT91SAM9261_ID_IRQ2); 292 | (1 << AT91SAM9261_ID_IRQ2);
322 293
323 /* Init clock subsystem */
324 at91_clock_init(main_clock);
325
326 /* Register the processor-specific clocks */
327 at91sam9261_register_clocks();
328
329 /* Register GPIO subsystem */ 294 /* Register GPIO subsystem */
330 at91_gpio_init(at91sam9261_gpio, 3); 295 at91_gpio_init(at91sam9261_gpio, 3);
331} 296}
@@ -372,14 +337,9 @@ static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = {
372 0, /* Advanced Interrupt Controller */ 337 0, /* Advanced Interrupt Controller */
373}; 338};
374 339
375void __init at91sam9261_init_interrupts(unsigned int priority[NR_AIC_IRQS]) 340struct at91_init_soc __initdata at91sam9261_soc = {
376{ 341 .map_io = at91sam9261_map_io,
377 if (!priority) 342 .default_irq_priority = at91sam9261_default_irq_priority,
378 priority = at91sam9261_default_irq_priority; 343 .register_clocks = at91sam9261_register_clocks,
379 344 .init = at91sam9261_initialize,
380 /* Initialize the AIC interrupt controller */ 345};
381 at91_aic_init(priority);
382
383 /* Enable GPIO interrupts */
384 at91_gpio_irq_setup();
385}
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c
index 5004bf0a05f2..0f917928eeb7 100644
--- a/arch/arm/mach-at91/at91sam9261_devices.c
+++ b/arch/arm/mach-at91/at91sam9261_devices.c
@@ -525,7 +525,7 @@ void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
525 if (ARRAY_SIZE(lcdc_resources) > 2) { 525 if (ARRAY_SIZE(lcdc_resources) > 2) {
526 void __iomem *fb; 526 void __iomem *fb;
527 struct resource *fb_res = &lcdc_resources[2]; 527 struct resource *fb_res = &lcdc_resources[2];
528 size_t fb_len = fb_res->end - fb_res->start + 1; 528 size_t fb_len = resource_size(fb_res);
529 529
530 fb = ioremap(fb_res->start, fb_len); 530 fb = ioremap(fb_res->start, fb_len);
531 if (fb) { 531 if (fb) {
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c
index dc28477d14ff..044f3c927e64 100644
--- a/arch/arm/mach-at91/at91sam9263.c
+++ b/arch/arm/mach-at91/at91sam9263.c
@@ -21,28 +21,10 @@
21#include <mach/at91_rstc.h> 21#include <mach/at91_rstc.h>
22#include <mach/at91_shdwc.h> 22#include <mach/at91_shdwc.h>
23 23
24#include "soc.h"
24#include "generic.h" 25#include "generic.h"
25#include "clock.h" 26#include "clock.h"
26 27
27static struct map_desc at91sam9263_io_desc[] __initdata = {
28 {
29 .virtual = AT91_VA_BASE_SYS,
30 .pfn = __phys_to_pfn(AT91_BASE_SYS),
31 .length = SZ_16K,
32 .type = MT_DEVICE,
33 }, {
34 .virtual = AT91_IO_VIRT_BASE - AT91SAM9263_SRAM0_SIZE,
35 .pfn = __phys_to_pfn(AT91SAM9263_SRAM0_BASE),
36 .length = AT91SAM9263_SRAM0_SIZE,
37 .type = MT_DEVICE,
38 }, {
39 .virtual = AT91_IO_VIRT_BASE - AT91SAM9263_SRAM0_SIZE - AT91SAM9263_SRAM1_SIZE,
40 .pfn = __phys_to_pfn(AT91SAM9263_SRAM1_BASE),
41 .length = AT91SAM9263_SRAM1_SIZE,
42 .type = MT_DEVICE,
43 },
44};
45
46/* -------------------------------------------------------------------- 28/* --------------------------------------------------------------------
47 * Clocks 29 * Clocks
48 * -------------------------------------------------------------------- */ 30 * -------------------------------------------------------------------- */
@@ -313,24 +295,18 @@ static void at91sam9263_poweroff(void)
313 * AT91SAM9263 processor initialization 295 * AT91SAM9263 processor initialization
314 * -------------------------------------------------------------------- */ 296 * -------------------------------------------------------------------- */
315 297
316void __init at91sam9263_map_io(void) 298static void __init at91sam9263_map_io(void)
317{ 299{
318 /* Map peripherals */ 300 at91_init_sram(0, AT91SAM9263_SRAM0_BASE, AT91SAM9263_SRAM0_SIZE);
319 iotable_init(at91sam9263_io_desc, ARRAY_SIZE(at91sam9263_io_desc)); 301 at91_init_sram(1, AT91SAM9263_SRAM1_BASE, AT91SAM9263_SRAM1_SIZE);
320} 302}
321 303
322void __init at91sam9263_initialize(unsigned long main_clock) 304static void __init at91sam9263_initialize(void)
323{ 305{
324 at91_arch_reset = at91sam9_alt_reset; 306 at91_arch_reset = at91sam9_alt_reset;
325 pm_power_off = at91sam9263_poweroff; 307 pm_power_off = at91sam9263_poweroff;
326 at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1); 308 at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1);
327 309
328 /* Init clock subsystem */
329 at91_clock_init(main_clock);
330
331 /* Register the processor-specific clocks */
332 at91sam9263_register_clocks();
333
334 /* Register GPIO subsystem */ 310 /* Register GPIO subsystem */
335 at91_gpio_init(at91sam9263_gpio, 5); 311 at91_gpio_init(at91sam9263_gpio, 5);
336} 312}
@@ -377,14 +353,9 @@ static unsigned int at91sam9263_default_irq_priority[NR_AIC_IRQS] __initdata = {
377 0, /* Advanced Interrupt Controller (IRQ1) */ 353 0, /* Advanced Interrupt Controller (IRQ1) */
378}; 354};
379 355
380void __init at91sam9263_init_interrupts(unsigned int priority[NR_AIC_IRQS]) 356struct at91_init_soc __initdata at91sam9263_soc = {
381{ 357 .map_io = at91sam9263_map_io,
382 if (!priority) 358 .default_irq_priority = at91sam9263_default_irq_priority,
383 priority = at91sam9263_default_irq_priority; 359 .register_clocks = at91sam9263_register_clocks,
384 360 .init = at91sam9263_initialize,
385 /* Initialize the AIC interrupt controller */ 361};
386 at91_aic_init(priority);
387
388 /* Enable GPIO interrupts */
389 at91_gpio_irq_setup();
390}
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index 11e214121b23..e04c5fb6f1ee 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -22,23 +22,10 @@
22#include <mach/at91_shdwc.h> 22#include <mach/at91_shdwc.h>
23#include <mach/cpu.h> 23#include <mach/cpu.h>
24 24
25#include "soc.h"
25#include "generic.h" 26#include "generic.h"
26#include "clock.h" 27#include "clock.h"
27 28
28static struct map_desc at91sam9g45_io_desc[] __initdata = {
29 {
30 .virtual = AT91_VA_BASE_SYS,
31 .pfn = __phys_to_pfn(AT91_BASE_SYS),
32 .length = SZ_16K,
33 .type = MT_DEVICE,
34 }, {
35 .virtual = AT91_IO_VIRT_BASE - AT91SAM9G45_SRAM_SIZE,
36 .pfn = __phys_to_pfn(AT91SAM9G45_SRAM_BASE),
37 .length = AT91SAM9G45_SRAM_SIZE,
38 .type = MT_DEVICE,
39 }
40};
41
42/* -------------------------------------------------------------------- 29/* --------------------------------------------------------------------
43 * Clocks 30 * Clocks
44 * -------------------------------------------------------------------- */ 31 * -------------------------------------------------------------------- */
@@ -329,24 +316,17 @@ static void at91sam9g45_poweroff(void)
329 * AT91SAM9G45 processor initialization 316 * AT91SAM9G45 processor initialization
330 * -------------------------------------------------------------------- */ 317 * -------------------------------------------------------------------- */
331 318
332void __init at91sam9g45_map_io(void) 319static void __init at91sam9g45_map_io(void)
333{ 320{
334 /* Map peripherals */ 321 at91_init_sram(0, AT91SAM9G45_SRAM_BASE, AT91SAM9G45_SRAM_SIZE);
335 iotable_init(at91sam9g45_io_desc, ARRAY_SIZE(at91sam9g45_io_desc));
336} 322}
337 323
338void __init at91sam9g45_initialize(unsigned long main_clock) 324static void __init at91sam9g45_initialize(void)
339{ 325{
340 at91_arch_reset = at91sam9g45_reset; 326 at91_arch_reset = at91sam9g45_reset;
341 pm_power_off = at91sam9g45_poweroff; 327 pm_power_off = at91sam9g45_poweroff;
342 at91_extern_irq = (1 << AT91SAM9G45_ID_IRQ0); 328 at91_extern_irq = (1 << AT91SAM9G45_ID_IRQ0);
343 329
344 /* Init clock subsystem */
345 at91_clock_init(main_clock);
346
347 /* Register the processor-specific clocks */
348 at91sam9g45_register_clocks();
349
350 /* Register GPIO subsystem */ 330 /* Register GPIO subsystem */
351 at91_gpio_init(at91sam9g45_gpio, 5); 331 at91_gpio_init(at91sam9g45_gpio, 5);
352} 332}
@@ -393,14 +373,9 @@ static unsigned int at91sam9g45_default_irq_priority[NR_AIC_IRQS] __initdata = {
393 0, /* Advanced Interrupt Controller (IRQ0) */ 373 0, /* Advanced Interrupt Controller (IRQ0) */
394}; 374};
395 375
396void __init at91sam9g45_init_interrupts(unsigned int priority[NR_AIC_IRQS]) 376struct at91_init_soc __initdata at91sam9g45_soc = {
397{ 377 .map_io = at91sam9g45_map_io,
398 if (!priority) 378 .default_irq_priority = at91sam9g45_default_irq_priority,
399 priority = at91sam9g45_default_irq_priority; 379 .register_clocks = at91sam9g45_register_clocks,
400 380 .init = at91sam9g45_initialize,
401 /* Initialize the AIC interrupt controller */ 381};
402 at91_aic_init(priority);
403
404 /* Enable GPIO interrupts */
405 at91_gpio_irq_setup();
406}
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
index 29dff18ed130..a238105d2c11 100644
--- a/arch/arm/mach-at91/at91sam9rl.c
+++ b/arch/arm/mach-at91/at91sam9rl.c
@@ -16,30 +16,16 @@
16#include <asm/mach/arch.h> 16#include <asm/mach/arch.h>
17#include <asm/mach/map.h> 17#include <asm/mach/map.h>
18#include <mach/cpu.h> 18#include <mach/cpu.h>
19#include <mach/at91_dbgu.h>
19#include <mach/at91sam9rl.h> 20#include <mach/at91sam9rl.h>
20#include <mach/at91_pmc.h> 21#include <mach/at91_pmc.h>
21#include <mach/at91_rstc.h> 22#include <mach/at91_rstc.h>
22#include <mach/at91_shdwc.h> 23#include <mach/at91_shdwc.h>
23 24
25#include "soc.h"
24#include "generic.h" 26#include "generic.h"
25#include "clock.h" 27#include "clock.h"
26 28
27static struct map_desc at91sam9rl_io_desc[] __initdata = {
28 {
29 .virtual = AT91_VA_BASE_SYS,
30 .pfn = __phys_to_pfn(AT91_BASE_SYS),
31 .length = SZ_16K,
32 .type = MT_DEVICE,
33 },
34};
35
36static struct map_desc at91sam9rl_sram_desc[] __initdata = {
37 {
38 .pfn = __phys_to_pfn(AT91SAM9RL_SRAM_BASE),
39 .type = MT_DEVICE,
40 }
41};
42
43/* -------------------------------------------------------------------- 29/* --------------------------------------------------------------------
44 * Clocks 30 * Clocks
45 * -------------------------------------------------------------------- */ 31 * -------------------------------------------------------------------- */
@@ -287,16 +273,11 @@ static void at91sam9rl_poweroff(void)
287 * AT91SAM9RL processor initialization 273 * AT91SAM9RL processor initialization
288 * -------------------------------------------------------------------- */ 274 * -------------------------------------------------------------------- */
289 275
290void __init at91sam9rl_map_io(void) 276static void __init at91sam9rl_map_io(void)
291{ 277{
292 unsigned long cidr, sram_size; 278 unsigned long sram_size;
293
294 /* Map peripherals */
295 iotable_init(at91sam9rl_io_desc, ARRAY_SIZE(at91sam9rl_io_desc));
296
297 cidr = at91_sys_read(AT91_DBGU_CIDR);
298 279
299 switch (cidr & AT91_CIDR_SRAMSIZ) { 280 switch (at91_soc_initdata.cidr & AT91_CIDR_SRAMSIZ) {
300 case AT91_CIDR_SRAMSIZ_32K: 281 case AT91_CIDR_SRAMSIZ_32K:
301 sram_size = 2 * SZ_16K; 282 sram_size = 2 * SZ_16K;
302 break; 283 break;
@@ -305,25 +286,16 @@ void __init at91sam9rl_map_io(void)
305 sram_size = SZ_16K; 286 sram_size = SZ_16K;
306 } 287 }
307 288
308 at91sam9rl_sram_desc->virtual = AT91_IO_VIRT_BASE - sram_size;
309 at91sam9rl_sram_desc->length = sram_size;
310
311 /* Map SRAM */ 289 /* Map SRAM */
312 iotable_init(at91sam9rl_sram_desc, ARRAY_SIZE(at91sam9rl_sram_desc)); 290 at91_init_sram(0, AT91SAM9RL_SRAM_BASE, sram_size);
313} 291}
314 292
315void __init at91sam9rl_initialize(unsigned long main_clock) 293static void __init at91sam9rl_initialize(void)
316{ 294{
317 at91_arch_reset = at91sam9_alt_reset; 295 at91_arch_reset = at91sam9_alt_reset;
318 pm_power_off = at91sam9rl_poweroff; 296 pm_power_off = at91sam9rl_poweroff;
319 at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0); 297 at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0);
320 298
321 /* Init clock subsystem */
322 at91_clock_init(main_clock);
323
324 /* Register the processor-specific clocks */
325 at91sam9rl_register_clocks();
326
327 /* Register GPIO subsystem */ 299 /* Register GPIO subsystem */
328 at91_gpio_init(at91sam9rl_gpio, 4); 300 at91_gpio_init(at91sam9rl_gpio, 4);
329} 301}
@@ -370,14 +342,9 @@ static unsigned int at91sam9rl_default_irq_priority[NR_AIC_IRQS] __initdata = {
370 0, /* Advanced Interrupt Controller */ 342 0, /* Advanced Interrupt Controller */
371}; 343};
372 344
373void __init at91sam9rl_init_interrupts(unsigned int priority[NR_AIC_IRQS]) 345struct at91_init_soc __initdata at91sam9rl_soc = {
374{ 346 .map_io = at91sam9rl_map_io,
375 if (!priority) 347 .default_irq_priority = at91sam9rl_default_irq_priority,
376 priority = at91sam9rl_default_irq_priority; 348 .register_clocks = at91sam9rl_register_clocks,
377 349 .init = at91sam9rl_initialize,
378 /* Initialize the AIC interrupt controller */ 350};
379 at91_aic_init(priority);
380
381 /* Enable GPIO interrupts */
382 at91_gpio_irq_setup();
383}
diff --git a/arch/arm/mach-at91/board-1arm.c b/arch/arm/mach-at91/board-1arm.c
index ab1d463aa47d..5aa58851eb39 100644
--- a/arch/arm/mach-at91/board-1arm.c
+++ b/arch/arm/mach-at91/board-1arm.c
@@ -46,7 +46,7 @@ static void __init onearm_init_early(void)
46 at91rm9200_set_type(ARCH_REVISON_9200_PQFP); 46 at91rm9200_set_type(ARCH_REVISON_9200_PQFP);
47 47
48 /* Initialize processor: 18.432 MHz crystal */ 48 /* Initialize processor: 18.432 MHz crystal */
49 at91rm9200_initialize(18432000); 49 at91_initialize(18432000);
50 50
51 /* DBGU on ttyS0. (Rx & Tx only) */ 51 /* DBGU on ttyS0. (Rx & Tx only) */
52 at91_register_uart(0, 0, 0); 52 at91_register_uart(0, 0, 0);
@@ -63,11 +63,6 @@ static void __init onearm_init_early(void)
63 at91_set_serial_console(0); 63 at91_set_serial_console(0);
64} 64}
65 65
66static void __init onearm_init_irq(void)
67{
68 at91rm9200_init_interrupts(NULL);
69}
70
71static struct at91_eth_data __initdata onearm_eth_data = { 66static struct at91_eth_data __initdata onearm_eth_data = {
72 .phy_irq_pin = AT91_PIN_PC4, 67 .phy_irq_pin = AT91_PIN_PC4,
73 .is_rmii = 1, 68 .is_rmii = 1,
@@ -97,8 +92,8 @@ static void __init onearm_board_init(void)
97MACHINE_START(ONEARM, "Ajeco 1ARM single board computer") 92MACHINE_START(ONEARM, "Ajeco 1ARM single board computer")
98 /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */ 93 /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
99 .timer = &at91rm9200_timer, 94 .timer = &at91rm9200_timer,
100 .map_io = at91rm9200_map_io, 95 .map_io = at91_map_io,
101 .init_early = onearm_init_early, 96 .init_early = onearm_init_early,
102 .init_irq = onearm_init_irq, 97 .init_irq = at91_init_irq_default,
103 .init_machine = onearm_board_init, 98 .init_machine = onearm_board_init,
104MACHINE_END 99MACHINE_END
diff --git a/arch/arm/mach-at91/board-afeb-9260v1.c b/arch/arm/mach-at91/board-afeb-9260v1.c
index a4924de48c36..b0c796d42e49 100644
--- a/arch/arm/mach-at91/board-afeb-9260v1.c
+++ b/arch/arm/mach-at91/board-afeb-9260v1.c
@@ -51,7 +51,7 @@
51static void __init afeb9260_init_early(void) 51static void __init afeb9260_init_early(void)
52{ 52{
53 /* Initialize processor: 18.432 MHz crystal */ 53 /* Initialize processor: 18.432 MHz crystal */
54 at91sam9260_initialize(18432000); 54 at91_initialize(18432000);
55 55
56 /* DBGU on ttyS0. (Rx & Tx only) */ 56 /* DBGU on ttyS0. (Rx & Tx only) */
57 at91_register_uart(0, 0, 0); 57 at91_register_uart(0, 0, 0);
@@ -70,12 +70,6 @@ static void __init afeb9260_init_early(void)
70 at91_set_serial_console(0); 70 at91_set_serial_console(0);
71} 71}
72 72
73static void __init afeb9260_init_irq(void)
74{
75 at91sam9260_init_interrupts(NULL);
76}
77
78
79/* 73/*
80 * USB Host port 74 * USB Host port
81 */ 75 */
@@ -219,9 +213,9 @@ static void __init afeb9260_board_init(void)
219MACHINE_START(AFEB9260, "Custom afeb9260 board") 213MACHINE_START(AFEB9260, "Custom afeb9260 board")
220 /* Maintainer: Sergey Lapin <slapin@ossfans.org> */ 214 /* Maintainer: Sergey Lapin <slapin@ossfans.org> */
221 .timer = &at91sam926x_timer, 215 .timer = &at91sam926x_timer,
222 .map_io = at91sam9260_map_io, 216 .map_io = at91_map_io,
223 .init_early = afeb9260_init_early, 217 .init_early = afeb9260_init_early,
224 .init_irq = afeb9260_init_irq, 218 .init_irq = at91_init_irq_default,
225 .init_machine = afeb9260_board_init, 219 .init_machine = afeb9260_board_init,
226MACHINE_END 220MACHINE_END
227 221
diff --git a/arch/arm/mach-at91/board-cam60.c b/arch/arm/mach-at91/board-cam60.c
index 148fccb9a25a..d1abd5898e85 100644
--- a/arch/arm/mach-at91/board-cam60.c
+++ b/arch/arm/mach-at91/board-cam60.c
@@ -48,7 +48,7 @@
48static void __init cam60_init_early(void) 48static void __init cam60_init_early(void)
49{ 49{
50 /* Initialize processor: 10 MHz crystal */ 50 /* Initialize processor: 10 MHz crystal */
51 at91sam9260_initialize(10000000); 51 at91_initialize(10000000);
52 52
53 /* DBGU on ttyS0. (Rx & Tx only) */ 53 /* DBGU on ttyS0. (Rx & Tx only) */
54 at91_register_uart(0, 0, 0); 54 at91_register_uart(0, 0, 0);
@@ -57,12 +57,6 @@ static void __init cam60_init_early(void)
57 at91_set_serial_console(0); 57 at91_set_serial_console(0);
58} 58}
59 59
60static void __init cam60_init_irq(void)
61{
62 at91sam9260_init_interrupts(NULL);
63}
64
65
66/* 60/*
67 * USB Host 61 * USB Host
68 */ 62 */
@@ -199,8 +193,8 @@ static void __init cam60_board_init(void)
199MACHINE_START(CAM60, "KwikByte CAM60") 193MACHINE_START(CAM60, "KwikByte CAM60")
200 /* Maintainer: KwikByte */ 194 /* Maintainer: KwikByte */
201 .timer = &at91sam926x_timer, 195 .timer = &at91sam926x_timer,
202 .map_io = at91sam9260_map_io, 196 .map_io = at91_map_io,
203 .init_early = cam60_init_early, 197 .init_early = cam60_init_early,
204 .init_irq = cam60_init_irq, 198 .init_irq = at91_init_irq_default,
205 .init_machine = cam60_board_init, 199 .init_machine = cam60_board_init,
206MACHINE_END 200MACHINE_END
diff --git a/arch/arm/mach-at91/board-cap9adk.c b/arch/arm/mach-at91/board-cap9adk.c
index cdb65d483250..679b0b743e92 100644
--- a/arch/arm/mach-at91/board-cap9adk.c
+++ b/arch/arm/mach-at91/board-cap9adk.c
@@ -53,7 +53,7 @@
53static void __init cap9adk_init_early(void) 53static void __init cap9adk_init_early(void)
54{ 54{
55 /* Initialize processor: 12 MHz crystal */ 55 /* Initialize processor: 12 MHz crystal */
56 at91cap9_initialize(12000000); 56 at91_initialize(12000000);
57 57
58 /* Setup the LEDs: USER1 and USER2 LED for cpu/timer... */ 58 /* Setup the LEDs: USER1 and USER2 LED for cpu/timer... */
59 at91_init_leds(AT91_PIN_PA10, AT91_PIN_PA11); 59 at91_init_leds(AT91_PIN_PA10, AT91_PIN_PA11);
@@ -65,12 +65,6 @@ static void __init cap9adk_init_early(void)
65 at91_set_serial_console(0); 65 at91_set_serial_console(0);
66} 66}
67 67
68static void __init cap9adk_init_irq(void)
69{
70 at91cap9_init_interrupts(NULL);
71}
72
73
74/* 68/*
75 * USB Host port 69 * USB Host port
76 */ 70 */
@@ -397,8 +391,8 @@ static void __init cap9adk_board_init(void)
397MACHINE_START(AT91CAP9ADK, "Atmel AT91CAP9A-DK") 391MACHINE_START(AT91CAP9ADK, "Atmel AT91CAP9A-DK")
398 /* Maintainer: Stelian Pop <stelian.pop@leadtechdesign.com> */ 392 /* Maintainer: Stelian Pop <stelian.pop@leadtechdesign.com> */
399 .timer = &at91sam926x_timer, 393 .timer = &at91sam926x_timer,
400 .map_io = at91cap9_map_io, 394 .map_io = at91_map_io,
401 .init_early = cap9adk_init_early, 395 .init_early = cap9adk_init_early,
402 .init_irq = cap9adk_init_irq, 396 .init_irq = at91_init_irq_default,
403 .init_machine = cap9adk_board_init, 397 .init_machine = cap9adk_board_init,
404MACHINE_END 398MACHINE_END
diff --git a/arch/arm/mach-at91/board-carmeva.c b/arch/arm/mach-at91/board-carmeva.c
index f36b18687494..c578c5d90728 100644
--- a/arch/arm/mach-at91/board-carmeva.c
+++ b/arch/arm/mach-at91/board-carmeva.c
@@ -43,7 +43,7 @@
43static void __init carmeva_init_early(void) 43static void __init carmeva_init_early(void)
44{ 44{
45 /* Initialize processor: 20.000 MHz crystal */ 45 /* Initialize processor: 20.000 MHz crystal */
46 at91rm9200_initialize(20000000); 46 at91_initialize(20000000);
47 47
48 /* DBGU on ttyS0. (Rx & Tx only) */ 48 /* DBGU on ttyS0. (Rx & Tx only) */
49 at91_register_uart(0, 0, 0); 49 at91_register_uart(0, 0, 0);
@@ -57,11 +57,6 @@ static void __init carmeva_init_early(void)
57 at91_set_serial_console(0); 57 at91_set_serial_console(0);
58} 58}
59 59
60static void __init carmeva_init_irq(void)
61{
62 at91rm9200_init_interrupts(NULL);
63}
64
65static struct at91_eth_data __initdata carmeva_eth_data = { 60static struct at91_eth_data __initdata carmeva_eth_data = {
66 .phy_irq_pin = AT91_PIN_PC4, 61 .phy_irq_pin = AT91_PIN_PC4,
67 .is_rmii = 1, 62 .is_rmii = 1,
@@ -163,8 +158,8 @@ static void __init carmeva_board_init(void)
163MACHINE_START(CARMEVA, "Carmeva") 158MACHINE_START(CARMEVA, "Carmeva")
164 /* Maintainer: Conitec Datasystems */ 159 /* Maintainer: Conitec Datasystems */
165 .timer = &at91rm9200_timer, 160 .timer = &at91rm9200_timer,
166 .map_io = at91rm9200_map_io, 161 .map_io = at91_map_io,
167 .init_early = carmeva_init_early, 162 .init_early = carmeva_init_early,
168 .init_irq = carmeva_init_irq, 163 .init_irq = at91_init_irq_default,
169 .init_machine = carmeva_board_init, 164 .init_machine = carmeva_board_init,
170MACHINE_END 165MACHINE_END
diff --git a/arch/arm/mach-at91/board-cpu9krea.c b/arch/arm/mach-at91/board-cpu9krea.c
index 980511084fe4..f4da8a16d5dc 100644
--- a/arch/arm/mach-at91/board-cpu9krea.c
+++ b/arch/arm/mach-at91/board-cpu9krea.c
@@ -50,7 +50,7 @@
50static void __init cpu9krea_init_early(void) 50static void __init cpu9krea_init_early(void)
51{ 51{
52 /* Initialize processor: 18.432 MHz crystal */ 52 /* Initialize processor: 18.432 MHz crystal */
53 at91sam9260_initialize(18432000); 53 at91_initialize(18432000);
54 54
55 /* DGBU on ttyS0. (Rx & Tx only) */ 55 /* DGBU on ttyS0. (Rx & Tx only) */
56 at91_register_uart(0, 0, 0); 56 at91_register_uart(0, 0, 0);
@@ -81,11 +81,6 @@ static void __init cpu9krea_init_early(void)
81 at91_set_serial_console(0); 81 at91_set_serial_console(0);
82} 82}
83 83
84static void __init cpu9krea_init_irq(void)
85{
86 at91sam9260_init_interrupts(NULL);
87}
88
89/* 84/*
90 * USB Host port 85 * USB Host port
91 */ 86 */
@@ -376,8 +371,8 @@ MACHINE_START(CPUAT9G20, "Eukrea CPU9G20")
376#endif 371#endif
377 /* Maintainer: Eric Benard - EUKREA Electromatique */ 372 /* Maintainer: Eric Benard - EUKREA Electromatique */
378 .timer = &at91sam926x_timer, 373 .timer = &at91sam926x_timer,
379 .map_io = at91sam9260_map_io, 374 .map_io = at91_map_io,
380 .init_early = cpu9krea_init_early, 375 .init_early = cpu9krea_init_early,
381 .init_irq = cpu9krea_init_irq, 376 .init_irq = at91_init_irq_default,
382 .init_machine = cpu9krea_board_init, 377 .init_machine = cpu9krea_board_init,
383MACHINE_END 378MACHINE_END
diff --git a/arch/arm/mach-at91/board-cpuat91.c b/arch/arm/mach-at91/board-cpuat91.c
index 6daabe3907a1..2d919f5a4f57 100644
--- a/arch/arm/mach-at91/board-cpuat91.c
+++ b/arch/arm/mach-at91/board-cpuat91.c
@@ -57,7 +57,7 @@ static void __init cpuat91_init_early(void)
57 at91rm9200_set_type(ARCH_REVISON_9200_PQFP); 57 at91rm9200_set_type(ARCH_REVISON_9200_PQFP);
58 58
59 /* Initialize processor: 18.432 MHz crystal */ 59 /* Initialize processor: 18.432 MHz crystal */
60 at91rm9200_initialize(18432000); 60 at91_initialize(18432000);
61 61
62 /* DBGU on ttyS0. (Rx & Tx only) */ 62 /* DBGU on ttyS0. (Rx & Tx only) */
63 at91_register_uart(0, 0, 0); 63 at91_register_uart(0, 0, 0);
@@ -82,11 +82,6 @@ static void __init cpuat91_init_early(void)
82 at91_set_serial_console(0); 82 at91_set_serial_console(0);
83} 83}
84 84
85static void __init cpuat91_init_irq(void)
86{
87 at91rm9200_init_interrupts(NULL);
88}
89
90static struct at91_eth_data __initdata cpuat91_eth_data = { 85static struct at91_eth_data __initdata cpuat91_eth_data = {
91 .is_rmii = 1, 86 .is_rmii = 1,
92}; 87};
@@ -180,8 +175,8 @@ static void __init cpuat91_board_init(void)
180MACHINE_START(CPUAT91, "Eukrea") 175MACHINE_START(CPUAT91, "Eukrea")
181 /* Maintainer: Eric Benard - EUKREA Electromatique */ 176 /* Maintainer: Eric Benard - EUKREA Electromatique */
182 .timer = &at91rm9200_timer, 177 .timer = &at91rm9200_timer,
183 .map_io = at91rm9200_map_io, 178 .map_io = at91_map_io,
184 .init_early = cpuat91_init_early, 179 .init_early = cpuat91_init_early,
185 .init_irq = cpuat91_init_irq, 180 .init_irq = at91_init_irq_default,
186 .init_machine = cpuat91_board_init, 181 .init_machine = cpuat91_board_init,
187MACHINE_END 182MACHINE_END
diff --git a/arch/arm/mach-at91/board-csb337.c b/arch/arm/mach-at91/board-csb337.c
index d98bcec1dfe0..17654d5e94e6 100644
--- a/arch/arm/mach-at91/board-csb337.c
+++ b/arch/arm/mach-at91/board-csb337.c
@@ -46,7 +46,7 @@
46static void __init csb337_init_early(void) 46static void __init csb337_init_early(void)
47{ 47{
48 /* Initialize processor: 3.6864 MHz crystal */ 48 /* Initialize processor: 3.6864 MHz crystal */
49 at91rm9200_initialize(3686400); 49 at91_initialize(3686400);
50 50
51 /* Setup the LEDs */ 51 /* Setup the LEDs */
52 at91_init_leds(AT91_PIN_PB0, AT91_PIN_PB1); 52 at91_init_leds(AT91_PIN_PB0, AT91_PIN_PB1);
@@ -58,11 +58,6 @@ static void __init csb337_init_early(void)
58 at91_set_serial_console(0); 58 at91_set_serial_console(0);
59} 59}
60 60
61static void __init csb337_init_irq(void)
62{
63 at91rm9200_init_interrupts(NULL);
64}
65
66static struct at91_eth_data __initdata csb337_eth_data = { 61static struct at91_eth_data __initdata csb337_eth_data = {
67 .phy_irq_pin = AT91_PIN_PC2, 62 .phy_irq_pin = AT91_PIN_PC2,
68 .is_rmii = 0, 63 .is_rmii = 0,
@@ -258,8 +253,8 @@ static void __init csb337_board_init(void)
258MACHINE_START(CSB337, "Cogent CSB337") 253MACHINE_START(CSB337, "Cogent CSB337")
259 /* Maintainer: Bill Gatliff */ 254 /* Maintainer: Bill Gatliff */
260 .timer = &at91rm9200_timer, 255 .timer = &at91rm9200_timer,
261 .map_io = at91rm9200_map_io, 256 .map_io = at91_map_io,
262 .init_early = csb337_init_early, 257 .init_early = csb337_init_early,
263 .init_irq = csb337_init_irq, 258 .init_irq = at91_init_irq_default,
264 .init_machine = csb337_board_init, 259 .init_machine = csb337_board_init,
265MACHINE_END 260MACHINE_END
diff --git a/arch/arm/mach-at91/board-csb637.c b/arch/arm/mach-at91/board-csb637.c
index 019aab4e20b0..72b55674616c 100644
--- a/arch/arm/mach-at91/board-csb637.c
+++ b/arch/arm/mach-at91/board-csb637.c
@@ -43,7 +43,7 @@
43static void __init csb637_init_early(void) 43static void __init csb637_init_early(void)
44{ 44{
45 /* Initialize processor: 3.6864 MHz crystal */ 45 /* Initialize processor: 3.6864 MHz crystal */
46 at91rm9200_initialize(3686400); 46 at91_initialize(3686400);
47 47
48 /* DBGU on ttyS0. (Rx & Tx only) */ 48 /* DBGU on ttyS0. (Rx & Tx only) */
49 at91_register_uart(0, 0, 0); 49 at91_register_uart(0, 0, 0);
@@ -52,11 +52,6 @@ static void __init csb637_init_early(void)
52 at91_set_serial_console(0); 52 at91_set_serial_console(0);
53} 53}
54 54
55static void __init csb637_init_irq(void)
56{
57 at91rm9200_init_interrupts(NULL);
58}
59
60static struct at91_eth_data __initdata csb637_eth_data = { 55static struct at91_eth_data __initdata csb637_eth_data = {
61 .phy_irq_pin = AT91_PIN_PC0, 56 .phy_irq_pin = AT91_PIN_PC0,
62 .is_rmii = 0, 57 .is_rmii = 0,
@@ -139,8 +134,8 @@ static void __init csb637_board_init(void)
139MACHINE_START(CSB637, "Cogent CSB637") 134MACHINE_START(CSB637, "Cogent CSB637")
140 /* Maintainer: Bill Gatliff */ 135 /* Maintainer: Bill Gatliff */
141 .timer = &at91rm9200_timer, 136 .timer = &at91rm9200_timer,
142 .map_io = at91rm9200_map_io, 137 .map_io = at91_map_io,
143 .init_early = csb637_init_early, 138 .init_early = csb637_init_early,
144 .init_irq = csb637_init_irq, 139 .init_irq = at91_init_irq_default,
145 .init_machine = csb637_board_init, 140 .init_machine = csb637_board_init,
146MACHINE_END 141MACHINE_END
diff --git a/arch/arm/mach-at91/board-eb9200.c b/arch/arm/mach-at91/board-eb9200.c
index e9484535cbc8..01170a2766a8 100644
--- a/arch/arm/mach-at91/board-eb9200.c
+++ b/arch/arm/mach-at91/board-eb9200.c
@@ -43,7 +43,7 @@
43static void __init eb9200_init_early(void) 43static void __init eb9200_init_early(void)
44{ 44{
45 /* Initialize processor: 18.432 MHz crystal */ 45 /* Initialize processor: 18.432 MHz crystal */
46 at91rm9200_initialize(18432000); 46 at91_initialize(18432000);
47 47
48 /* DBGU on ttyS0. (Rx & Tx only) */ 48 /* DBGU on ttyS0. (Rx & Tx only) */
49 at91_register_uart(0, 0, 0); 49 at91_register_uart(0, 0, 0);
@@ -60,11 +60,6 @@ static void __init eb9200_init_early(void)
60 at91_set_serial_console(0); 60 at91_set_serial_console(0);
61} 61}
62 62
63static void __init eb9200_init_irq(void)
64{
65 at91rm9200_init_interrupts(NULL);
66}
67
68static struct at91_eth_data __initdata eb9200_eth_data = { 63static struct at91_eth_data __initdata eb9200_eth_data = {
69 .phy_irq_pin = AT91_PIN_PC4, 64 .phy_irq_pin = AT91_PIN_PC4,
70 .is_rmii = 1, 65 .is_rmii = 1,
@@ -121,8 +116,8 @@ static void __init eb9200_board_init(void)
121 116
122MACHINE_START(ATEB9200, "Embest ATEB9200") 117MACHINE_START(ATEB9200, "Embest ATEB9200")
123 .timer = &at91rm9200_timer, 118 .timer = &at91rm9200_timer,
124 .map_io = at91rm9200_map_io, 119 .map_io = at91_map_io,
125 .init_early = eb9200_init_early, 120 .init_early = eb9200_init_early,
126 .init_irq = eb9200_init_irq, 121 .init_irq = at91_init_irq_default,
127 .init_machine = eb9200_board_init, 122 .init_machine = eb9200_board_init,
128MACHINE_END 123MACHINE_END
diff --git a/arch/arm/mach-at91/board-ecbat91.c b/arch/arm/mach-at91/board-ecbat91.c
index a6f57faa10a7..7c0313c51f26 100644
--- a/arch/arm/mach-at91/board-ecbat91.c
+++ b/arch/arm/mach-at91/board-ecbat91.c
@@ -49,7 +49,7 @@ static void __init ecb_at91init_early(void)
49 at91rm9200_set_type(ARCH_REVISON_9200_PQFP); 49 at91rm9200_set_type(ARCH_REVISON_9200_PQFP);
50 50
51 /* Initialize processor: 18.432 MHz crystal */ 51 /* Initialize processor: 18.432 MHz crystal */
52 at91rm9200_initialize(18432000); 52 at91_initialize(18432000);
53 53
54 /* Setup the LEDs */ 54 /* Setup the LEDs */
55 at91_init_leds(AT91_PIN_PC7, AT91_PIN_PC7); 55 at91_init_leds(AT91_PIN_PC7, AT91_PIN_PC7);
@@ -64,11 +64,6 @@ static void __init ecb_at91init_early(void)
64 at91_set_serial_console(0); 64 at91_set_serial_console(0);
65} 65}
66 66
67static void __init ecb_at91init_irq(void)
68{
69 at91rm9200_init_interrupts(NULL);
70}
71
72static struct at91_eth_data __initdata ecb_at91eth_data = { 67static struct at91_eth_data __initdata ecb_at91eth_data = {
73 .phy_irq_pin = AT91_PIN_PC4, 68 .phy_irq_pin = AT91_PIN_PC4,
74 .is_rmii = 0, 69 .is_rmii = 0,
@@ -173,8 +168,8 @@ static void __init ecb_at91board_init(void)
173MACHINE_START(ECBAT91, "emQbit's ECB_AT91") 168MACHINE_START(ECBAT91, "emQbit's ECB_AT91")
174 /* Maintainer: emQbit.com */ 169 /* Maintainer: emQbit.com */
175 .timer = &at91rm9200_timer, 170 .timer = &at91rm9200_timer,
176 .map_io = at91rm9200_map_io, 171 .map_io = at91_map_io,
177 .init_early = ecb_at91init_early, 172 .init_early = ecb_at91init_early,
178 .init_irq = ecb_at91init_irq, 173 .init_irq = at91_init_irq_default,
179 .init_machine = ecb_at91board_init, 174 .init_machine = ecb_at91board_init,
180MACHINE_END 175MACHINE_END
diff --git a/arch/arm/mach-at91/board-eco920.c b/arch/arm/mach-at91/board-eco920.c
index bfc0062d1483..8252c722607b 100644
--- a/arch/arm/mach-at91/board-eco920.c
+++ b/arch/arm/mach-at91/board-eco920.c
@@ -35,7 +35,7 @@ static void __init eco920_init_early(void)
35 /* Set cpu type: PQFP */ 35 /* Set cpu type: PQFP */
36 at91rm9200_set_type(ARCH_REVISON_9200_PQFP); 36 at91rm9200_set_type(ARCH_REVISON_9200_PQFP);
37 37
38 at91rm9200_initialize(18432000); 38 at91_initialize(18432000);
39 39
40 /* Setup the LEDs */ 40 /* Setup the LEDs */
41 at91_init_leds(AT91_PIN_PB0, AT91_PIN_PB1); 41 at91_init_leds(AT91_PIN_PB0, AT91_PIN_PB1);
@@ -47,11 +47,6 @@ static void __init eco920_init_early(void)
47 at91_set_serial_console(0); 47 at91_set_serial_console(0);
48} 48}
49 49
50static void __init eco920_init_irq(void)
51{
52 at91rm9200_init_interrupts(NULL);
53}
54
55static struct at91_eth_data __initdata eco920_eth_data = { 50static struct at91_eth_data __initdata eco920_eth_data = {
56 .phy_irq_pin = AT91_PIN_PC2, 51 .phy_irq_pin = AT91_PIN_PC2,
57 .is_rmii = 1, 52 .is_rmii = 1,
@@ -135,8 +130,8 @@ static void __init eco920_board_init(void)
135MACHINE_START(ECO920, "eco920") 130MACHINE_START(ECO920, "eco920")
136 /* Maintainer: Sascha Hauer */ 131 /* Maintainer: Sascha Hauer */
137 .timer = &at91rm9200_timer, 132 .timer = &at91rm9200_timer,
138 .map_io = at91rm9200_map_io, 133 .map_io = at91_map_io,
139 .init_early = eco920_init_early, 134 .init_early = eco920_init_early,
140 .init_irq = eco920_init_irq, 135 .init_irq = at91_init_irq_default,
141 .init_machine = eco920_board_init, 136 .init_machine = eco920_board_init,
142MACHINE_END 137MACHINE_END
diff --git a/arch/arm/mach-at91/board-flexibity.c b/arch/arm/mach-at91/board-flexibity.c
index 466c063b8d21..4c3f65d9c59b 100644
--- a/arch/arm/mach-at91/board-flexibity.c
+++ b/arch/arm/mach-at91/board-flexibity.c
@@ -40,7 +40,7 @@
40static void __init flexibity_init_early(void) 40static void __init flexibity_init_early(void)
41{ 41{
42 /* Initialize processor: 18.432 MHz crystal */ 42 /* Initialize processor: 18.432 MHz crystal */
43 at91sam9260_initialize(18432000); 43 at91_initialize(18432000);
44 44
45 /* DBGU on ttyS0. (Rx & Tx only) */ 45 /* DBGU on ttyS0. (Rx & Tx only) */
46 at91_register_uart(0, 0, 0); 46 at91_register_uart(0, 0, 0);
@@ -49,11 +49,6 @@ static void __init flexibity_init_early(void)
49 at91_set_serial_console(0); 49 at91_set_serial_console(0);
50} 50}
51 51
52static void __init flexibity_init_irq(void)
53{
54 at91sam9260_init_interrupts(NULL);
55}
56
57/* USB Host port */ 52/* USB Host port */
58static struct at91_usbh_data __initdata flexibity_usbh_data = { 53static struct at91_usbh_data __initdata flexibity_usbh_data = {
59 .ports = 2, 54 .ports = 2,
@@ -155,8 +150,8 @@ static void __init flexibity_board_init(void)
155MACHINE_START(FLEXIBITY, "Flexibity Connect") 150MACHINE_START(FLEXIBITY, "Flexibity Connect")
156 /* Maintainer: Maxim Osipov */ 151 /* Maintainer: Maxim Osipov */
157 .timer = &at91sam926x_timer, 152 .timer = &at91sam926x_timer,
158 .map_io = at91sam9260_map_io, 153 .map_io = at91_map_io,
159 .init_early = flexibity_init_early, 154 .init_early = flexibity_init_early,
160 .init_irq = flexibity_init_irq, 155 .init_irq = at91_init_irq_default,
161 .init_machine = flexibity_board_init, 156 .init_machine = flexibity_board_init,
162MACHINE_END 157MACHINE_END
diff --git a/arch/arm/mach-at91/board-foxg20.c b/arch/arm/mach-at91/board-foxg20.c
index e2d1dc9eff45..f27d1a780cfa 100644
--- a/arch/arm/mach-at91/board-foxg20.c
+++ b/arch/arm/mach-at91/board-foxg20.c
@@ -60,7 +60,7 @@
60static void __init foxg20_init_early(void) 60static void __init foxg20_init_early(void)
61{ 61{
62 /* Initialize processor: 18.432 MHz crystal */ 62 /* Initialize processor: 18.432 MHz crystal */
63 at91sam9260_initialize(18432000); 63 at91_initialize(18432000);
64 64
65 /* DBGU on ttyS0. (Rx & Tx only) */ 65 /* DBGU on ttyS0. (Rx & Tx only) */
66 at91_register_uart(0, 0, 0); 66 at91_register_uart(0, 0, 0);
@@ -101,12 +101,6 @@ static void __init foxg20_init_early(void)
101 101
102} 102}
103 103
104static void __init foxg20_init_irq(void)
105{
106 at91sam9260_init_interrupts(NULL);
107}
108
109
110/* 104/*
111 * USB Host port 105 * USB Host port
112 */ 106 */
@@ -267,8 +261,8 @@ static void __init foxg20_board_init(void)
267MACHINE_START(ACMENETUSFOXG20, "Acme Systems srl FOX Board G20") 261MACHINE_START(ACMENETUSFOXG20, "Acme Systems srl FOX Board G20")
268 /* Maintainer: Sergio Tanzilli */ 262 /* Maintainer: Sergio Tanzilli */
269 .timer = &at91sam926x_timer, 263 .timer = &at91sam926x_timer,
270 .map_io = at91sam9260_map_io, 264 .map_io = at91_map_io,
271 .init_early = foxg20_init_early, 265 .init_early = foxg20_init_early,
272 .init_irq = foxg20_init_irq, 266 .init_irq = at91_init_irq_default,
273 .init_machine = foxg20_board_init, 267 .init_machine = foxg20_board_init,
274MACHINE_END 268MACHINE_END
diff --git a/arch/arm/mach-at91/board-gsia18s.c b/arch/arm/mach-at91/board-gsia18s.c
index 1d4f36b3cb27..2e95949737e6 100644
--- a/arch/arm/mach-at91/board-gsia18s.c
+++ b/arch/arm/mach-at91/board-gsia18s.c
@@ -75,11 +75,6 @@ static void __init gsia18s_init_early(void)
75 at91_register_uart(AT91SAM9260_ID_US4, 5, 0); 75 at91_register_uart(AT91SAM9260_ID_US4, 5, 0);
76} 76}
77 77
78static void __init init_irq(void)
79{
80 at91sam9260_init_interrupts(NULL);
81}
82
83/* 78/*
84 * Two USB Host ports 79 * Two USB Host ports
85 */ 80 */
@@ -577,8 +572,8 @@ static void __init gsia18s_board_init(void)
577 572
578MACHINE_START(GSIA18S, "GS_IA18_S") 573MACHINE_START(GSIA18S, "GS_IA18_S")
579 .timer = &at91sam926x_timer, 574 .timer = &at91sam926x_timer,
580 .map_io = at91sam9260_map_io, 575 .map_io = at91_map_io,
581 .init_early = gsia18s_init_early, 576 .init_early = gsia18s_init_early,
582 .init_irq = init_irq, 577 .init_irq = at91_init_irq_default,
583 .init_machine = gsia18s_board_init, 578 .init_machine = gsia18s_board_init,
584MACHINE_END 579MACHINE_END
diff --git a/arch/arm/mach-at91/board-kafa.c b/arch/arm/mach-at91/board-kafa.c
index 9b003ff744ba..4a170890b3b1 100644
--- a/arch/arm/mach-at91/board-kafa.c
+++ b/arch/arm/mach-at91/board-kafa.c
@@ -46,7 +46,7 @@ static void __init kafa_init_early(void)
46 at91rm9200_set_type(ARCH_REVISON_9200_PQFP); 46 at91rm9200_set_type(ARCH_REVISON_9200_PQFP);
47 47
48 /* Initialize processor: 18.432 MHz crystal */ 48 /* Initialize processor: 18.432 MHz crystal */
49 at91rm9200_initialize(18432000); 49 at91_initialize(18432000);
50 50
51 /* Set up the LEDs */ 51 /* Set up the LEDs */
52 at91_init_leds(AT91_PIN_PB4, AT91_PIN_PB4); 52 at91_init_leds(AT91_PIN_PB4, AT91_PIN_PB4);
@@ -61,11 +61,6 @@ static void __init kafa_init_early(void)
61 at91_set_serial_console(0); 61 at91_set_serial_console(0);
62} 62}
63 63
64static void __init kafa_init_irq(void)
65{
66 at91rm9200_init_interrupts(NULL);
67}
68
69static struct at91_eth_data __initdata kafa_eth_data = { 64static struct at91_eth_data __initdata kafa_eth_data = {
70 .phy_irq_pin = AT91_PIN_PC4, 65 .phy_irq_pin = AT91_PIN_PC4,
71 .is_rmii = 0, 66 .is_rmii = 0,
@@ -99,8 +94,8 @@ static void __init kafa_board_init(void)
99MACHINE_START(KAFA, "Sperry-Sun KAFA") 94MACHINE_START(KAFA, "Sperry-Sun KAFA")
100 /* Maintainer: Sergei Sharonov */ 95 /* Maintainer: Sergei Sharonov */
101 .timer = &at91rm9200_timer, 96 .timer = &at91rm9200_timer,
102 .map_io = at91rm9200_map_io, 97 .map_io = at91_map_io,
103 .init_early = kafa_init_early, 98 .init_early = kafa_init_early,
104 .init_irq = kafa_init_irq, 99 .init_irq = at91_init_irq_default,
105 .init_machine = kafa_board_init, 100 .init_machine = kafa_board_init,
106MACHINE_END 101MACHINE_END
diff --git a/arch/arm/mach-at91/board-kb9202.c b/arch/arm/mach-at91/board-kb9202.c
index a813a74b65f9..9dc8d496ead1 100644
--- a/arch/arm/mach-at91/board-kb9202.c
+++ b/arch/arm/mach-at91/board-kb9202.c
@@ -48,7 +48,7 @@ static void __init kb9202_init_early(void)
48 at91rm9200_set_type(ARCH_REVISON_9200_PQFP); 48 at91rm9200_set_type(ARCH_REVISON_9200_PQFP);
49 49
50 /* Initialize processor: 10 MHz crystal */ 50 /* Initialize processor: 10 MHz crystal */
51 at91rm9200_initialize(10000000); 51 at91_initialize(10000000);
52 52
53 /* Set up the LEDs */ 53 /* Set up the LEDs */
54 at91_init_leds(AT91_PIN_PC19, AT91_PIN_PC18); 54 at91_init_leds(AT91_PIN_PC19, AT91_PIN_PC18);
@@ -69,11 +69,6 @@ static void __init kb9202_init_early(void)
69 at91_set_serial_console(0); 69 at91_set_serial_console(0);
70} 70}
71 71
72static void __init kb9202_init_irq(void)
73{
74 at91rm9200_init_interrupts(NULL);
75}
76
77static struct at91_eth_data __initdata kb9202_eth_data = { 72static struct at91_eth_data __initdata kb9202_eth_data = {
78 .phy_irq_pin = AT91_PIN_PB29, 73 .phy_irq_pin = AT91_PIN_PB29,
79 .is_rmii = 0, 74 .is_rmii = 0,
@@ -140,8 +135,8 @@ static void __init kb9202_board_init(void)
140MACHINE_START(KB9200, "KB920x") 135MACHINE_START(KB9200, "KB920x")
141 /* Maintainer: KwikByte, Inc. */ 136 /* Maintainer: KwikByte, Inc. */
142 .timer = &at91rm9200_timer, 137 .timer = &at91rm9200_timer,
143 .map_io = at91rm9200_map_io, 138 .map_io = at91_map_io,
144 .init_early = kb9202_init_early, 139 .init_early = kb9202_init_early,
145 .init_irq = kb9202_init_irq, 140 .init_irq = at91_init_irq_default,
146 .init_machine = kb9202_board_init, 141 .init_machine = kb9202_board_init,
147MACHINE_END 142MACHINE_END
diff --git a/arch/arm/mach-at91/board-neocore926.c b/arch/arm/mach-at91/board-neocore926.c
index 961e805db68c..9bc6ab32e0ac 100644
--- a/arch/arm/mach-at91/board-neocore926.c
+++ b/arch/arm/mach-at91/board-neocore926.c
@@ -54,7 +54,7 @@
54static void __init neocore926_init_early(void) 54static void __init neocore926_init_early(void)
55{ 55{
56 /* Initialize processor: 20 MHz crystal */ 56 /* Initialize processor: 20 MHz crystal */
57 at91sam9263_initialize(20000000); 57 at91_initialize(20000000);
58 58
59 /* DBGU on ttyS0. (Rx & Tx only) */ 59 /* DBGU on ttyS0. (Rx & Tx only) */
60 at91_register_uart(0, 0, 0); 60 at91_register_uart(0, 0, 0);
@@ -66,12 +66,6 @@ static void __init neocore926_init_early(void)
66 at91_set_serial_console(0); 66 at91_set_serial_console(0);
67} 67}
68 68
69static void __init neocore926_init_irq(void)
70{
71 at91sam9263_init_interrupts(NULL);
72}
73
74
75/* 69/*
76 * USB Host port 70 * USB Host port
77 */ 71 */
@@ -388,8 +382,8 @@ static void __init neocore926_board_init(void)
388MACHINE_START(NEOCORE926, "ADENEO NEOCORE 926") 382MACHINE_START(NEOCORE926, "ADENEO NEOCORE 926")
389 /* Maintainer: ADENEO */ 383 /* Maintainer: ADENEO */
390 .timer = &at91sam926x_timer, 384 .timer = &at91sam926x_timer,
391 .map_io = at91sam9263_map_io, 385 .map_io = at91_map_io,
392 .init_early = neocore926_init_early, 386 .init_early = neocore926_init_early,
393 .init_irq = neocore926_init_irq, 387 .init_irq = at91_init_irq_default,
394 .init_machine = neocore926_board_init, 388 .init_machine = neocore926_board_init,
395MACHINE_END 389MACHINE_END
diff --git a/arch/arm/mach-at91/board-pcontrol-g20.c b/arch/arm/mach-at91/board-pcontrol-g20.c
index 21a21af25878..49e3f699b48e 100644
--- a/arch/arm/mach-at91/board-pcontrol-g20.c
+++ b/arch/arm/mach-at91/board-pcontrol-g20.c
@@ -53,13 +53,6 @@ static void __init pcontrol_g20_init_early(void)
53 at91_register_uart(AT91SAM9260_ID_US4, 3, 0); 53 at91_register_uart(AT91SAM9260_ID_US4, 3, 0);
54} 54}
55 55
56
57static void __init init_irq(void)
58{
59 at91sam9260_init_interrupts(NULL);
60}
61
62
63static struct sam9_smc_config __initdata pcontrol_smc_config[2] = { { 56static struct sam9_smc_config __initdata pcontrol_smc_config[2] = { {
64 .ncs_read_setup = 16, 57 .ncs_read_setup = 16,
65 .nrd_setup = 18, 58 .nrd_setup = 18,
@@ -223,8 +216,8 @@ static void __init pcontrol_g20_board_init(void)
223MACHINE_START(PCONTROL_G20, "PControl G20") 216MACHINE_START(PCONTROL_G20, "PControl G20")
224 /* Maintainer: pgsellmann@portner-elektronik.at */ 217 /* Maintainer: pgsellmann@portner-elektronik.at */
225 .timer = &at91sam926x_timer, 218 .timer = &at91sam926x_timer,
226 .map_io = at91sam9260_map_io, 219 .map_io = at91_map_io,
227 .init_early = pcontrol_g20_init_early, 220 .init_early = pcontrol_g20_init_early,
228 .init_irq = init_irq, 221 .init_irq = at91_init_irq_default,
229 .init_machine = pcontrol_g20_board_init, 222 .init_machine = pcontrol_g20_board_init,
230MACHINE_END 223MACHINE_END
diff --git a/arch/arm/mach-at91/board-picotux200.c b/arch/arm/mach-at91/board-picotux200.c
index 756cc2a745dd..b7b8390e8a00 100644
--- a/arch/arm/mach-at91/board-picotux200.c
+++ b/arch/arm/mach-at91/board-picotux200.c
@@ -46,7 +46,7 @@
46static void __init picotux200_init_early(void) 46static void __init picotux200_init_early(void)
47{ 47{
48 /* Initialize processor: 18.432 MHz crystal */ 48 /* Initialize processor: 18.432 MHz crystal */
49 at91rm9200_initialize(18432000); 49 at91_initialize(18432000);
50 50
51 /* DBGU on ttyS0. (Rx & Tx only) */ 51 /* DBGU on ttyS0. (Rx & Tx only) */
52 at91_register_uart(0, 0, 0); 52 at91_register_uart(0, 0, 0);
@@ -60,11 +60,6 @@ static void __init picotux200_init_early(void)
60 at91_set_serial_console(0); 60 at91_set_serial_console(0);
61} 61}
62 62
63static void __init picotux200_init_irq(void)
64{
65 at91rm9200_init_interrupts(NULL);
66}
67
68static struct at91_eth_data __initdata picotux200_eth_data = { 63static struct at91_eth_data __initdata picotux200_eth_data = {
69 .phy_irq_pin = AT91_PIN_PC4, 64 .phy_irq_pin = AT91_PIN_PC4,
70 .is_rmii = 1, 65 .is_rmii = 1,
@@ -124,8 +119,8 @@ static void __init picotux200_board_init(void)
124MACHINE_START(PICOTUX2XX, "picotux 200") 119MACHINE_START(PICOTUX2XX, "picotux 200")
125 /* Maintainer: Kleinhenz Elektronik GmbH */ 120 /* Maintainer: Kleinhenz Elektronik GmbH */
126 .timer = &at91rm9200_timer, 121 .timer = &at91rm9200_timer,
127 .map_io = at91rm9200_map_io, 122 .map_io = at91_map_io,
128 .init_early = picotux200_init_early, 123 .init_early = picotux200_init_early,
129 .init_irq = picotux200_init_irq, 124 .init_irq = at91_init_irq_default,
130 .init_machine = picotux200_board_init, 125 .init_machine = picotux200_board_init,
131MACHINE_END 126MACHINE_END
diff --git a/arch/arm/mach-at91/board-qil-a9260.c b/arch/arm/mach-at91/board-qil-a9260.c
index d1a6001b0bd8..81f911033681 100644
--- a/arch/arm/mach-at91/board-qil-a9260.c
+++ b/arch/arm/mach-at91/board-qil-a9260.c
@@ -51,7 +51,7 @@
51static void __init ek_init_early(void) 51static void __init ek_init_early(void)
52{ 52{
53 /* Initialize processor: 12.000 MHz crystal */ 53 /* Initialize processor: 12.000 MHz crystal */
54 at91sam9260_initialize(12000000); 54 at91_initialize(12000000);
55 55
56 /* DBGU on ttyS0. (Rx & Tx only) */ 56 /* DBGU on ttyS0. (Rx & Tx only) */
57 at91_register_uart(0, 0, 0); 57 at91_register_uart(0, 0, 0);
@@ -72,12 +72,6 @@ static void __init ek_init_early(void)
72 72
73} 73}
74 74
75static void __init ek_init_irq(void)
76{
77 at91sam9260_init_interrupts(NULL);
78}
79
80
81/* 75/*
82 * USB Host port 76 * USB Host port
83 */ 77 */
@@ -269,8 +263,8 @@ static void __init ek_board_init(void)
269MACHINE_START(QIL_A9260, "CALAO QIL_A9260") 263MACHINE_START(QIL_A9260, "CALAO QIL_A9260")
270 /* Maintainer: calao-systems */ 264 /* Maintainer: calao-systems */
271 .timer = &at91sam926x_timer, 265 .timer = &at91sam926x_timer,
272 .map_io = at91sam9260_map_io, 266 .map_io = at91_map_io,
273 .init_early = ek_init_early, 267 .init_early = ek_init_early,
274 .init_irq = ek_init_irq, 268 .init_irq = at91_init_irq_default,
275 .init_machine = ek_board_init, 269 .init_machine = ek_board_init,
276MACHINE_END 270MACHINE_END
diff --git a/arch/arm/mach-at91/board-rm9200dk.c b/arch/arm/mach-at91/board-rm9200dk.c
index aef9627710b0..6f08faadb474 100644
--- a/arch/arm/mach-at91/board-rm9200dk.c
+++ b/arch/arm/mach-at91/board-rm9200dk.c
@@ -48,7 +48,7 @@
48static void __init dk_init_early(void) 48static void __init dk_init_early(void)
49{ 49{
50 /* Initialize processor: 18.432 MHz crystal */ 50 /* Initialize processor: 18.432 MHz crystal */
51 at91rm9200_initialize(18432000); 51 at91_initialize(18432000);
52 52
53 /* Setup the LEDs */ 53 /* Setup the LEDs */
54 at91_init_leds(AT91_PIN_PB2, AT91_PIN_PB2); 54 at91_init_leds(AT91_PIN_PB2, AT91_PIN_PB2);
@@ -65,11 +65,6 @@ static void __init dk_init_early(void)
65 at91_set_serial_console(0); 65 at91_set_serial_console(0);
66} 66}
67 67
68static void __init dk_init_irq(void)
69{
70 at91rm9200_init_interrupts(NULL);
71}
72
73static struct at91_eth_data __initdata dk_eth_data = { 68static struct at91_eth_data __initdata dk_eth_data = {
74 .phy_irq_pin = AT91_PIN_PC4, 69 .phy_irq_pin = AT91_PIN_PC4,
75 .is_rmii = 1, 70 .is_rmii = 1,
@@ -228,8 +223,8 @@ static void __init dk_board_init(void)
228MACHINE_START(AT91RM9200DK, "Atmel AT91RM9200-DK") 223MACHINE_START(AT91RM9200DK, "Atmel AT91RM9200-DK")
229 /* Maintainer: SAN People/Atmel */ 224 /* Maintainer: SAN People/Atmel */
230 .timer = &at91rm9200_timer, 225 .timer = &at91rm9200_timer,
231 .map_io = at91rm9200_map_io, 226 .map_io = at91_map_io,
232 .init_early = dk_init_early, 227 .init_early = dk_init_early,
233 .init_irq = dk_init_irq, 228 .init_irq = at91_init_irq_default,
234 .init_machine = dk_board_init, 229 .init_machine = dk_board_init,
235MACHINE_END 230MACHINE_END
diff --git a/arch/arm/mach-at91/board-rm9200ek.c b/arch/arm/mach-at91/board-rm9200ek.c
index 015a02183080..85bcccd7b9e4 100644
--- a/arch/arm/mach-at91/board-rm9200ek.c
+++ b/arch/arm/mach-at91/board-rm9200ek.c
@@ -48,7 +48,7 @@
48static void __init ek_init_early(void) 48static void __init ek_init_early(void)
49{ 49{
50 /* Initialize processor: 18.432 MHz crystal */ 50 /* Initialize processor: 18.432 MHz crystal */
51 at91rm9200_initialize(18432000); 51 at91_initialize(18432000);
52 52
53 /* Setup the LEDs */ 53 /* Setup the LEDs */
54 at91_init_leds(AT91_PIN_PB1, AT91_PIN_PB2); 54 at91_init_leds(AT91_PIN_PB1, AT91_PIN_PB2);
@@ -65,11 +65,6 @@ static void __init ek_init_early(void)
65 at91_set_serial_console(0); 65 at91_set_serial_console(0);
66} 66}
67 67
68static void __init ek_init_irq(void)
69{
70 at91rm9200_init_interrupts(NULL);
71}
72
73static struct at91_eth_data __initdata ek_eth_data = { 68static struct at91_eth_data __initdata ek_eth_data = {
74 .phy_irq_pin = AT91_PIN_PC4, 69 .phy_irq_pin = AT91_PIN_PC4,
75 .is_rmii = 1, 70 .is_rmii = 1,
@@ -194,8 +189,8 @@ static void __init ek_board_init(void)
194MACHINE_START(AT91RM9200EK, "Atmel AT91RM9200-EK") 189MACHINE_START(AT91RM9200EK, "Atmel AT91RM9200-EK")
195 /* Maintainer: SAN People/Atmel */ 190 /* Maintainer: SAN People/Atmel */
196 .timer = &at91rm9200_timer, 191 .timer = &at91rm9200_timer,
197 .map_io = at91rm9200_map_io, 192 .map_io = at91_map_io,
198 .init_early = ek_init_early, 193 .init_early = ek_init_early,
199 .init_irq = ek_init_irq, 194 .init_irq = at91_init_irq_default,
200 .init_machine = ek_board_init, 195 .init_machine = ek_board_init,
201MACHINE_END 196MACHINE_END
diff --git a/arch/arm/mach-at91/board-sam9-l9260.c b/arch/arm/mach-at91/board-sam9-l9260.c
index aaf1bf0989b3..4d3a02f1289e 100644
--- a/arch/arm/mach-at91/board-sam9-l9260.c
+++ b/arch/arm/mach-at91/board-sam9-l9260.c
@@ -47,7 +47,7 @@
47static void __init ek_init_early(void) 47static void __init ek_init_early(void)
48{ 48{
49 /* Initialize processor: 18.432 MHz crystal */ 49 /* Initialize processor: 18.432 MHz crystal */
50 at91sam9260_initialize(18432000); 50 at91_initialize(18432000);
51 51
52 /* Setup the LEDs */ 52 /* Setup the LEDs */
53 at91_init_leds(AT91_PIN_PA9, AT91_PIN_PA6); 53 at91_init_leds(AT91_PIN_PA9, AT91_PIN_PA6);
@@ -67,12 +67,6 @@ static void __init ek_init_early(void)
67 at91_set_serial_console(0); 67 at91_set_serial_console(0);
68} 68}
69 69
70static void __init ek_init_irq(void)
71{
72 at91sam9260_init_interrupts(NULL);
73}
74
75
76/* 70/*
77 * USB Host port 71 * USB Host port
78 */ 72 */
@@ -213,8 +207,8 @@ static void __init ek_board_init(void)
213MACHINE_START(SAM9_L9260, "Olimex SAM9-L9260") 207MACHINE_START(SAM9_L9260, "Olimex SAM9-L9260")
214 /* Maintainer: Olimex */ 208 /* Maintainer: Olimex */
215 .timer = &at91sam926x_timer, 209 .timer = &at91sam926x_timer,
216 .map_io = at91sam9260_map_io, 210 .map_io = at91_map_io,
217 .init_early = ek_init_early, 211 .init_early = ek_init_early,
218 .init_irq = ek_init_irq, 212 .init_irq = at91_init_irq_default,
219 .init_machine = ek_board_init, 213 .init_machine = ek_board_init,
220MACHINE_END 214MACHINE_END
diff --git a/arch/arm/mach-at91/board-sam9260ek.c b/arch/arm/mach-at91/board-sam9260ek.c
index 5c240743c5b7..8a50c3e67186 100644
--- a/arch/arm/mach-at91/board-sam9260ek.c
+++ b/arch/arm/mach-at91/board-sam9260ek.c
@@ -53,7 +53,7 @@
53static void __init ek_init_early(void) 53static void __init ek_init_early(void)
54{ 54{
55 /* Initialize processor: 18.432 MHz crystal */ 55 /* Initialize processor: 18.432 MHz crystal */
56 at91sam9260_initialize(18432000); 56 at91_initialize(18432000);
57 57
58 /* DBGU on ttyS0. (Rx & Tx only) */ 58 /* DBGU on ttyS0. (Rx & Tx only) */
59 at91_register_uart(0, 0, 0); 59 at91_register_uart(0, 0, 0);
@@ -70,12 +70,6 @@ static void __init ek_init_early(void)
70 at91_set_serial_console(0); 70 at91_set_serial_console(0);
71} 71}
72 72
73static void __init ek_init_irq(void)
74{
75 at91sam9260_init_interrupts(NULL);
76}
77
78
79/* 73/*
80 * USB Host port 74 * USB Host port
81 */ 75 */
@@ -354,8 +348,8 @@ static void __init ek_board_init(void)
354MACHINE_START(AT91SAM9260EK, "Atmel AT91SAM9260-EK") 348MACHINE_START(AT91SAM9260EK, "Atmel AT91SAM9260-EK")
355 /* Maintainer: Atmel */ 349 /* Maintainer: Atmel */
356 .timer = &at91sam926x_timer, 350 .timer = &at91sam926x_timer,
357 .map_io = at91sam9260_map_io, 351 .map_io = at91_map_io,
358 .init_early = ek_init_early, 352 .init_early = ek_init_early,
359 .init_irq = ek_init_irq, 353 .init_irq = at91_init_irq_default,
360 .init_machine = ek_board_init, 354 .init_machine = ek_board_init,
361MACHINE_END 355MACHINE_END
diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c
index b60c22b6e241..5096a0ec50c1 100644
--- a/arch/arm/mach-at91/board-sam9261ek.c
+++ b/arch/arm/mach-at91/board-sam9261ek.c
@@ -57,7 +57,7 @@
57static void __init ek_init_early(void) 57static void __init ek_init_early(void)
58{ 58{
59 /* Initialize processor: 18.432 MHz crystal */ 59 /* Initialize processor: 18.432 MHz crystal */
60 at91sam9261_initialize(18432000); 60 at91_initialize(18432000);
61 61
62 /* Setup the LEDs */ 62 /* Setup the LEDs */
63 at91_init_leds(AT91_PIN_PA13, AT91_PIN_PA14); 63 at91_init_leds(AT91_PIN_PA13, AT91_PIN_PA14);
@@ -69,12 +69,6 @@ static void __init ek_init_early(void)
69 at91_set_serial_console(0); 69 at91_set_serial_console(0);
70} 70}
71 71
72static void __init ek_init_irq(void)
73{
74 at91sam9261_init_interrupts(NULL);
75}
76
77
78/* 72/*
79 * DM9000 ethernet device 73 * DM9000 ethernet device
80 */ 74 */
@@ -621,8 +615,8 @@ MACHINE_START(AT91SAM9G10EK, "Atmel AT91SAM9G10-EK")
621#endif 615#endif
622 /* Maintainer: Atmel */ 616 /* Maintainer: Atmel */
623 .timer = &at91sam926x_timer, 617 .timer = &at91sam926x_timer,
624 .map_io = at91sam9261_map_io, 618 .map_io = at91_map_io,
625 .init_early = ek_init_early, 619 .init_early = ek_init_early,
626 .init_irq = ek_init_irq, 620 .init_irq = at91_init_irq_default,
627 .init_machine = ek_board_init, 621 .init_machine = ek_board_init,
628MACHINE_END 622MACHINE_END
diff --git a/arch/arm/mach-at91/board-sam9263ek.c b/arch/arm/mach-at91/board-sam9263ek.c
index 9bbdc92ea194..ea8f185d3b9d 100644
--- a/arch/arm/mach-at91/board-sam9263ek.c
+++ b/arch/arm/mach-at91/board-sam9263ek.c
@@ -56,7 +56,7 @@
56static void __init ek_init_early(void) 56static void __init ek_init_early(void)
57{ 57{
58 /* Initialize processor: 16.367 MHz crystal */ 58 /* Initialize processor: 16.367 MHz crystal */
59 at91sam9263_initialize(16367660); 59 at91_initialize(16367660);
60 60
61 /* DBGU on ttyS0. (Rx & Tx only) */ 61 /* DBGU on ttyS0. (Rx & Tx only) */
62 at91_register_uart(0, 0, 0); 62 at91_register_uart(0, 0, 0);
@@ -68,12 +68,6 @@ static void __init ek_init_early(void)
68 at91_set_serial_console(0); 68 at91_set_serial_console(0);
69} 69}
70 70
71static void __init ek_init_irq(void)
72{
73 at91sam9263_init_interrupts(NULL);
74}
75
76
77/* 71/*
78 * USB Host port 72 * USB Host port
79 */ 73 */
@@ -452,8 +446,8 @@ static void __init ek_board_init(void)
452MACHINE_START(AT91SAM9263EK, "Atmel AT91SAM9263-EK") 446MACHINE_START(AT91SAM9263EK, "Atmel AT91SAM9263-EK")
453 /* Maintainer: Atmel */ 447 /* Maintainer: Atmel */
454 .timer = &at91sam926x_timer, 448 .timer = &at91sam926x_timer,
455 .map_io = at91sam9263_map_io, 449 .map_io = at91_map_io,
456 .init_early = ek_init_early, 450 .init_early = ek_init_early,
457 .init_irq = ek_init_irq, 451 .init_irq = at91_init_irq_default,
458 .init_machine = ek_board_init, 452 .init_machine = ek_board_init,
459MACHINE_END 453MACHINE_END
diff --git a/arch/arm/mach-at91/board-sam9g20ek.c b/arch/arm/mach-at91/board-sam9g20ek.c
index 1325a50101a8..817f59d7251b 100644
--- a/arch/arm/mach-at91/board-sam9g20ek.c
+++ b/arch/arm/mach-at91/board-sam9g20ek.c
@@ -64,7 +64,7 @@ static int inline ek_have_2mmc(void)
64static void __init ek_init_early(void) 64static void __init ek_init_early(void)
65{ 65{
66 /* Initialize processor: 18.432 MHz crystal */ 66 /* Initialize processor: 18.432 MHz crystal */
67 at91sam9260_initialize(18432000); 67 at91_initialize(18432000);
68 68
69 /* DBGU on ttyS0. (Rx & Tx only) */ 69 /* DBGU on ttyS0. (Rx & Tx only) */
70 at91_register_uart(0, 0, 0); 70 at91_register_uart(0, 0, 0);
@@ -81,12 +81,6 @@ static void __init ek_init_early(void)
81 at91_set_serial_console(0); 81 at91_set_serial_console(0);
82} 82}
83 83
84static void __init ek_init_irq(void)
85{
86 at91sam9260_init_interrupts(NULL);
87}
88
89
90/* 84/*
91 * USB Host port 85 * USB Host port
92 */ 86 */
@@ -404,17 +398,17 @@ static void __init ek_board_init(void)
404MACHINE_START(AT91SAM9G20EK, "Atmel AT91SAM9G20-EK") 398MACHINE_START(AT91SAM9G20EK, "Atmel AT91SAM9G20-EK")
405 /* Maintainer: Atmel */ 399 /* Maintainer: Atmel */
406 .timer = &at91sam926x_timer, 400 .timer = &at91sam926x_timer,
407 .map_io = at91sam9260_map_io, 401 .map_io = at91_map_io,
408 .init_early = ek_init_early, 402 .init_early = ek_init_early,
409 .init_irq = ek_init_irq, 403 .init_irq = at91_init_irq_default,
410 .init_machine = ek_board_init, 404 .init_machine = ek_board_init,
411MACHINE_END 405MACHINE_END
412 406
413MACHINE_START(AT91SAM9G20EK_2MMC, "Atmel AT91SAM9G20-EK 2 MMC Slot Mod") 407MACHINE_START(AT91SAM9G20EK_2MMC, "Atmel AT91SAM9G20-EK 2 MMC Slot Mod")
414 /* Maintainer: Atmel */ 408 /* Maintainer: Atmel */
415 .timer = &at91sam926x_timer, 409 .timer = &at91sam926x_timer,
416 .map_io = at91sam9260_map_io, 410 .map_io = at91_map_io,
417 .init_early = ek_init_early, 411 .init_early = ek_init_early,
418 .init_irq = ek_init_irq, 412 .init_irq = at91_init_irq_default,
419 .init_machine = ek_board_init, 413 .init_machine = ek_board_init,
420MACHINE_END 414MACHINE_END
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c
index 33eaa135f248..ad234ccbf57e 100644
--- a/arch/arm/mach-at91/board-sam9m10g45ek.c
+++ b/arch/arm/mach-at91/board-sam9m10g45ek.c
@@ -50,7 +50,7 @@
50static void __init ek_init_early(void) 50static void __init ek_init_early(void)
51{ 51{
52 /* Initialize processor: 12.000 MHz crystal */ 52 /* Initialize processor: 12.000 MHz crystal */
53 at91sam9g45_initialize(12000000); 53 at91_initialize(12000000);
54 54
55 /* DGBU on ttyS0. (Rx & Tx only) */ 55 /* DGBU on ttyS0. (Rx & Tx only) */
56 at91_register_uart(0, 0, 0); 56 at91_register_uart(0, 0, 0);
@@ -63,12 +63,6 @@ static void __init ek_init_early(void)
63 at91_set_serial_console(0); 63 at91_set_serial_console(0);
64} 64}
65 65
66static void __init ek_init_irq(void)
67{
68 at91sam9g45_init_interrupts(NULL);
69}
70
71
72/* 66/*
73 * USB HS Host port (common to OHCI & EHCI) 67 * USB HS Host port (common to OHCI & EHCI)
74 */ 68 */
@@ -422,8 +416,8 @@ static void __init ek_board_init(void)
422MACHINE_START(AT91SAM9M10G45EK, "Atmel AT91SAM9M10G45-EK") 416MACHINE_START(AT91SAM9M10G45EK, "Atmel AT91SAM9M10G45-EK")
423 /* Maintainer: Atmel */ 417 /* Maintainer: Atmel */
424 .timer = &at91sam926x_timer, 418 .timer = &at91sam926x_timer,
425 .map_io = at91sam9g45_map_io, 419 .map_io = at91_map_io,
426 .init_early = ek_init_early, 420 .init_early = ek_init_early,
427 .init_irq = ek_init_irq, 421 .init_irq = at91_init_irq_default,
428 .init_machine = ek_board_init, 422 .init_machine = ek_board_init,
429MACHINE_END 423MACHINE_END
diff --git a/arch/arm/mach-at91/board-sam9rlek.c b/arch/arm/mach-at91/board-sam9rlek.c
index effb399a80a6..4f14b54b93a8 100644
--- a/arch/arm/mach-at91/board-sam9rlek.c
+++ b/arch/arm/mach-at91/board-sam9rlek.c
@@ -41,7 +41,7 @@
41static void __init ek_init_early(void) 41static void __init ek_init_early(void)
42{ 42{
43 /* Initialize processor: 12.000 MHz crystal */ 43 /* Initialize processor: 12.000 MHz crystal */
44 at91sam9rl_initialize(12000000); 44 at91_initialize(12000000);
45 45
46 /* DBGU on ttyS0. (Rx & Tx only) */ 46 /* DBGU on ttyS0. (Rx & Tx only) */
47 at91_register_uart(0, 0, 0); 47 at91_register_uart(0, 0, 0);
@@ -53,12 +53,6 @@ static void __init ek_init_early(void)
53 at91_set_serial_console(0); 53 at91_set_serial_console(0);
54} 54}
55 55
56static void __init ek_init_irq(void)
57{
58 at91sam9rl_init_interrupts(NULL);
59}
60
61
62/* 56/*
63 * USB HS Device port 57 * USB HS Device port
64 */ 58 */
@@ -330,8 +324,8 @@ static void __init ek_board_init(void)
330MACHINE_START(AT91SAM9RLEK, "Atmel AT91SAM9RL-EK") 324MACHINE_START(AT91SAM9RLEK, "Atmel AT91SAM9RL-EK")
331 /* Maintainer: Atmel */ 325 /* Maintainer: Atmel */
332 .timer = &at91sam926x_timer, 326 .timer = &at91sam926x_timer,
333 .map_io = at91sam9rl_map_io, 327 .map_io = at91_map_io,
334 .init_early = ek_init_early, 328 .init_early = ek_init_early,
335 .init_irq = ek_init_irq, 329 .init_irq = at91_init_irq_default,
336 .init_machine = ek_board_init, 330 .init_machine = ek_board_init,
337MACHINE_END 331MACHINE_END
diff --git a/arch/arm/mach-at91/board-snapper9260.c b/arch/arm/mach-at91/board-snapper9260.c
index 3eb0a1153cc8..c73d25e5faea 100644
--- a/arch/arm/mach-at91/board-snapper9260.c
+++ b/arch/arm/mach-at91/board-snapper9260.c
@@ -4,7 +4,7 @@
4 * Copyright (C) 2010 Bluewater System Ltd 4 * Copyright (C) 2010 Bluewater System Ltd
5 * 5 *
6 * Author: Andre Renaud <andre@bluewatersys.com> 6 * Author: Andre Renaud <andre@bluewatersys.com>
7 * Author: Ryan Mallon <ryan@bluewatersys.com> 7 * Author: Ryan Mallon
8 * 8 *
9 * This program is free software; you can redistribute it and/or modify 9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by 10 * it under the terms of the GNU General Public License as published by
@@ -42,7 +42,7 @@
42 42
43static void __init snapper9260_init_early(void) 43static void __init snapper9260_init_early(void)
44{ 44{
45 at91sam9260_initialize(18432000); 45 at91_initialize(18432000);
46 46
47 /* Debug on ttyS0 */ 47 /* Debug on ttyS0 */
48 at91_register_uart(0, 0, 0); 48 at91_register_uart(0, 0, 0);
@@ -55,11 +55,6 @@ static void __init snapper9260_init_early(void)
55 at91_register_uart(AT91SAM9260_ID_US2, 3, 0); 55 at91_register_uart(AT91SAM9260_ID_US2, 3, 0);
56} 56}
57 57
58static void __init snapper9260_init_irq(void)
59{
60 at91sam9260_init_interrupts(NULL);
61}
62
63static struct at91_usbh_data __initdata snapper9260_usbh_data = { 58static struct at91_usbh_data __initdata snapper9260_usbh_data = {
64 .ports = 2, 59 .ports = 2,
65}; 60};
@@ -179,9 +174,9 @@ static void __init snapper9260_board_init(void)
179 174
180MACHINE_START(SNAPPER_9260, "Bluewater Systems Snapper 9260/9G20 module") 175MACHINE_START(SNAPPER_9260, "Bluewater Systems Snapper 9260/9G20 module")
181 .timer = &at91sam926x_timer, 176 .timer = &at91sam926x_timer,
182 .map_io = at91sam9260_map_io, 177 .map_io = at91_map_io,
183 .init_early = snapper9260_init_early, 178 .init_early = snapper9260_init_early,
184 .init_irq = snapper9260_init_irq, 179 .init_irq = at91_init_irq_default,
185 .init_machine = snapper9260_board_init, 180 .init_machine = snapper9260_board_init,
186MACHINE_END 181MACHINE_END
187 182
diff --git a/arch/arm/mach-at91/board-stamp9g20.c b/arch/arm/mach-at91/board-stamp9g20.c
index 5e5c85688f5f..936e5fd7f406 100644
--- a/arch/arm/mach-at91/board-stamp9g20.c
+++ b/arch/arm/mach-at91/board-stamp9g20.c
@@ -35,7 +35,7 @@
35void __init stamp9g20_init_early(void) 35void __init stamp9g20_init_early(void)
36{ 36{
37 /* Initialize processor: 18.432 MHz crystal */ 37 /* Initialize processor: 18.432 MHz crystal */
38 at91sam9260_initialize(18432000); 38 at91_initialize(18432000);
39 39
40 /* DGBU on ttyS0. (Rx & Tx only) */ 40 /* DGBU on ttyS0. (Rx & Tx only) */
41 at91_register_uart(0, 0, 0); 41 at91_register_uart(0, 0, 0);
@@ -76,12 +76,6 @@ static void __init portuxg20_init_early(void)
76 at91_register_uart(AT91SAM9260_ID_US5, 6, 0); 76 at91_register_uart(AT91SAM9260_ID_US5, 6, 0);
77} 77}
78 78
79static void __init init_irq(void)
80{
81 at91sam9260_init_interrupts(NULL);
82}
83
84
85/* 79/*
86 * NAND flash 80 * NAND flash
87 */ 81 */
@@ -299,17 +293,17 @@ static void __init stamp9g20evb_board_init(void)
299MACHINE_START(PORTUXG20, "taskit PortuxG20") 293MACHINE_START(PORTUXG20, "taskit PortuxG20")
300 /* Maintainer: taskit GmbH */ 294 /* Maintainer: taskit GmbH */
301 .timer = &at91sam926x_timer, 295 .timer = &at91sam926x_timer,
302 .map_io = at91sam9260_map_io, 296 .map_io = at91_map_io,
303 .init_early = portuxg20_init_early, 297 .init_early = portuxg20_init_early,
304 .init_irq = init_irq, 298 .init_irq = at91_init_irq_default,
305 .init_machine = portuxg20_board_init, 299 .init_machine = portuxg20_board_init,
306MACHINE_END 300MACHINE_END
307 301
308MACHINE_START(STAMP9G20, "taskit Stamp9G20") 302MACHINE_START(STAMP9G20, "taskit Stamp9G20")
309 /* Maintainer: taskit GmbH */ 303 /* Maintainer: taskit GmbH */
310 .timer = &at91sam926x_timer, 304 .timer = &at91sam926x_timer,
311 .map_io = at91sam9260_map_io, 305 .map_io = at91_map_io,
312 .init_early = stamp9g20evb_init_early, 306 .init_early = stamp9g20evb_init_early,
313 .init_irq = init_irq, 307 .init_irq = at91_init_irq_default,
314 .init_machine = stamp9g20evb_board_init, 308 .init_machine = stamp9g20evb_board_init,
315MACHINE_END 309MACHINE_END
diff --git a/arch/arm/mach-at91/board-usb-a9260.c b/arch/arm/mach-at91/board-usb-a9260.c
index 0e784e6fedec..8c4c1a02c4be 100644
--- a/arch/arm/mach-at91/board-usb-a9260.c
+++ b/arch/arm/mach-at91/board-usb-a9260.c
@@ -51,7 +51,7 @@
51static void __init ek_init_early(void) 51static void __init ek_init_early(void)
52{ 52{
53 /* Initialize processor: 12.000 MHz crystal */ 53 /* Initialize processor: 12.000 MHz crystal */
54 at91sam9260_initialize(12000000); 54 at91_initialize(12000000);
55 55
56 /* DBGU on ttyS0. (Rx & Tx only) */ 56 /* DBGU on ttyS0. (Rx & Tx only) */
57 at91_register_uart(0, 0, 0); 57 at91_register_uart(0, 0, 0);
@@ -60,12 +60,6 @@ static void __init ek_init_early(void)
60 at91_set_serial_console(0); 60 at91_set_serial_console(0);
61} 61}
62 62
63static void __init ek_init_irq(void)
64{
65 at91sam9260_init_interrupts(NULL);
66}
67
68
69/* 63/*
70 * USB Host port 64 * USB Host port
71 */ 65 */
@@ -229,8 +223,8 @@ static void __init ek_board_init(void)
229MACHINE_START(USB_A9260, "CALAO USB_A9260") 223MACHINE_START(USB_A9260, "CALAO USB_A9260")
230 /* Maintainer: calao-systems */ 224 /* Maintainer: calao-systems */
231 .timer = &at91sam926x_timer, 225 .timer = &at91sam926x_timer,
232 .map_io = at91sam9260_map_io, 226 .map_io = at91_map_io,
233 .init_early = ek_init_early, 227 .init_early = ek_init_early,
234 .init_irq = ek_init_irq, 228 .init_irq = at91_init_irq_default,
235 .init_machine = ek_board_init, 229 .init_machine = ek_board_init,
236MACHINE_END 230MACHINE_END
diff --git a/arch/arm/mach-at91/board-usb-a9263.c b/arch/arm/mach-at91/board-usb-a9263.c
index cf626dd14b2c..25e793782a4e 100644
--- a/arch/arm/mach-at91/board-usb-a9263.c
+++ b/arch/arm/mach-at91/board-usb-a9263.c
@@ -50,7 +50,7 @@
50static void __init ek_init_early(void) 50static void __init ek_init_early(void)
51{ 51{
52 /* Initialize processor: 12.00 MHz crystal */ 52 /* Initialize processor: 12.00 MHz crystal */
53 at91sam9263_initialize(12000000); 53 at91_initialize(12000000);
54 54
55 /* DBGU on ttyS0. (Rx & Tx only) */ 55 /* DBGU on ttyS0. (Rx & Tx only) */
56 at91_register_uart(0, 0, 0); 56 at91_register_uart(0, 0, 0);
@@ -59,12 +59,6 @@ static void __init ek_init_early(void)
59 at91_set_serial_console(0); 59 at91_set_serial_console(0);
60} 60}
61 61
62static void __init ek_init_irq(void)
63{
64 at91sam9263_init_interrupts(NULL);
65}
66
67
68/* 62/*
69 * USB Host port 63 * USB Host port
70 */ 64 */
@@ -245,8 +239,8 @@ static void __init ek_board_init(void)
245MACHINE_START(USB_A9263, "CALAO USB_A9263") 239MACHINE_START(USB_A9263, "CALAO USB_A9263")
246 /* Maintainer: calao-systems */ 240 /* Maintainer: calao-systems */
247 .timer = &at91sam926x_timer, 241 .timer = &at91sam926x_timer,
248 .map_io = at91sam9263_map_io, 242 .map_io = at91_map_io,
249 .init_early = ek_init_early, 243 .init_early = ek_init_early,
250 .init_irq = ek_init_irq, 244 .init_irq = at91_init_irq_default,
251 .init_machine = ek_board_init, 245 .init_machine = ek_board_init,
252MACHINE_END 246MACHINE_END
diff --git a/arch/arm/mach-at91/board-yl-9200.c b/arch/arm/mach-at91/board-yl-9200.c
index c208cc334d7d..95edcbd2aec6 100644
--- a/arch/arm/mach-at91/board-yl-9200.c
+++ b/arch/arm/mach-at91/board-yl-9200.c
@@ -56,7 +56,7 @@ static void __init yl9200_init_early(void)
56 at91rm9200_set_type(ARCH_REVISON_9200_PQFP); 56 at91rm9200_set_type(ARCH_REVISON_9200_PQFP);
57 57
58 /* Initialize processor: 18.432 MHz crystal */ 58 /* Initialize processor: 18.432 MHz crystal */
59 at91rm9200_initialize(18432000); 59 at91_initialize(18432000);
60 60
61 /* Setup the LEDs D2=PB17 (timer), D3=PB16 (cpu) */ 61 /* Setup the LEDs D2=PB17 (timer), D3=PB16 (cpu) */
62 at91_init_leds(AT91_PIN_PB16, AT91_PIN_PB17); 62 at91_init_leds(AT91_PIN_PB16, AT91_PIN_PB17);
@@ -79,12 +79,6 @@ static void __init yl9200_init_early(void)
79 at91_set_serial_console(0); 79 at91_set_serial_console(0);
80} 80}
81 81
82static void __init yl9200_init_irq(void)
83{
84 at91rm9200_init_interrupts(NULL);
85}
86
87
88/* 82/*
89 * LEDs 83 * LEDs
90 */ 84 */
@@ -599,8 +593,8 @@ static void __init yl9200_board_init(void)
599MACHINE_START(YL9200, "uCdragon YL-9200") 593MACHINE_START(YL9200, "uCdragon YL-9200")
600 /* Maintainer: S.Birtles */ 594 /* Maintainer: S.Birtles */
601 .timer = &at91rm9200_timer, 595 .timer = &at91rm9200_timer,
602 .map_io = at91rm9200_map_io, 596 .map_io = at91_map_io,
603 .init_early = yl9200_init_early, 597 .init_early = yl9200_init_early,
604 .init_irq = yl9200_init_irq, 598 .init_irq = at91_init_irq_default,
605 .init_machine = yl9200_board_init, 599 .init_machine = yl9200_board_init,
606MACHINE_END 600MACHINE_END
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h
index 8ff3418f3430..938b34f57741 100644
--- a/arch/arm/mach-at91/generic.h
+++ b/arch/arm/mach-at91/generic.h
@@ -11,35 +11,19 @@
11#include <linux/clkdev.h> 11#include <linux/clkdev.h>
12 12
13 /* Map io */ 13 /* Map io */
14extern void __init at91rm9200_map_io(void); 14extern void __init at91_map_io(void);
15extern void __init at91sam9260_map_io(void); 15extern void __init at91_init_sram(int bank, unsigned long base,
16extern void __init at91sam9261_map_io(void); 16 unsigned int length);
17extern void __init at91sam9263_map_io(void);
18extern void __init at91sam9rl_map_io(void);
19extern void __init at91sam9g45_map_io(void);
20extern void __init at91x40_map_io(void);
21extern void __init at91cap9_map_io(void);
22 17
23 /* Processors */ 18 /* Processors */
24extern void __init at91rm9200_set_type(int type); 19extern void __init at91rm9200_set_type(int type);
25extern void __init at91rm9200_initialize(unsigned long main_clock); 20extern void __init at91_initialize(unsigned long main_clock);
26extern void __init at91sam9260_initialize(unsigned long main_clock);
27extern void __init at91sam9261_initialize(unsigned long main_clock);
28extern void __init at91sam9263_initialize(unsigned long main_clock);
29extern void __init at91sam9rl_initialize(unsigned long main_clock);
30extern void __init at91sam9g45_initialize(unsigned long main_clock);
31extern void __init at91x40_initialize(unsigned long main_clock); 21extern void __init at91x40_initialize(unsigned long main_clock);
32extern void __init at91cap9_initialize(unsigned long main_clock);
33 22
34 /* Interrupts */ 23 /* Interrupts */
35extern void __init at91rm9200_init_interrupts(unsigned int priority[]); 24extern void __init at91_init_irq_default(void);
36extern void __init at91sam9260_init_interrupts(unsigned int priority[]); 25extern void __init at91_init_interrupts(unsigned int priority[]);
37extern void __init at91sam9261_init_interrupts(unsigned int priority[]);
38extern void __init at91sam9263_init_interrupts(unsigned int priority[]);
39extern void __init at91sam9rl_init_interrupts(unsigned int priority[]);
40extern void __init at91sam9g45_init_interrupts(unsigned int priority[]);
41extern void __init at91x40_init_interrupts(unsigned int priority[]); 26extern void __init at91x40_init_interrupts(unsigned int priority[]);
42extern void __init at91cap9_init_interrupts(unsigned int priority[]);
43extern void __init at91_aic_init(unsigned int priority[]); 27extern void __init at91_aic_init(unsigned int priority[]);
44 28
45 /* Timer */ 29 /* Timer */
@@ -49,7 +33,6 @@ extern struct sys_timer at91sam926x_timer;
49extern struct sys_timer at91x40_timer; 33extern struct sys_timer at91x40_timer;
50 34
51 /* Clocks */ 35 /* Clocks */
52extern int __init at91_clock_init(unsigned long main_clock);
53/* 36/*
54 * function to specify the clock of the default console. As we do not 37 * function to specify the clock of the default console. As we do not
55 * use the device/driver bus, the dev_name is not intialize. So we need 38 * use the device/driver bus, the dev_name is not intialize. So we need
@@ -62,6 +45,11 @@ extern void __init at91sam9263_set_console_clock(int id);
62extern void __init at91sam9rl_set_console_clock(int id); 45extern void __init at91sam9rl_set_console_clock(int id);
63extern void __init at91sam9g45_set_console_clock(int id); 46extern void __init at91sam9g45_set_console_clock(int id);
64extern void __init at91cap9_set_console_clock(int id); 47extern void __init at91cap9_set_console_clock(int id);
48#ifdef CONFIG_AT91_PMC_UNIT
49extern int __init at91_clock_init(unsigned long main_clock);
50#else
51static int inline at91_clock_init(unsigned long main_clock) { return 0; }
52#endif
65struct device; 53struct device;
66 54
67 /* Power Management */ 55 /* Power Management */
diff --git a/arch/arm/mach-at91/include/mach/at91_dbgu.h b/arch/arm/mach-at91/include/mach/at91_dbgu.h
index 6dcaa7716871..dbfe455a4c41 100644
--- a/arch/arm/mach-at91/include/mach/at91_dbgu.h
+++ b/arch/arm/mach-at91/include/mach/at91_dbgu.h
@@ -16,22 +16,25 @@
16#ifndef AT91_DBGU_H 16#ifndef AT91_DBGU_H
17#define AT91_DBGU_H 17#define AT91_DBGU_H
18 18
19#define dbgu_readl(dbgu, field) \
20 __raw_readl(AT91_VA_BASE_SYS + dbgu + AT91_DBGU_ ## field)
21
19#ifdef AT91_DBGU 22#ifdef AT91_DBGU
20#define AT91_DBGU_CR (AT91_DBGU + 0x00) /* Control Register */ 23#define AT91_DBGU_CR (0x00) /* Control Register */
21#define AT91_DBGU_MR (AT91_DBGU + 0x04) /* Mode Register */ 24#define AT91_DBGU_MR (0x04) /* Mode Register */
22#define AT91_DBGU_IER (AT91_DBGU + 0x08) /* Interrupt Enable Register */ 25#define AT91_DBGU_IER (0x08) /* Interrupt Enable Register */
23#define AT91_DBGU_TXRDY (1 << 1) /* Transmitter Ready */ 26#define AT91_DBGU_TXRDY (1 << 1) /* Transmitter Ready */
24#define AT91_DBGU_TXEMPTY (1 << 9) /* Transmitter Empty */ 27#define AT91_DBGU_TXEMPTY (1 << 9) /* Transmitter Empty */
25#define AT91_DBGU_IDR (AT91_DBGU + 0x0c) /* Interrupt Disable Register */ 28#define AT91_DBGU_IDR (0x0c) /* Interrupt Disable Register */
26#define AT91_DBGU_IMR (AT91_DBGU + 0x10) /* Interrupt Mask Register */ 29#define AT91_DBGU_IMR (0x10) /* Interrupt Mask Register */
27#define AT91_DBGU_SR (AT91_DBGU + 0x14) /* Status Register */ 30#define AT91_DBGU_SR (0x14) /* Status Register */
28#define AT91_DBGU_RHR (AT91_DBGU + 0x18) /* Receiver Holding Register */ 31#define AT91_DBGU_RHR (0x18) /* Receiver Holding Register */
29#define AT91_DBGU_THR (AT91_DBGU + 0x1c) /* Transmitter Holding Register */ 32#define AT91_DBGU_THR (0x1c) /* Transmitter Holding Register */
30#define AT91_DBGU_BRGR (AT91_DBGU + 0x20) /* Baud Rate Generator Register */ 33#define AT91_DBGU_BRGR (0x20) /* Baud Rate Generator Register */
31 34
32#define AT91_DBGU_CIDR (AT91_DBGU + 0x40) /* Chip ID Register */ 35#define AT91_DBGU_CIDR (0x40) /* Chip ID Register */
33#define AT91_DBGU_EXID (AT91_DBGU + 0x44) /* Chip ID Extension Register */ 36#define AT91_DBGU_EXID (0x44) /* Chip ID Extension Register */
34#define AT91_DBGU_FNR (AT91_DBGU + 0x48) /* Force NTRST Register [SAM9 only] */ 37#define AT91_DBGU_FNR (0x48) /* Force NTRST Register [SAM9 only] */
35#define AT91_DBGU_FNTRST (1 << 0) /* Force NTRST */ 38#define AT91_DBGU_FNTRST (1 << 0) /* Force NTRST */
36 39
37#endif /* AT91_DBGU */ 40#endif /* AT91_DBGU */
diff --git a/arch/arm/mach-at91/include/mach/at91_mci.h b/arch/arm/mach-at91/include/mach/at91_mci.h
deleted file mode 100644
index 02182c16a022..000000000000
--- a/arch/arm/mach-at91/include/mach/at91_mci.h
+++ /dev/null
@@ -1,115 +0,0 @@
1/*
2 * arch/arm/mach-at91/include/mach/at91_mci.h
3 *
4 * Copyright (C) 2005 Ivan Kokshaysky
5 * Copyright (C) SAN People
6 *
7 * MultiMedia Card Interface (MCI) registers.
8 * Based on AT91RM9200 datasheet revision F.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 */
15
16#ifndef AT91_MCI_H
17#define AT91_MCI_H
18
19#define AT91_MCI_CR 0x00 /* Control Register */
20#define AT91_MCI_MCIEN (1 << 0) /* Multi-Media Interface Enable */
21#define AT91_MCI_MCIDIS (1 << 1) /* Multi-Media Interface Disable */
22#define AT91_MCI_PWSEN (1 << 2) /* Power Save Mode Enable */
23#define AT91_MCI_PWSDIS (1 << 3) /* Power Save Mode Disable */
24#define AT91_MCI_SWRST (1 << 7) /* Software Reset */
25
26#define AT91_MCI_MR 0x04 /* Mode Register */
27#define AT91_MCI_CLKDIV (0xff << 0) /* Clock Divider */
28#define AT91_MCI_PWSDIV (7 << 8) /* Power Saving Divider */
29#define AT91_MCI_RDPROOF (1 << 11) /* Read Proof Enable [SAM926[03] only] */
30#define AT91_MCI_WRPROOF (1 << 12) /* Write Proof Enable [SAM926[03] only] */
31#define AT91_MCI_PDCFBYTE (1 << 13) /* PDC Force Byte Transfer [SAM926[03] only] */
32#define AT91_MCI_PDCPADV (1 << 14) /* PDC Padding Value */
33#define AT91_MCI_PDCMODE (1 << 15) /* PDC-orientated Mode */
34#define AT91_MCI_BLKLEN (0xfff << 18) /* Data Block Length */
35
36#define AT91_MCI_DTOR 0x08 /* Data Timeout Register */
37#define AT91_MCI_DTOCYC (0xf << 0) /* Data Timeout Cycle Number */
38#define AT91_MCI_DTOMUL (7 << 4) /* Data Timeout Multiplier */
39#define AT91_MCI_DTOMUL_1 (0 << 4)
40#define AT91_MCI_DTOMUL_16 (1 << 4)
41#define AT91_MCI_DTOMUL_128 (2 << 4)
42#define AT91_MCI_DTOMUL_256 (3 << 4)
43#define AT91_MCI_DTOMUL_1K (4 << 4)
44#define AT91_MCI_DTOMUL_4K (5 << 4)
45#define AT91_MCI_DTOMUL_64K (6 << 4)
46#define AT91_MCI_DTOMUL_1M (7 << 4)
47
48#define AT91_MCI_SDCR 0x0c /* SD Card Register */
49#define AT91_MCI_SDCSEL (3 << 0) /* SD Card Selector */
50#define AT91_MCI_SDCBUS (1 << 7) /* 1-bit or 4-bit bus */
51
52#define AT91_MCI_ARGR 0x10 /* Argument Register */
53
54#define AT91_MCI_CMDR 0x14 /* Command Register */
55#define AT91_MCI_CMDNB (0x3f << 0) /* Command Number */
56#define AT91_MCI_RSPTYP (3 << 6) /* Response Type */
57#define AT91_MCI_RSPTYP_NONE (0 << 6)
58#define AT91_MCI_RSPTYP_48 (1 << 6)
59#define AT91_MCI_RSPTYP_136 (2 << 6)
60#define AT91_MCI_SPCMD (7 << 8) /* Special Command */
61#define AT91_MCI_SPCMD_NONE (0 << 8)
62#define AT91_MCI_SPCMD_INIT (1 << 8)
63#define AT91_MCI_SPCMD_SYNC (2 << 8)
64#define AT91_MCI_SPCMD_ICMD (4 << 8)
65#define AT91_MCI_SPCMD_IRESP (5 << 8)
66#define AT91_MCI_OPDCMD (1 << 11) /* Open Drain Command */
67#define AT91_MCI_MAXLAT (1 << 12) /* Max Latency for Command to Response */
68#define AT91_MCI_TRCMD (3 << 16) /* Transfer Command */
69#define AT91_MCI_TRCMD_NONE (0 << 16)
70#define AT91_MCI_TRCMD_START (1 << 16)
71#define AT91_MCI_TRCMD_STOP (2 << 16)
72#define AT91_MCI_TRDIR (1 << 18) /* Transfer Direction */
73#define AT91_MCI_TRTYP (3 << 19) /* Transfer Type */
74#define AT91_MCI_TRTYP_BLOCK (0 << 19)
75#define AT91_MCI_TRTYP_MULTIPLE (1 << 19)
76#define AT91_MCI_TRTYP_STREAM (2 << 19)
77#define AT91_MCI_TRTYP_SDIO_BYTE (4 << 19)
78#define AT91_MCI_TRTYP_SDIO_BLOCK (5 << 19)
79
80#define AT91_MCI_BLKR 0x18 /* Block Register */
81#define AT91_MCI_BLKR_BCNT(n) ((0xffff & (n)) << 0) /* Block count */
82#define AT91_MCI_BLKR_BLKLEN(n) ((0xffff & (n)) << 16) /* Block length */
83
84#define AT91_MCI_RSPR(n) (0x20 + ((n) * 4)) /* Response Registers 0-3 */
85#define AT91_MCR_RDR 0x30 /* Receive Data Register */
86#define AT91_MCR_TDR 0x34 /* Transmit Data Register */
87
88#define AT91_MCI_SR 0x40 /* Status Register */
89#define AT91_MCI_CMDRDY (1 << 0) /* Command Ready */
90#define AT91_MCI_RXRDY (1 << 1) /* Receiver Ready */
91#define AT91_MCI_TXRDY (1 << 2) /* Transmit Ready */
92#define AT91_MCI_BLKE (1 << 3) /* Data Block Ended */
93#define AT91_MCI_DTIP (1 << 4) /* Data Transfer in Progress */
94#define AT91_MCI_NOTBUSY (1 << 5) /* Data Not Busy */
95#define AT91_MCI_ENDRX (1 << 6) /* End of RX Buffer */
96#define AT91_MCI_ENDTX (1 << 7) /* End fo TX Buffer */
97#define AT91_MCI_SDIOIRQA (1 << 8) /* SDIO Interrupt for Slot A */
98#define AT91_MCI_SDIOIRQB (1 << 9) /* SDIO Interrupt for Slot B */
99#define AT91_MCI_RXBUFF (1 << 14) /* RX Buffer Full */
100#define AT91_MCI_TXBUFE (1 << 15) /* TX Buffer Empty */
101#define AT91_MCI_RINDE (1 << 16) /* Response Index Error */
102#define AT91_MCI_RDIRE (1 << 17) /* Response Direction Error */
103#define AT91_MCI_RCRCE (1 << 18) /* Response CRC Error */
104#define AT91_MCI_RENDE (1 << 19) /* Response End Bit Error */
105#define AT91_MCI_RTOE (1 << 20) /* Response Time-out Error */
106#define AT91_MCI_DCRCE (1 << 21) /* Data CRC Error */
107#define AT91_MCI_DTOE (1 << 22) /* Data Time-out Error */
108#define AT91_MCI_OVRE (1 << 30) /* Overrun */
109#define AT91_MCI_UNRE (1 << 31) /* Underrun */
110
111#define AT91_MCI_IER 0x44 /* Interrupt Enable Register */
112#define AT91_MCI_IDR 0x48 /* Interrupt Disable Register */
113#define AT91_MCI_IMR 0x4c /* Interrupt Mask Register */
114
115#endif
diff --git a/arch/arm/mach-at91/include/mach/at91_wdt.h b/arch/arm/mach-at91/include/mach/at91_wdt.h
deleted file mode 100644
index fecc2e9f0ca8..000000000000
--- a/arch/arm/mach-at91/include/mach/at91_wdt.h
+++ /dev/null
@@ -1,37 +0,0 @@
1/*
2 * arch/arm/mach-at91/include/mach/at91_wdt.h
3 *
4 * Copyright (C) 2007 Andrew Victor
5 * Copyright (C) 2007 Atmel Corporation.
6 *
7 * Watchdog Timer (WDT) - System peripherals regsters.
8 * Based on AT91SAM9261 datasheet revision D.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 */
15
16#ifndef AT91_WDT_H
17#define AT91_WDT_H
18
19#define AT91_WDT_CR (AT91_WDT + 0x00) /* Watchdog Control Register */
20#define AT91_WDT_WDRSTT (1 << 0) /* Restart */
21#define AT91_WDT_KEY (0xa5 << 24) /* KEY Password */
22
23#define AT91_WDT_MR (AT91_WDT + 0x04) /* Watchdog Mode Register */
24#define AT91_WDT_WDV (0xfff << 0) /* Counter Value */
25#define AT91_WDT_WDFIEN (1 << 12) /* Fault Interrupt Enable */
26#define AT91_WDT_WDRSTEN (1 << 13) /* Reset Processor */
27#define AT91_WDT_WDRPROC (1 << 14) /* Timer Restart */
28#define AT91_WDT_WDDIS (1 << 15) /* Watchdog Disable */
29#define AT91_WDT_WDD (0xfff << 16) /* Delta Value */
30#define AT91_WDT_WDDBGHLT (1 << 28) /* Debug Halt */
31#define AT91_WDT_WDIDLEHLT (1 << 29) /* Idle Halt */
32
33#define AT91_WDT_SR (AT91_WDT + 0x08) /* Watchdog Status Register */
34#define AT91_WDT_WDUNF (1 << 0) /* Watchdog Underflow */
35#define AT91_WDT_WDERR (1 << 1) /* Watchdog Error */
36
37#endif
diff --git a/arch/arm/mach-at91/include/mach/at91cap9.h b/arch/arm/mach-at91/include/mach/at91cap9.h
index 665993849a7b..c5df1e8f1955 100644
--- a/arch/arm/mach-at91/include/mach/at91cap9.h
+++ b/arch/arm/mach-at91/include/mach/at91cap9.h
@@ -75,7 +75,6 @@
75#define AT91CAP9_BASE_EMAC 0xfffbc000 75#define AT91CAP9_BASE_EMAC 0xfffbc000
76#define AT91CAP9_BASE_ADC 0xfffc0000 76#define AT91CAP9_BASE_ADC 0xfffc0000
77#define AT91CAP9_BASE_ISI 0xfffc4000 77#define AT91CAP9_BASE_ISI 0xfffc4000
78#define AT91_BASE_SYS 0xffffe200
79 78
80/* 79/*
81 * System Peripherals (offset from AT91_BASE_SYS) 80 * System Peripherals (offset from AT91_BASE_SYS)
diff --git a/arch/arm/mach-at91/include/mach/at91rm9200.h b/arch/arm/mach-at91/include/mach/at91rm9200.h
index 99e0f8d02d7b..e4037b500302 100644
--- a/arch/arm/mach-at91/include/mach/at91rm9200.h
+++ b/arch/arm/mach-at91/include/mach/at91rm9200.h
@@ -74,7 +74,6 @@
74#define AT91RM9200_BASE_SSC1 0xfffd4000 74#define AT91RM9200_BASE_SSC1 0xfffd4000
75#define AT91RM9200_BASE_SSC2 0xfffd8000 75#define AT91RM9200_BASE_SSC2 0xfffd8000
76#define AT91RM9200_BASE_SPI 0xfffe0000 76#define AT91RM9200_BASE_SPI 0xfffe0000
77#define AT91_BASE_SYS 0xfffff000
78 77
79 78
80/* 79/*
diff --git a/arch/arm/mach-at91/include/mach/at91sam9260.h b/arch/arm/mach-at91/include/mach/at91sam9260.h
index 8b6bf835cd73..9a791165913f 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9260.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9260.h
@@ -76,7 +76,6 @@
76#define AT91SAM9260_BASE_TC4 0xfffdc040 76#define AT91SAM9260_BASE_TC4 0xfffdc040
77#define AT91SAM9260_BASE_TC5 0xfffdc080 77#define AT91SAM9260_BASE_TC5 0xfffdc080
78#define AT91SAM9260_BASE_ADC 0xfffe0000 78#define AT91SAM9260_BASE_ADC 0xfffe0000
79#define AT91_BASE_SYS 0xffffe800
80 79
81/* 80/*
82 * System Peripherals (offset from AT91_BASE_SYS) 81 * System Peripherals (offset from AT91_BASE_SYS)
diff --git a/arch/arm/mach-at91/include/mach/at91sam9261.h b/arch/arm/mach-at91/include/mach/at91sam9261.h
index eafbddaf523c..ce596204cefa 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9261.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9261.h
@@ -60,7 +60,6 @@
60#define AT91SAM9261_BASE_SSC2 0xfffc4000 60#define AT91SAM9261_BASE_SSC2 0xfffc4000
61#define AT91SAM9261_BASE_SPI0 0xfffc8000 61#define AT91SAM9261_BASE_SPI0 0xfffc8000
62#define AT91SAM9261_BASE_SPI1 0xfffcc000 62#define AT91SAM9261_BASE_SPI1 0xfffcc000
63#define AT91_BASE_SYS 0xffffea00
64 63
65 64
66/* 65/*
diff --git a/arch/arm/mach-at91/include/mach/at91sam9263.h b/arch/arm/mach-at91/include/mach/at91sam9263.h
index e2d348213a7b..f1b92961a2b1 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9263.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9263.h
@@ -70,7 +70,6 @@
70#define AT91SAM9263_BASE_EMAC 0xfffbc000 70#define AT91SAM9263_BASE_EMAC 0xfffbc000
71#define AT91SAM9263_BASE_ISI 0xfffc4000 71#define AT91SAM9263_BASE_ISI 0xfffc4000
72#define AT91SAM9263_BASE_2DGE 0xfffc8000 72#define AT91SAM9263_BASE_2DGE 0xfffc8000
73#define AT91_BASE_SYS 0xffffe000
74 73
75/* 74/*
76 * System Peripherals (offset from AT91_BASE_SYS) 75 * System Peripherals (offset from AT91_BASE_SYS)
diff --git a/arch/arm/mach-at91/include/mach/at91sam9g45.h b/arch/arm/mach-at91/include/mach/at91sam9g45.h
index 659304aa73d9..2c611b9a0138 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9g45.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9g45.h
@@ -82,7 +82,6 @@
82#define AT91SAM9G45_BASE_TC3 0xfffd4000 82#define AT91SAM9G45_BASE_TC3 0xfffd4000
83#define AT91SAM9G45_BASE_TC4 0xfffd4040 83#define AT91SAM9G45_BASE_TC4 0xfffd4040
84#define AT91SAM9G45_BASE_TC5 0xfffd4080 84#define AT91SAM9G45_BASE_TC5 0xfffd4080
85#define AT91_BASE_SYS 0xffffe200
86 85
87/* 86/*
88 * System Peripherals (offset from AT91_BASE_SYS) 87 * System Peripherals (offset from AT91_BASE_SYS)
diff --git a/arch/arm/mach-at91/include/mach/at91sam9rl.h b/arch/arm/mach-at91/include/mach/at91sam9rl.h
index 41dbbe61055c..1aabacd315d4 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9rl.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9rl.h
@@ -64,7 +64,6 @@
64#define AT91SAM9RL_BASE_TSC 0xfffd0000 64#define AT91SAM9RL_BASE_TSC 0xfffd0000
65#define AT91SAM9RL_BASE_UDPHS 0xfffd4000 65#define AT91SAM9RL_BASE_UDPHS 0xfffd4000
66#define AT91SAM9RL_BASE_AC97C 0xfffd8000 66#define AT91SAM9RL_BASE_AC97C 0xfffd8000
67#define AT91_BASE_SYS 0xffffc000
68 67
69 68
70/* 69/*
diff --git a/arch/arm/mach-at91/include/mach/clkdev.h b/arch/arm/mach-at91/include/mach/clkdev.h
deleted file mode 100644
index 04b37a89801c..000000000000
--- a/arch/arm/mach-at91/include/mach/clkdev.h
+++ /dev/null
@@ -1,7 +0,0 @@
1#ifndef __ASM_MACH_CLKDEV_H
2#define __ASM_MACH_CLKDEV_H
3
4#define __clk_get(clk) ({ 1; })
5#define __clk_put(clk) do { } while (0)
6
7#endif
diff --git a/arch/arm/mach-at91/include/mach/cpu.h b/arch/arm/mach-at91/include/mach/cpu.h
index df966c2bc2d4..f6ce936dba2b 100644
--- a/arch/arm/mach-at91/include/mach/cpu.h
+++ b/arch/arm/mach-at91/include/mach/cpu.h
@@ -1,7 +1,8 @@
1/* 1/*
2 * arch/arm/mach-at91/include/mach/cpu.h 2 * arch/arm/mach-at91/include/mach/cpu.h
3 * 3 *
4 * Copyright (C) 2006 SAN People 4 * Copyright (C) 2006 SAN People
5 * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
5 * 6 *
6 * This program is free software; you can redistribute it and/or modify 7 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by 8 * it under the terms of the GNU General Public License as published by
@@ -10,12 +11,8 @@
10 * 11 *
11 */ 12 */
12 13
13#ifndef __ASM_ARCH_CPU_H 14#ifndef __MACH_CPU_H__
14#define __ASM_ARCH_CPU_H 15#define __MACH_CPU_H__
15
16#include <mach/hardware.h>
17#include <mach/at91_dbgu.h>
18
19 16
20#define ARCH_ID_AT91RM9200 0x09290780 17#define ARCH_ID_AT91RM9200 0x09290780
21#define ARCH_ID_AT91SAM9260 0x019803a0 18#define ARCH_ID_AT91SAM9260 0x019803a0
@@ -39,16 +36,6 @@
39#define ARCH_ID_AT91M40807 0x14080745 36#define ARCH_ID_AT91M40807 0x14080745
40#define ARCH_ID_AT91R40008 0x44000840 37#define ARCH_ID_AT91R40008 0x44000840
41 38
42static inline unsigned long at91_cpu_identify(void)
43{
44 return (at91_sys_read(AT91_DBGU_CIDR) & ~AT91_CIDR_VERSION);
45}
46
47static inline unsigned long at91_cpu_fully_identify(void)
48{
49 return at91_sys_read(AT91_DBGU_CIDR);
50}
51
52#define ARCH_EXID_AT91SAM9M11 0x00000001 39#define ARCH_EXID_AT91SAM9M11 0x00000001
53#define ARCH_EXID_AT91SAM9M10 0x00000002 40#define ARCH_EXID_AT91SAM9M10 0x00000002
54#define ARCH_EXID_AT91SAM9G46 0x00000003 41#define ARCH_EXID_AT91SAM9G46 0x00000003
@@ -60,40 +47,80 @@ static inline unsigned long at91_cpu_fully_identify(void)
60#define ARCH_EXID_AT91SAM9G25 0x00000003 47#define ARCH_EXID_AT91SAM9G25 0x00000003
61#define ARCH_EXID_AT91SAM9X25 0x00000004 48#define ARCH_EXID_AT91SAM9X25 0x00000004
62 49
63static inline unsigned long at91_exid_identify(void)
64{
65 return at91_sys_read(AT91_DBGU_EXID);
66}
67
68
69#define ARCH_FAMILY_AT91X92 0x09200000 50#define ARCH_FAMILY_AT91X92 0x09200000
70#define ARCH_FAMILY_AT91SAM9 0x01900000 51#define ARCH_FAMILY_AT91SAM9 0x01900000
71#define ARCH_FAMILY_AT91SAM9XE 0x02900000 52#define ARCH_FAMILY_AT91SAM9XE 0x02900000
72 53
73static inline unsigned long at91_arch_identify(void) 54/* PMC revision */
74{
75 return (at91_sys_read(AT91_DBGU_CIDR) & AT91_CIDR_ARCH);
76}
77
78#ifdef CONFIG_ARCH_AT91CAP9
79#include <mach/at91_pmc.h>
80
81#define ARCH_REVISION_CAP9_B 0x399 55#define ARCH_REVISION_CAP9_B 0x399
82#define ARCH_REVISION_CAP9_C 0x601 56#define ARCH_REVISION_CAP9_C 0x601
83 57
84static inline unsigned long at91cap9_rev_identify(void) 58/* RM9200 type */
59#define ARCH_REVISON_9200_BGA (0 << 0)
60#define ARCH_REVISON_9200_PQFP (1 << 0)
61
62enum at91_soc_type {
63 /* 920T */
64 AT91_SOC_RM9200,
65
66 /* CAP */
67 AT91_SOC_CAP9,
68
69 /* SAM92xx */
70 AT91_SOC_SAM9260, AT91_SOC_SAM9261, AT91_SOC_SAM9263,
71
72 /* SAM9Gxx */
73 AT91_SOC_SAM9G10, AT91_SOC_SAM9G20, AT91_SOC_SAM9G45,
74
75 /* SAM9RL */
76 AT91_SOC_SAM9RL,
77
78 /* SAM9X5 */
79 AT91_SOC_SAM9X5,
80
81 /* Unknown type */
82 AT91_SOC_NONE
83};
84
85enum at91_soc_subtype {
86 /* RM9200 */
87 AT91_SOC_RM9200_BGA, AT91_SOC_RM9200_PQFP,
88
89 /* CAP9 */
90 AT91_SOC_CAP9_REV_B, AT91_SOC_CAP9_REV_C,
91
92 /* SAM9260 */
93 AT91_SOC_SAM9XE,
94
95 /* SAM9G45 */
96 AT91_SOC_SAM9G45ES, AT91_SOC_SAM9M10, AT91_SOC_SAM9G46, AT91_SOC_SAM9M11,
97
98 /* SAM9X5 */
99 AT91_SOC_SAM9G15, AT91_SOC_SAM9G35, AT91_SOC_SAM9X35,
100 AT91_SOC_SAM9G25, AT91_SOC_SAM9X25,
101
102 /* Unknown subtype */
103 AT91_SOC_SUBTYPE_NONE
104};
105
106struct at91_socinfo {
107 unsigned int type, subtype;
108 unsigned int cidr, exid;
109};
110
111extern struct at91_socinfo at91_soc_initdata;
112const char *at91_get_soc_type(struct at91_socinfo *c);
113const char *at91_get_soc_subtype(struct at91_socinfo *c);
114
115static inline int at91_soc_is_detected(void)
85{ 116{
86 return (at91_sys_read(AT91_PMC_VER)); 117 return at91_soc_initdata.type != AT91_SOC_NONE;
87} 118}
88#endif
89 119
90#ifdef CONFIG_ARCH_AT91RM9200 120#ifdef CONFIG_ARCH_AT91RM9200
91extern int rm9200_type; 121#define cpu_is_at91rm9200() (at91_soc_initdata.type == AT91_SOC_RM9200)
92#define ARCH_REVISON_9200_BGA (0 << 0) 122#define cpu_is_at91rm9200_bga() (at91_soc_initdata.subtype == AT91_SOC_RM9200_BGA)
93#define ARCH_REVISON_9200_PQFP (1 << 0) 123#define cpu_is_at91rm9200_pqfp() (at91_soc_initdata.subtype == AT91_SOC_RM9200_PQFP)
94#define cpu_is_at91rm9200() (at91_cpu_identify() == ARCH_ID_AT91RM9200)
95#define cpu_is_at91rm9200_bga() (!cpu_is_at91rm9200_pqfp())
96#define cpu_is_at91rm9200_pqfp() (cpu_is_at91rm9200() && rm9200_type & ARCH_REVISON_9200_PQFP)
97#else 124#else
98#define cpu_is_at91rm9200() (0) 125#define cpu_is_at91rm9200() (0)
99#define cpu_is_at91rm9200_bga() (0) 126#define cpu_is_at91rm9200_bga() (0)
@@ -101,52 +128,49 @@ extern int rm9200_type;
101#endif 128#endif
102 129
103#ifdef CONFIG_ARCH_AT91SAM9260 130#ifdef CONFIG_ARCH_AT91SAM9260
104#define cpu_is_at91sam9xe() (at91_arch_identify() == ARCH_FAMILY_AT91SAM9XE) 131#define cpu_is_at91sam9xe() (at91_soc_initdata.subtype == AT91_SOC_SAM9XE)
105#define cpu_is_at91sam9260() ((at91_cpu_identify() == ARCH_ID_AT91SAM9260) || cpu_is_at91sam9xe()) 132#define cpu_is_at91sam9260() (at91_soc_initdata.type == AT91_SOC_SAM9260)
106#else 133#else
107#define cpu_is_at91sam9xe() (0) 134#define cpu_is_at91sam9xe() (0)
108#define cpu_is_at91sam9260() (0) 135#define cpu_is_at91sam9260() (0)
109#endif 136#endif
110 137
111#ifdef CONFIG_ARCH_AT91SAM9G20 138#ifdef CONFIG_ARCH_AT91SAM9G20
112#define cpu_is_at91sam9g20() (at91_cpu_identify() == ARCH_ID_AT91SAM9G20) 139#define cpu_is_at91sam9g20() (at91_soc_initdata.type == AT91_SOC_SAM9G20)
113#else 140#else
114#define cpu_is_at91sam9g20() (0) 141#define cpu_is_at91sam9g20() (0)
115#endif 142#endif
116 143
117#ifdef CONFIG_ARCH_AT91SAM9261 144#ifdef CONFIG_ARCH_AT91SAM9261
118#define cpu_is_at91sam9261() (at91_cpu_identify() == ARCH_ID_AT91SAM9261) 145#define cpu_is_at91sam9261() (at91_soc_initdata.type == AT91_SOC_SAM9261)
119#else 146#else
120#define cpu_is_at91sam9261() (0) 147#define cpu_is_at91sam9261() (0)
121#endif 148#endif
122 149
123#ifdef CONFIG_ARCH_AT91SAM9G10 150#ifdef CONFIG_ARCH_AT91SAM9G10
124#define cpu_is_at91sam9g10() ((at91_cpu_identify() & ~AT91_CIDR_EXT) == ARCH_ID_AT91SAM9G10) 151#define cpu_is_at91sam9g10() (at91_soc_initdata.type == AT91_SOC_SAM9G10)
125#else 152#else
126#define cpu_is_at91sam9g10() (0) 153#define cpu_is_at91sam9g10() (0)
127#endif 154#endif
128 155
129#ifdef CONFIG_ARCH_AT91SAM9263 156#ifdef CONFIG_ARCH_AT91SAM9263
130#define cpu_is_at91sam9263() (at91_cpu_identify() == ARCH_ID_AT91SAM9263) 157#define cpu_is_at91sam9263() (at91_soc_initdata.type == AT91_SOC_SAM9263)
131#else 158#else
132#define cpu_is_at91sam9263() (0) 159#define cpu_is_at91sam9263() (0)
133#endif 160#endif
134 161
135#ifdef CONFIG_ARCH_AT91SAM9RL 162#ifdef CONFIG_ARCH_AT91SAM9RL
136#define cpu_is_at91sam9rl() (at91_cpu_identify() == ARCH_ID_AT91SAM9RL64) 163#define cpu_is_at91sam9rl() (at91_soc_initdata.type == AT91_SOC_SAM9RL)
137#else 164#else
138#define cpu_is_at91sam9rl() (0) 165#define cpu_is_at91sam9rl() (0)
139#endif 166#endif
140 167
141#ifdef CONFIG_ARCH_AT91SAM9G45 168#ifdef CONFIG_ARCH_AT91SAM9G45
142#define cpu_is_at91sam9g45() (at91_cpu_identify() == ARCH_ID_AT91SAM9G45) 169#define cpu_is_at91sam9g45() (at91_soc_initdata.type == AT91_SOC_SAM9G45)
143#define cpu_is_at91sam9g45es() (at91_cpu_fully_identify() == ARCH_ID_AT91SAM9G45ES) 170#define cpu_is_at91sam9g45es() (at91_soc_initdata.subtype == AT91_SOC_SAM9G45ES)
144#define cpu_is_at91sam9m10() (cpu_is_at91sam9g45() && \ 171#define cpu_is_at91sam9m10() (at91_soc_initdata.subtype == AT91_SOC_SAM9M10)
145 (at91_exid_identify() == ARCH_EXID_AT91SAM9M10)) 172#define cpu_is_at91sam9g46() (at91_soc_initdata.subtype == AT91_SOC_SAM9G46)
146#define cpu_is_at91sam9m46() (cpu_is_at91sam9g45() && \ 173#define cpu_is_at91sam9m11() (at91_soc_initdata.subtype == AT91_SOC_SAM9M11)
147 (at91_exid_identify() == ARCH_EXID_AT91SAM9G46))
148#define cpu_is_at91sam9m11() (cpu_is_at91sam9g45() && \
149 (at91_exid_identify() == ARCH_EXID_AT91SAM9M11))
150#else 174#else
151#define cpu_is_at91sam9g45() (0) 175#define cpu_is_at91sam9g45() (0)
152#define cpu_is_at91sam9g45es() (0) 176#define cpu_is_at91sam9g45es() (0)
@@ -156,17 +180,12 @@ extern int rm9200_type;
156#endif 180#endif
157 181
158#ifdef CONFIG_ARCH_AT91SAM9X5 182#ifdef CONFIG_ARCH_AT91SAM9X5
159#define cpu_is_at91sam9x5() (at91_cpu_identify() == ARCH_ID_AT91SAM9X5) 183#define cpu_is_at91sam9x5() (at91_soc_initdata.type == AT91_SOC_SAM9X5)
160#define cpu_is_at91sam9g15() (cpu_is_at91sam9x5() && \ 184#define cpu_is_at91sam9g15() (at91_soc_initdata.subtype == AT91_SOC_SAM9G15)
161 (at91_exid_identify() == ARCH_EXID_AT91SAM9G15)) 185#define cpu_is_at91sam9g35() (at91_soc_initdata.subtype == AT91_SOC_SAM9G35)
162#define cpu_is_at91sam9g35() (cpu_is_at91sam9x5() && \ 186#define cpu_is_at91sam9x35() (at91_soc_initdata.subtype == AT91_SOC_SAM9X35)
163 (at91_exid_identify() == ARCH_EXID_AT91SAM9G35)) 187#define cpu_is_at91sam9g25() (at91_soc_initdata.subtype == AT91_SOC_SAM9G25)
164#define cpu_is_at91sam9x35() (cpu_is_at91sam9x5() && \ 188#define cpu_is_at91sam9x25() (at91_soc_initdata.subtype == AT91_SOC_SAM9X25)
165 (at91_exid_identify() == ARCH_EXID_AT91SAM9X35))
166#define cpu_is_at91sam9g25() (cpu_is_at91sam9x5() && \
167 (at91_exid_identify() == ARCH_EXID_AT91SAM9G25))
168#define cpu_is_at91sam9x25() (cpu_is_at91sam9x5() && \
169 (at91_exid_identify() == ARCH_EXID_AT91SAM9X25))
170#else 189#else
171#define cpu_is_at91sam9x5() (0) 190#define cpu_is_at91sam9x5() (0)
172#define cpu_is_at91sam9g15() (0) 191#define cpu_is_at91sam9g15() (0)
@@ -177,9 +196,9 @@ extern int rm9200_type;
177#endif 196#endif
178 197
179#ifdef CONFIG_ARCH_AT91CAP9 198#ifdef CONFIG_ARCH_AT91CAP9
180#define cpu_is_at91cap9() (at91_cpu_identify() == ARCH_ID_AT91CAP9) 199#define cpu_is_at91cap9() (at91_soc_initdata.type == AT91_SOC_CAP9)
181#define cpu_is_at91cap9_revB() (at91cap9_rev_identify() == ARCH_REVISION_CAP9_B) 200#define cpu_is_at91cap9_revB() (at91_soc_initdata.subtype == AT91_SOC_CAP9_REV_B)
182#define cpu_is_at91cap9_revC() (at91cap9_rev_identify() == ARCH_REVISION_CAP9_C) 201#define cpu_is_at91cap9_revC() (at91_soc_initdata.subtype == AT91_SOC_CAP9_REV_C)
183#else 202#else
184#define cpu_is_at91cap9() (0) 203#define cpu_is_at91cap9() (0)
185#define cpu_is_at91cap9_revB() (0) 204#define cpu_is_at91cap9_revB() (0)
@@ -192,4 +211,4 @@ extern int rm9200_type;
192 */ 211 */
193#define cpu_is_at32ap7000() (0) 212#define cpu_is_at32ap7000() (0)
194 213
195#endif 214#endif /* __MACH_CPU_H__ */
diff --git a/arch/arm/mach-at91/include/mach/debug-macro.S b/arch/arm/mach-at91/include/mach/debug-macro.S
index 0f959faf74a9..bc1e0b2e2f4f 100644
--- a/arch/arm/mach-at91/include/mach/debug-macro.S
+++ b/arch/arm/mach-at91/include/mach/debug-macro.S
@@ -15,23 +15,23 @@
15#include <mach/at91_dbgu.h> 15#include <mach/at91_dbgu.h>
16 16
17 .macro addruart, rp, rv 17 .macro addruart, rp, rv
18 ldr \rp, =(AT91_BASE_SYS + AT91_DBGU) @ System peripherals (phys address) 18 ldr \rp, =(AT91_BASE_SYS + AT91_DBGU) @ System peripherals (phys address)
19 ldr \rv, =(AT91_VA_BASE_SYS + AT91_DBGU) @ System peripherals (virt address) 19 ldr \rv, =(AT91_VA_BASE_SYS + AT91_DBGU) @ System peripherals (virt address)
20 .endm 20 .endm
21 21
22 .macro senduart,rd,rx 22 .macro senduart,rd,rx
23 strb \rd, [\rx, #(AT91_DBGU_THR - AT91_DBGU)] @ Write to Transmitter Holding Register 23 strb \rd, [\rx, #(AT91_DBGU_THR)] @ Write to Transmitter Holding Register
24 .endm 24 .endm
25 25
26 .macro waituart,rd,rx 26 .macro waituart,rd,rx
271001: ldr \rd, [\rx, #(AT91_DBGU_SR - AT91_DBGU)] @ Read Status Register 271001: ldr \rd, [\rx, #(AT91_DBGU_SR)] @ Read Status Register
28 tst \rd, #AT91_DBGU_TXRDY @ DBGU_TXRDY = 1 when ready to transmit 28 tst \rd, #AT91_DBGU_TXRDY @ DBGU_TXRDY = 1 when ready to transmit
29 beq 1001b 29 beq 1001b
30 .endm 30 .endm
31 31
32 .macro busyuart,rd,rx 32 .macro busyuart,rd,rx
331001: ldr \rd, [\rx, #(AT91_DBGU_SR - AT91_DBGU)] @ Read Status Register 331001: ldr \rd, [\rx, #(AT91_DBGU_SR)] @ Read Status Register
34 tst \rd, #AT91_DBGU_TXEMPTY @ DBGU_TXEMPTY = 1 when transmission complete 34 tst \rd, #AT91_DBGU_TXEMPTY @ DBGU_TXEMPTY = 1 when transmission complete
35 beq 1001b 35 beq 1001b
36 .endm 36 .endm
37 37
diff --git a/arch/arm/mach-at91/include/mach/hardware.h b/arch/arm/mach-at91/include/mach/hardware.h
index 1008b9fb5074..483478d8be6b 100644
--- a/arch/arm/mach-at91/include/mach/hardware.h
+++ b/arch/arm/mach-at91/include/mach/hardware.h
@@ -36,6 +36,20 @@
36#error "Unsupported AT91 processor" 36#error "Unsupported AT91 processor"
37#endif 37#endif
38 38
39#if !defined(CONFIG_ARCH_AT91X40)
40/*
41 * On all at91 except rm9200 and x40 have the System Controller starts
42 * at address 0xffffc000 and has a size of 16KiB.
43 *
44 * On rm9200 it's start at 0xfffe4000 of 111KiB with non reserved data starting
45 * at 0xfffff000
46 *
47 * Removes the individual definitions of AT91_BASE_SYS and
48 * replaces them with a common version at base 0xfffffc000 and size 16KiB
49 * and map the same memory space
50 */
51#define AT91_BASE_SYS 0xffffc000
52#endif
39 53
40/* 54/*
41 * Peripheral identifiers/interrupts. 55 * Peripheral identifiers/interrupts.
diff --git a/arch/arm/mach-at91/include/mach/io.h b/arch/arm/mach-at91/include/mach/io.h
index 0b0cccc46e68..4298e7806c76 100644
--- a/arch/arm/mach-at91/include/mach/io.h
+++ b/arch/arm/mach-at91/include/mach/io.h
@@ -21,14 +21,23 @@
21#ifndef __ASM_ARCH_IO_H 21#ifndef __ASM_ARCH_IO_H
22#define __ASM_ARCH_IO_H 22#define __ASM_ARCH_IO_H
23 23
24#include <mach/hardware.h>
25
24#define IO_SPACE_LIMIT 0xFFFFFFFF 26#define IO_SPACE_LIMIT 0xFFFFFFFF
25 27
26#define __io(a) __typesafe_io(a) 28#define __io(a) __typesafe_io(a)
27#define __mem_pci(a) (a) 29#define __mem_pci(a) (a)
28 30
29
30#ifndef __ASSEMBLY__ 31#ifndef __ASSEMBLY__
31 32
33#ifndef CONFIG_ARCH_AT91X40
34#define __arch_ioremap at91_ioremap
35#define __arch_iounmap at91_iounmap
36#endif
37
38void __iomem *at91_ioremap(unsigned long phys, size_t size, unsigned int type);
39void at91_iounmap(volatile void __iomem *addr);
40
32static inline unsigned int at91_sys_read(unsigned int reg_offset) 41static inline unsigned int at91_sys_read(unsigned int reg_offset)
33{ 42{
34 void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS; 43 void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS;
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index ea53f4d9b283..4159eca78945 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -20,7 +20,7 @@
20#include <linux/io.h> 20#include <linux/io.h>
21 21
22#include <asm/irq.h> 22#include <asm/irq.h>
23#include <asm/atomic.h> 23#include <linux/atomic.h>
24#include <asm/mach/time.h> 24#include <asm/mach/time.h>
25#include <asm/mach/irq.h> 25#include <asm/mach/irq.h>
26 26
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
new file mode 100644
index 000000000000..aa64294c7db3
--- /dev/null
+++ b/arch/arm/mach-at91/setup.c
@@ -0,0 +1,297 @@
1/*
2 * Copyright (C) 2007 Atmel Corporation.
3 * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
4 *
5 * Under GPLv2
6 */
7
8#include <linux/module.h>
9#include <linux/io.h>
10#include <linux/mm.h>
11
12#include <asm/mach/map.h>
13
14#include <mach/hardware.h>
15#include <mach/cpu.h>
16#include <mach/at91_dbgu.h>
17#include <mach/at91_pmc.h>
18
19#include "soc.h"
20#include "generic.h"
21
22struct at91_init_soc __initdata at91_boot_soc;
23
24struct at91_socinfo at91_soc_initdata;
25EXPORT_SYMBOL(at91_soc_initdata);
26
27void __init at91rm9200_set_type(int type)
28{
29 if (type == ARCH_REVISON_9200_PQFP)
30 at91_soc_initdata.subtype = AT91_SOC_RM9200_BGA;
31 else
32 at91_soc_initdata.subtype = AT91_SOC_RM9200_PQFP;
33}
34
35void __init at91_init_irq_default(void)
36{
37 at91_init_interrupts(at91_boot_soc.default_irq_priority);
38}
39
40void __init at91_init_interrupts(unsigned int *priority)
41{
42 /* Initialize the AIC interrupt controller */
43 at91_aic_init(priority);
44
45 /* Enable GPIO interrupts */
46 at91_gpio_irq_setup();
47}
48
49static struct map_desc sram_desc[2] __initdata;
50
51void __init at91_init_sram(int bank, unsigned long base, unsigned int length)
52{
53 struct map_desc *desc = &sram_desc[bank];
54
55 desc->virtual = AT91_IO_VIRT_BASE - length;
56 if (bank > 0)
57 desc->virtual -= sram_desc[bank - 1].length;
58
59 desc->pfn = __phys_to_pfn(base);
60 desc->length = length;
61 desc->type = MT_DEVICE;
62
63 pr_info("AT91: sram at 0x%lx of 0x%x mapped at 0x%lx\n",
64 base, length, desc->virtual);
65
66 iotable_init(desc, 1);
67}
68
69static struct map_desc at91_io_desc __initdata = {
70 .virtual = AT91_VA_BASE_SYS,
71 .pfn = __phys_to_pfn(AT91_BASE_SYS),
72 .length = SZ_16K,
73 .type = MT_DEVICE,
74};
75
76void __iomem *at91_ioremap(unsigned long p, size_t size, unsigned int type)
77{
78 if (p >= AT91_BASE_SYS && p <= (AT91_BASE_SYS + SZ_16K - 1))
79 return (void __iomem *)AT91_IO_P2V(p);
80
81 return __arm_ioremap_caller(p, size, type, __builtin_return_address(0));
82}
83EXPORT_SYMBOL(at91_ioremap);
84
85void at91_iounmap(volatile void __iomem *addr)
86{
87 unsigned long virt = (unsigned long)addr;
88
89 if (virt >= VMALLOC_START && virt < VMALLOC_END)
90 __iounmap(addr);
91}
92EXPORT_SYMBOL(at91_iounmap);
93
94#define AT91_DBGU0 0xfffff200
95#define AT91_DBGU1 0xffffee00
96
97static void __init soc_detect(u32 dbgu_base)
98{
99 u32 cidr, socid;
100
101 cidr = __raw_readl(AT91_IO_P2V(dbgu_base) + AT91_DBGU_CIDR);
102 socid = cidr & ~AT91_CIDR_VERSION;
103
104 switch (socid) {
105 case ARCH_ID_AT91CAP9: {
106#ifdef CONFIG_AT91_PMC_UNIT
107 u32 pmc_ver = at91_sys_read(AT91_PMC_VER);
108
109 if (pmc_ver == ARCH_REVISION_CAP9_B)
110 at91_soc_initdata.subtype = AT91_SOC_CAP9_REV_B;
111 else if (pmc_ver == ARCH_REVISION_CAP9_C)
112 at91_soc_initdata.subtype = AT91_SOC_CAP9_REV_C;
113#endif
114 at91_soc_initdata.type = AT91_SOC_CAP9;
115 at91_boot_soc = at91cap9_soc;
116 break;
117 }
118
119 case ARCH_ID_AT91RM9200:
120 at91_soc_initdata.type = AT91_SOC_RM9200;
121 at91_boot_soc = at91rm9200_soc;
122 break;
123
124 case ARCH_ID_AT91SAM9260:
125 at91_soc_initdata.type = AT91_SOC_SAM9260;
126 at91_boot_soc = at91sam9260_soc;
127 break;
128
129 case ARCH_ID_AT91SAM9261:
130 at91_soc_initdata.type = AT91_SOC_SAM9261;
131 at91_boot_soc = at91sam9261_soc;
132 break;
133
134 case ARCH_ID_AT91SAM9263:
135 at91_soc_initdata.type = AT91_SOC_SAM9263;
136 at91_boot_soc = at91sam9263_soc;
137 break;
138
139 case ARCH_ID_AT91SAM9G20:
140 at91_soc_initdata.type = AT91_SOC_SAM9G20;
141 at91_boot_soc = at91sam9260_soc;
142 break;
143
144 case ARCH_ID_AT91SAM9G45:
145 at91_soc_initdata.type = AT91_SOC_SAM9G45;
146 if (cidr == ARCH_ID_AT91SAM9G45ES)
147 at91_soc_initdata.subtype = AT91_SOC_SAM9G45ES;
148 at91_boot_soc = at91sam9g45_soc;
149 break;
150
151 case ARCH_ID_AT91SAM9RL64:
152 at91_soc_initdata.type = AT91_SOC_SAM9RL;
153 at91_boot_soc = at91sam9rl_soc;
154 break;
155
156 case ARCH_ID_AT91SAM9X5:
157 at91_soc_initdata.type = AT91_SOC_SAM9X5;
158 at91_boot_soc = at91sam9x5_soc;
159 break;
160 }
161
162 /* at91sam9g10 */
163 if ((cidr & ~AT91_CIDR_EXT) == ARCH_ID_AT91SAM9G10) {
164 at91_soc_initdata.type = AT91_SOC_SAM9G10;
165 at91_boot_soc = at91sam9261_soc;
166 }
167 /* at91sam9xe */
168 else if ((cidr & AT91_CIDR_ARCH) == ARCH_FAMILY_AT91SAM9XE) {
169 at91_soc_initdata.type = AT91_SOC_SAM9260;
170 at91_soc_initdata.subtype = AT91_SOC_SAM9XE;
171 at91_boot_soc = at91sam9260_soc;
172 }
173
174 if (!at91_soc_is_detected())
175 return;
176
177 at91_soc_initdata.cidr = cidr;
178
179 /* sub version of soc */
180 at91_soc_initdata.exid = __raw_readl(AT91_IO_P2V(dbgu_base) + AT91_DBGU_EXID);
181
182 if (at91_soc_initdata.type == AT91_SOC_SAM9G45) {
183 switch (at91_soc_initdata.exid) {
184 case ARCH_EXID_AT91SAM9M10:
185 at91_soc_initdata.subtype = AT91_SOC_SAM9M10;
186 break;
187 case ARCH_EXID_AT91SAM9G46:
188 at91_soc_initdata.subtype = AT91_SOC_SAM9G46;
189 break;
190 case ARCH_EXID_AT91SAM9M11:
191 at91_soc_initdata.subtype = AT91_SOC_SAM9M11;
192 break;
193 }
194 }
195
196 if (at91_soc_initdata.type == AT91_SOC_SAM9X5) {
197 switch (at91_soc_initdata.exid) {
198 case ARCH_EXID_AT91SAM9G15:
199 at91_soc_initdata.subtype = AT91_SOC_SAM9G15;
200 break;
201 case ARCH_EXID_AT91SAM9G35:
202 at91_soc_initdata.subtype = AT91_SOC_SAM9G35;
203 break;
204 case ARCH_EXID_AT91SAM9X35:
205 at91_soc_initdata.subtype = AT91_SOC_SAM9X35;
206 break;
207 case ARCH_EXID_AT91SAM9G25:
208 at91_soc_initdata.subtype = AT91_SOC_SAM9G25;
209 break;
210 case ARCH_EXID_AT91SAM9X25:
211 at91_soc_initdata.subtype = AT91_SOC_SAM9X25;
212 break;
213 }
214 }
215}
216
217static const char *soc_name[] = {
218 [AT91_SOC_RM9200] = "at91rm9200",
219 [AT91_SOC_CAP9] = "at91cap9",
220 [AT91_SOC_SAM9260] = "at91sam9260",
221 [AT91_SOC_SAM9261] = "at91sam9261",
222 [AT91_SOC_SAM9263] = "at91sam9263",
223 [AT91_SOC_SAM9G10] = "at91sam9g10",
224 [AT91_SOC_SAM9G20] = "at91sam9g20",
225 [AT91_SOC_SAM9G45] = "at91sam9g45",
226 [AT91_SOC_SAM9RL] = "at91sam9rl",
227 [AT91_SOC_SAM9X5] = "at91sam9x5",
228 [AT91_SOC_NONE] = "Unknown"
229};
230
231const char *at91_get_soc_type(struct at91_socinfo *c)
232{
233 return soc_name[c->type];
234}
235EXPORT_SYMBOL(at91_get_soc_type);
236
237static const char *soc_subtype_name[] = {
238 [AT91_SOC_RM9200_BGA] = "at91rm9200 BGA",
239 [AT91_SOC_RM9200_PQFP] = "at91rm9200 PQFP",
240 [AT91_SOC_CAP9_REV_B] = "at91cap9 revB",
241 [AT91_SOC_CAP9_REV_C] = "at91cap9 revC",
242 [AT91_SOC_SAM9XE] = "at91sam9xe",
243 [AT91_SOC_SAM9G45ES] = "at91sam9g45es",
244 [AT91_SOC_SAM9M10] = "at91sam9m10",
245 [AT91_SOC_SAM9G46] = "at91sam9g46",
246 [AT91_SOC_SAM9M11] = "at91sam9m11",
247 [AT91_SOC_SAM9G15] = "at91sam9g15",
248 [AT91_SOC_SAM9G35] = "at91sam9g35",
249 [AT91_SOC_SAM9X35] = "at91sam9x35",
250 [AT91_SOC_SAM9G25] = "at91sam9g25",
251 [AT91_SOC_SAM9X25] = "at91sam9x25",
252 [AT91_SOC_SUBTYPE_NONE] = "Unknown"
253};
254
255const char *at91_get_soc_subtype(struct at91_socinfo *c)
256{
257 return soc_subtype_name[c->subtype];
258}
259EXPORT_SYMBOL(at91_get_soc_subtype);
260
261void __init at91_map_io(void)
262{
263 /* Map peripherals */
264 iotable_init(&at91_io_desc, 1);
265
266 at91_soc_initdata.type = AT91_SOC_NONE;
267 at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
268
269 soc_detect(AT91_DBGU0);
270 if (!at91_soc_is_detected())
271 soc_detect(AT91_DBGU1);
272
273 if (!at91_soc_is_detected())
274 panic("AT91: Impossible to detect the SOC type");
275
276 pr_info("AT91: Detected soc type: %s\n",
277 at91_get_soc_type(&at91_soc_initdata));
278 pr_info("AT91: Detected soc subtype: %s\n",
279 at91_get_soc_subtype(&at91_soc_initdata));
280
281 if (!at91_soc_is_enabled())
282 panic("AT91: Soc not enabled");
283
284 if (at91_boot_soc.map_io)
285 at91_boot_soc.map_io();
286}
287
288void __init at91_initialize(unsigned long main_clock)
289{
290 /* Init clock subsystem */
291 at91_clock_init(main_clock);
292
293 /* Register the processor-specific clocks */
294 at91_boot_soc.register_clocks();
295
296 at91_boot_soc.init();
297}
diff --git a/arch/arm/mach-at91/soc.h b/arch/arm/mach-at91/soc.h
new file mode 100644
index 000000000000..21ed8816e6f7
--- /dev/null
+++ b/arch/arm/mach-at91/soc.h
@@ -0,0 +1,59 @@
1/*
2 * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
3 *
4 * Under GPLv2
5 */
6
7struct at91_init_soc {
8 unsigned int *default_irq_priority;
9 void (*map_io)(void);
10 void (*register_clocks)(void);
11 void (*init)(void);
12};
13
14extern struct at91_init_soc at91_boot_soc;
15extern struct at91_init_soc at91cap9_soc;
16extern struct at91_init_soc at91rm9200_soc;
17extern struct at91_init_soc at91sam9260_soc;
18extern struct at91_init_soc at91sam9261_soc;
19extern struct at91_init_soc at91sam9263_soc;
20extern struct at91_init_soc at91sam9g45_soc;
21extern struct at91_init_soc at91sam9rl_soc;
22extern struct at91_init_soc at91sam9x5_soc;
23
24static inline int at91_soc_is_enabled(void)
25{
26 return at91_boot_soc.init != NULL;
27}
28
29#if !defined(CONFIG_ARCH_AT91CAP9)
30#define at91cap9_soc at91_boot_soc
31#endif
32
33#if !defined(CONFIG_ARCH_AT91RM9200)
34#define at91rm9200_soc at91_boot_soc
35#endif
36
37#if !(defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9G20))
38#define at91sam9260_soc at91_boot_soc
39#endif
40
41#if !(defined(CONFIG_ARCH_AT91SAM9261) || defined(CONFIG_ARCH_AT91SAM9G10))
42#define at91sam9261_soc at91_boot_soc
43#endif
44
45#if !defined(CONFIG_ARCH_AT91SAM9263)
46#define at91sam9263_soc at91_boot_soc
47#endif
48
49#if !defined(CONFIG_ARCH_AT91SAM9G45)
50#define at91sam9g45_soc at91_boot_soc
51#endif
52
53#if !defined(CONFIG_ARCH_AT91SAM9RL)
54#define at91sam9rl_soc at91_boot_soc
55#endif
56
57#if !defined(CONFIG_ARCH_AT91SAM9X5)
58#define at91sam9x5_soc at91_boot_soc
59#endif
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-12 02:18:16 -0500