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-rw-r--r--arch/arm/mach-at91/setup.c54
1 files changed, 0 insertions, 54 deletions
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
index 6c3013e3309b..ce25e85720fb 100644
--- a/arch/arm/mach-at91/setup.c
+++ b/arch/arm/mach-at91/setup.c
@@ -42,31 +42,9 @@ void __init at91rm9200_set_type(int type)
42 at91_get_soc_subtype(&at91_soc_initdata)); 42 at91_get_soc_subtype(&at91_soc_initdata));
43} 43}
44 44
45void __init at91_init_irq_default(void)
46{
47 at91_init_interrupts(at91_boot_soc.default_irq_priority);
48}
49
50void __init at91_init_interrupts(unsigned int *priority)
51{
52 /* Enable GPIO interrupts */
53 at91_gpio_irq_setup();
54}
55
56void __iomem *at91_ramc_base[2]; 45void __iomem *at91_ramc_base[2];
57EXPORT_SYMBOL_GPL(at91_ramc_base); 46EXPORT_SYMBOL_GPL(at91_ramc_base);
58 47
59void __init at91_ioremap_ramc(int id, u32 addr, u32 size)
60{
61 if (id < 0 || id > 1) {
62 pr_emerg("Wrong RAM controller id (%d), cannot continue\n", id);
63 BUG();
64 }
65 at91_ramc_base[id] = ioremap(addr, size);
66 if (!at91_ramc_base[id])
67 panic(pr_fmt("Impossible to ioremap ramc.%d 0x%x\n"), id, addr);
68}
69
70static struct map_desc sram_desc[2] __initdata; 48static struct map_desc sram_desc[2] __initdata;
71 49
72void __init at91_init_sram(int bank, unsigned long base, unsigned int length) 50void __init at91_init_sram(int bank, unsigned long base, unsigned int length)
@@ -414,7 +392,6 @@ void __init at91_ioremap_matrix(u32 base_addr)
414 panic(pr_fmt("Impossible to ioremap at91_matrix_base\n")); 392 panic(pr_fmt("Impossible to ioremap at91_matrix_base\n"));
415} 393}
416 394
417#if defined(CONFIG_OF)
418static struct of_device_id ramc_ids[] = { 395static struct of_device_id ramc_ids[] = {
419 { .compatible = "atmel,at91rm9200-sdramc", .data = at91rm9200_standby }, 396 { .compatible = "atmel,at91rm9200-sdramc", .data = at91rm9200_standby },
420 { .compatible = "atmel,at91sam9260-sdramc", .data = at91sam9_sdram_standby }, 397 { .compatible = "atmel,at91sam9260-sdramc", .data = at91sam9_sdram_standby },
@@ -456,10 +433,6 @@ void __init at91rm9200_dt_initialize(void)
456{ 433{
457 at91_dt_ramc(); 434 at91_dt_ramc();
458 435
459 /* Register the processor-specific clocks */
460 if (at91_boot_soc.register_clocks)
461 at91_boot_soc.register_clocks();
462
463 at91_boot_soc.init(); 436 at91_boot_soc.init();
464} 437}
465 438
@@ -467,33 +440,6 @@ void __init at91_dt_initialize(void)
467{ 440{
468 at91_dt_ramc(); 441 at91_dt_ramc();
469 442
470 /* Register the processor-specific clocks */
471 if (at91_boot_soc.register_clocks)
472 at91_boot_soc.register_clocks();
473
474 if (at91_boot_soc.init) 443 if (at91_boot_soc.init)
475 at91_boot_soc.init(); 444 at91_boot_soc.init();
476} 445}
477#endif
478
479void __init at91_initialize(unsigned long main_clock)
480{
481 at91_boot_soc.ioremap_registers();
482
483 /* Register the processor-specific clocks */
484 at91_boot_soc.register_clocks();
485
486 at91_boot_soc.init();
487
488 pinctrl_provide_dummies();
489}
490
491void __init at91_register_devices(void)
492{
493 at91_boot_soc.register_devices();
494}
495
496void __init at91_init_time(void)
497{
498 at91_boot_soc.init_time();
499}