11 files changed, 26 insertions, 12 deletions

diff --git a/arch/arm/mach-at91/include/mach/at91_dbgu.h b/arch/arm/mach-at91/include/mach/at91_dbgu.h
index dbfe455a4c41..2aa0c5e13495 100644
--- a/arch/arm/mach-at91/include/mach/at91_dbgu.h
+++ b/arch/arm/mach-at91/include/mach/at91_dbgu.h
@@ -19,7 +19,7 @@
 #define dbgu_readl(dbgu, field) \
         __raw_readl(AT91_VA_BASE_SYS + dbgu + AT91_DBGU_ ## field)
 
-#ifdef AT91_DBGU
+#if !defined(CONFIG_ARCH_AT91X40)
 #define AT91_DBGU_CR            (0x00)  /* Control Register */
 #define AT91_DBGU_MR            (0x04)  /* Mode Register */
 #define AT91_DBGU_IER           (0x08)  /* Interrupt Enable Register */
diff --git a/arch/arm/mach-at91/include/mach/at91cap9.h b/arch/arm/mach-at91/include/mach/at91cap9.h
index 750ba85614ca..bca2b54de73e 100644
--- a/arch/arm/mach-at91/include/mach/at91cap9.h
+++ b/arch/arm/mach-at91/include/mach/at91cap9.h
@@ -82,7 +82,6 @@
 #define AT91_BCRAMC     (0xffffe400 - AT91_BASE_SYS)
 #define AT91_DDRSDRC0   (0xffffe600 - AT91_BASE_SYS)
 #define AT91_MATRIX     (0xffffea00 - AT91_BASE_SYS)
-#define AT91_DBGU       (0xffffee00 - AT91_BASE_SYS)
 #define AT91_AIC        (0xfffff000 - AT91_BASE_SYS)
 #define AT91_PMC        (0xfffffc00 - AT91_BASE_SYS)
 #define AT91_RSTC       (0xfffffd00 - AT91_BASE_SYS)
@@ -93,6 +92,7 @@
 #define AT91CAP9_BASE_ECC       0xffffe200
 #define AT91CAP9_BASE_DMA       0xffffec00
 #define AT91CAP9_BASE_SMC       0xffffe800
+#define AT91CAP9_BASE_DBGU      AT91_BASE_DBGU1
 #define AT91CAP9_BASE_PIOA      0xfffff200
 #define AT91CAP9_BASE_PIOB      0xfffff400
 #define AT91CAP9_BASE_PIOC      0xfffff600
diff --git a/arch/arm/mach-at91/include/mach/at91rm9200.h b/arch/arm/mach-at91/include/mach/at91rm9200.h
index 57409549585f..1f767e28ea50 100644
--- a/arch/arm/mach-at91/include/mach/at91rm9200.h
+++ b/arch/arm/mach-at91/include/mach/at91rm9200.h
@@ -80,12 +80,12 @@
  * System Peripherals (offset from AT91_BASE_SYS)
  */
 #define AT91_AIC        (0xfffff000 - AT91_BASE_SYS)    /* Advanced Interrupt Controller */
-#define AT91_DBGU       (0xfffff200 - AT91_BASE_SYS)    /* Debug Unit */
 #define AT91_PMC        (0xfffffc00 - AT91_BASE_SYS)    /* Power Management Controller */
 #define AT91_ST         (0xfffffd00 - AT91_BASE_SYS)    /* System Timer */
 #define AT91_RTC        (0xfffffe00 - AT91_BASE_SYS)    /* Real-Time Clock */
 #define AT91_MC         (0xffffff00 - AT91_BASE_SYS)    /* Memory Controllers */
 
+#define AT91RM9200_BASE_DBGU    AT91_BASE_DBGU0 /* Debug Unit */
 #define AT91RM9200_BASE_PIOA    0xfffff400      /* PIO Controller A */
 #define AT91RM9200_BASE_PIOB    0xfffff600      /* PIO Controller B */
 #define AT91RM9200_BASE_PIOC    0xfffff800      /* PIO Controller C */
diff --git a/arch/arm/mach-at91/include/mach/at91sam9260.h b/arch/arm/mach-at91/include/mach/at91sam9260.h
index 05860c5eb548..e360d6665437 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9260.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9260.h
@@ -83,13 +83,13 @@
 #define AT91_SDRAMC0    (0xffffea00 - AT91_BASE_SYS)
 #define AT91_MATRIX     (0xffffee00 - AT91_BASE_SYS)
 #define AT91_AIC        (0xfffff000 - AT91_BASE_SYS)
-#define AT91_DBGU       (0xfffff200 - AT91_BASE_SYS)
 #define AT91_PMC        (0xfffffc00 - AT91_BASE_SYS)
 #define AT91_RSTC       (0xfffffd00 - AT91_BASE_SYS)
 #define AT91_GPBR       (0xfffffd50 - AT91_BASE_SYS)
 
 #define AT91SAM9260_BASE_ECC    0xffffe800
 #define AT91SAM9260_BASE_SMC    0xffffec00
+#define AT91SAM9260_BASE_DBGU   AT91_BASE_DBGU0
 #define AT91SAM9260_BASE_PIOA   0xfffff400
 #define AT91SAM9260_BASE_PIOB   0xfffff600
 #define AT91SAM9260_BASE_PIOC   0xfffff800
diff --git a/arch/arm/mach-at91/include/mach/at91sam9261.h b/arch/arm/mach-at91/include/mach/at91sam9261.h
index df2ddfd2d22e..2ccc8a53985b 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9261.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9261.h
@@ -68,12 +68,12 @@
 #define AT91_SDRAMC0    (0xffffea00 - AT91_BASE_SYS)
 #define AT91_MATRIX     (0xffffee00 - AT91_BASE_SYS)
 #define AT91_AIC        (0xfffff000 - AT91_BASE_SYS)
-#define AT91_DBGU       (0xfffff200 - AT91_BASE_SYS)
 #define AT91_PMC        (0xfffffc00 - AT91_BASE_SYS)
 #define AT91_RSTC       (0xfffffd00 - AT91_BASE_SYS)
 #define AT91_GPBR       (0xfffffd50 - AT91_BASE_SYS)
 
 #define AT91SAM9261_BASE_SMC    0xffffec00
+#define AT91SAM9261_BASE_DBGU   AT91_BASE_DBGU0
 #define AT91SAM9261_BASE_PIOA   0xfffff400
 #define AT91SAM9261_BASE_PIOB   0xfffff600
 #define AT91SAM9261_BASE_PIOC   0xfffff800
diff --git a/arch/arm/mach-at91/include/mach/at91sam9263.h b/arch/arm/mach-at91/include/mach/at91sam9263.h
index 0eb614eb2fa6..aee137ba5bcf 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9263.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9263.h
@@ -77,7 +77,6 @@
 #define AT91_SDRAMC0    (0xffffe200 - AT91_BASE_SYS)
 #define AT91_SDRAMC1    (0xffffe800 - AT91_BASE_SYS)
 #define AT91_MATRIX     (0xffffec00 - AT91_BASE_SYS)
-#define AT91_DBGU       (0xffffee00 - AT91_BASE_SYS)
 #define AT91_AIC        (0xfffff000 - AT91_BASE_SYS)
 #define AT91_PMC        (0xfffffc00 - AT91_BASE_SYS)
 #define AT91_RSTC       (0xfffffd00 - AT91_BASE_SYS)
@@ -87,6 +86,7 @@
 #define AT91SAM9263_BASE_SMC0   0xffffe400
 #define AT91SAM9263_BASE_ECC1   0xffffe600
 #define AT91SAM9263_BASE_SMC1   0xffffea00
+#define AT91SAM9263_BASE_DBGU   AT91_BASE_DBGU1
 #define AT91SAM9263_BASE_PIOA   0xfffff200
 #define AT91SAM9263_BASE_PIOB   0xfffff400
 #define AT91SAM9263_BASE_PIOC   0xfffff600
diff --git a/arch/arm/mach-at91/include/mach/at91sam9g45.h b/arch/arm/mach-at91/include/mach/at91sam9g45.h
index 65098c323101..211721b790a7 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9g45.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9g45.h
@@ -89,7 +89,6 @@
 #define AT91_DDRSDRC1   (0xffffe400 - AT91_BASE_SYS)
 #define AT91_DDRSDRC0   (0xffffe600 - AT91_BASE_SYS)
 #define AT91_MATRIX     (0xffffea00 - AT91_BASE_SYS)
-#define AT91_DBGU       (0xffffee00 - AT91_BASE_SYS)
 #define AT91_AIC        (0xfffff000 - AT91_BASE_SYS)
 #define AT91_PMC        (0xfffffc00 - AT91_BASE_SYS)
 #define AT91_RSTC       (0xfffffd00 - AT91_BASE_SYS)
@@ -99,6 +98,7 @@
 #define AT91SAM9G45_BASE_ECC    0xffffe200
 #define AT91SAM9G45_BASE_DMA    0xffffec00
 #define AT91SAM9G45_BASE_SMC    0xffffe800
+#define AT91SAM9G45_BASE_DBGU   AT91_BASE_DBGU1
 #define AT91SAM9G45_BASE_PIOA   0xfffff200
 #define AT91SAM9G45_BASE_PIOB   0xfffff400
 #define AT91SAM9G45_BASE_PIOC   0xfffff600
diff --git a/arch/arm/mach-at91/include/mach/at91sam9rl.h b/arch/arm/mach-at91/include/mach/at91sam9rl.h
index 46e136d3ef3f..4f7367a53f04 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9rl.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9rl.h
@@ -72,7 +72,6 @@
 #define AT91_SDRAMC0    (0xffffea00 - AT91_BASE_SYS)
 #define AT91_MATRIX     (0xffffee00 - AT91_BASE_SYS)
 #define AT91_AIC        (0xfffff000 - AT91_BASE_SYS)
-#define AT91_DBGU       (0xfffff200 - AT91_BASE_SYS)
 #define AT91_PMC        (0xfffffc00 - AT91_BASE_SYS)
 #define AT91_RSTC       (0xfffffd00 - AT91_BASE_SYS)
 #define AT91_SCKCR      (0xfffffd50 - AT91_BASE_SYS)
@@ -82,6 +81,7 @@
 #define AT91SAM9RL_BASE_DMA     0xffffe600
 #define AT91SAM9RL_BASE_ECC     0xffffe800
 #define AT91SAM9RL_BASE_SMC     0xffffec00
+#define AT91SAM9RL_BASE_DBGU    AT91_BASE_DBGU0
 #define AT91SAM9RL_BASE_PIOA    0xfffff400
 #define AT91SAM9RL_BASE_PIOB    0xfffff600
 #define AT91SAM9RL_BASE_PIOC    0xfffff800
diff --git a/arch/arm/mach-at91/include/mach/debug-macro.S b/arch/arm/mach-at91/include/mach/debug-macro.S
index 0ed8648c6452..c6bb9e2d9baa 100644
--- a/arch/arm/mach-at91/include/mach/debug-macro.S
+++ b/arch/arm/mach-at91/include/mach/debug-macro.S
@@ -14,9 +14,15 @@
 #include <mach/hardware.h>
 #include <mach/at91_dbgu.h>
 
+#if defined(CONFIG_AT91_DEBUG_LL_DBGU0)
+#define AT91_DBGU AT91_BASE_DBGU0
+#else
+#define AT91_DBGU AT91_BASE_DBGU1
+#endif
+
         .macro  addruart, rp, rv, tmp
-        ldr     \rp, =(AT91_BASE_SYS + AT91_DBGU)       @ System peripherals (phys address)
-        ldr     \rv, =(AT91_VA_BASE_SYS + AT91_DBGU)    @ System peripherals (virt address)
+        ldr     \rp, =AT91_DBGU                         @ System peripherals (phys address)
+        ldr     \rv, =AT91_IO_P2V(AT91_DBGU)            @ System peripherals (virt address)
         .endm
 
         .macro  senduart,rd,rx
diff --git a/arch/arm/mach-at91/include/mach/hardware.h b/arch/arm/mach-at91/include/mach/hardware.h
index 483478d8be6b..435764ee8490 100644
--- a/arch/arm/mach-at91/include/mach/hardware.h
+++ b/arch/arm/mach-at91/include/mach/hardware.h
@@ -16,6 +16,12 @@
 
 #include <asm/sizes.h>
 
+/* DBGU base */
+/* rm9200, 9260/9g20, 9261/9g10, 9rl */
+#define AT91_BASE_DBGU0 0xfffff200
+/* 9263, 9g45, cap9 */
+#define AT91_BASE_DBGU1 0xffffee00
+
 #if defined(CONFIG_ARCH_AT91RM9200)
 #include <mach/at91rm9200.h>
 #elif defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9G20)
diff --git a/arch/arm/mach-at91/include/mach/uncompress.h b/arch/arm/mach-at91/include/mach/uncompress.h
index 18bdcdeb474f..0234fd9d20d6 100644
--- a/arch/arm/mach-at91/include/mach/uncompress.h
+++ b/arch/arm/mach-at91/include/mach/uncompress.h
@@ -24,8 +24,10 @@
 #include <linux/io.h>
 #include <linux/atmel_serial.h>
 
-#if defined(CONFIG_AT91_EARLY_DBGU)
-#define UART_OFFSET (AT91_DBGU + AT91_BASE_SYS)
+#if defined(CONFIG_AT91_EARLY_DBGU0)
+#define UART_OFFSET AT91_BASE_DBGU0
+#elif defined(CONFIG_AT91_EARLY_DBGU1)
+#define UART_OFFSET AT91_BASE_DBGU1
 #elif defined(CONFIG_AT91_EARLY_USART0)
 #define UART_OFFSET AT91_USART0
 #elif defined(CONFIG_AT91_EARLY_USART1)