diff options
Diffstat (limited to 'arch/arm/mach-at91/include/mach/at91_pmc.h')
-rw-r--r-- | arch/arm/mach-at91/include/mach/at91_pmc.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/mach-at91/include/mach/at91_pmc.h b/arch/arm/mach-at91/include/mach/at91_pmc.h index 2e3f2894b704..9561e33b8a9a 100644 --- a/arch/arm/mach-at91/include/mach/at91_pmc.h +++ b/arch/arm/mach-at91/include/mach/at91_pmc.h | |||
@@ -23,6 +23,7 @@ | |||
23 | #define AT91_PMC_PCK (1 << 0) /* Processor Clock */ | 23 | #define AT91_PMC_PCK (1 << 0) /* Processor Clock */ |
24 | #define AT91RM9200_PMC_UDP (1 << 1) /* USB Devcice Port Clock [AT91RM9200 only] */ | 24 | #define AT91RM9200_PMC_UDP (1 << 1) /* USB Devcice Port Clock [AT91RM9200 only] */ |
25 | #define AT91RM9200_PMC_MCKUDP (1 << 2) /* USB Device Port Master Clock Automatic Disable on Suspend [AT91RM9200 only] */ | 25 | #define AT91RM9200_PMC_MCKUDP (1 << 2) /* USB Device Port Master Clock Automatic Disable on Suspend [AT91RM9200 only] */ |
26 | #define AT91CAP9_PMC_DDR (1 << 2) /* DDR Clock [AT91CAP9 revC only] */ | ||
26 | #define AT91RM9200_PMC_UHP (1 << 4) /* USB Host Port Clock [AT91RM9200 only] */ | 27 | #define AT91RM9200_PMC_UHP (1 << 4) /* USB Host Port Clock [AT91RM9200 only] */ |
27 | #define AT91SAM926x_PMC_UHP (1 << 6) /* USB Host Port Clock [AT91SAM926x only] */ | 28 | #define AT91SAM926x_PMC_UHP (1 << 6) /* USB Host Port Clock [AT91SAM926x only] */ |
28 | #define AT91CAP9_PMC_UHP (1 << 6) /* USB Host Port Clock [AT91CAP9 only] */ | 29 | #define AT91CAP9_PMC_UHP (1 << 6) /* USB Host Port Clock [AT91CAP9 only] */ |
@@ -102,10 +103,16 @@ | |||
102 | #define AT91_PMC_LOCKB (1 << 2) /* PLLB Lock */ | 103 | #define AT91_PMC_LOCKB (1 << 2) /* PLLB Lock */ |
103 | #define AT91_PMC_MCKRDY (1 << 3) /* Master Clock */ | 104 | #define AT91_PMC_MCKRDY (1 << 3) /* Master Clock */ |
104 | #define AT91_PMC_LOCKU (1 << 6) /* UPLL Lock [AT91CAP9 only] */ | 105 | #define AT91_PMC_LOCKU (1 << 6) /* UPLL Lock [AT91CAP9 only] */ |
106 | #define AT91_PMC_OSCSEL (1 << 7) /* Slow Clock Oscillator [AT91CAP9 revC only] */ | ||
105 | #define AT91_PMC_PCK0RDY (1 << 8) /* Programmable Clock 0 */ | 107 | #define AT91_PMC_PCK0RDY (1 << 8) /* Programmable Clock 0 */ |
106 | #define AT91_PMC_PCK1RDY (1 << 9) /* Programmable Clock 1 */ | 108 | #define AT91_PMC_PCK1RDY (1 << 9) /* Programmable Clock 1 */ |
107 | #define AT91_PMC_PCK2RDY (1 << 10) /* Programmable Clock 2 */ | 109 | #define AT91_PMC_PCK2RDY (1 << 10) /* Programmable Clock 2 */ |
108 | #define AT91_PMC_PCK3RDY (1 << 11) /* Programmable Clock 3 */ | 110 | #define AT91_PMC_PCK3RDY (1 << 11) /* Programmable Clock 3 */ |
109 | #define AT91_PMC_IMR (AT91_PMC + 0x6c) /* Interrupt Mask Register */ | 111 | #define AT91_PMC_IMR (AT91_PMC + 0x6c) /* Interrupt Mask Register */ |
110 | 112 | ||
113 | #define AT91_PMC_PROT (AT91_PMC + 0xe4) /* Protect Register [AT91CAP9 revC only] */ | ||
114 | #define AT91_PMC_PROTKEY 0x504d4301 /* Activation Code */ | ||
115 | |||
116 | #define AT91_PMC_VER (AT91_PMC + 0xfc) /* PMC Module Version [AT91CAP9 only] */ | ||
117 | |||
111 | #endif | 118 | #endif |