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-rw-r--r--arch/arm/kernel/debug.S10
-rw-r--r--arch/arm/kernel/entry-armv.S42
-rw-r--r--arch/arm/kernel/entry-common.S13
-rw-r--r--arch/arm/kernel/entry-header.S14
-rw-r--r--arch/arm/kernel/fiqasm.S4
-rw-r--r--arch/arm/kernel/head-common.S7
-rw-r--r--arch/arm/kernel/head-nommu.S8
-rw-r--r--arch/arm/kernel/head.S18
-rw-r--r--arch/arm/kernel/hyp-stub.S6
-rw-r--r--arch/arm/kernel/iwmmxt.S16
-rw-r--r--arch/arm/kernel/perf_event.c5
-rw-r--r--arch/arm/kernel/perf_event_cpu.c55
-rw-r--r--arch/arm/kernel/relocate_kernel.S3
-rw-r--r--arch/arm/kernel/sleep.S2
-rw-r--r--arch/arm/kernel/smp_scu.c12
-rw-r--r--arch/arm/kernel/smp_tlb.c20
-rw-r--r--arch/arm/kernel/time.c5
-rw-r--r--arch/arm/kernel/traps.c6
-rw-r--r--arch/arm/kernel/unwind.c8
-rw-r--r--arch/arm/kernel/vmlinux.lds.S1
20 files changed, 124 insertions, 131 deletions
diff --git a/arch/arm/kernel/debug.S b/arch/arm/kernel/debug.S
index 14f7c3b14632..78c91b5f97d4 100644
--- a/arch/arm/kernel/debug.S
+++ b/arch/arm/kernel/debug.S
@@ -90,7 +90,7 @@ ENTRY(printascii)
90 ldrneb r1, [r0], #1 90 ldrneb r1, [r0], #1
91 teqne r1, #0 91 teqne r1, #0
92 bne 1b 92 bne 1b
93 mov pc, lr 93 ret lr
94ENDPROC(printascii) 94ENDPROC(printascii)
95 95
96ENTRY(printch) 96ENTRY(printch)
@@ -105,7 +105,7 @@ ENTRY(debug_ll_addr)
105 addruart r2, r3, ip 105 addruart r2, r3, ip
106 str r2, [r0] 106 str r2, [r0]
107 str r3, [r1] 107 str r3, [r1]
108 mov pc, lr 108 ret lr
109ENDPROC(debug_ll_addr) 109ENDPROC(debug_ll_addr)
110#endif 110#endif
111 111
@@ -116,7 +116,7 @@ ENTRY(printascii)
116 mov r0, #0x04 @ SYS_WRITE0 116 mov r0, #0x04 @ SYS_WRITE0
117 ARM( svc #0x123456 ) 117 ARM( svc #0x123456 )
118 THUMB( svc #0xab ) 118 THUMB( svc #0xab )
119 mov pc, lr 119 ret lr
120ENDPROC(printascii) 120ENDPROC(printascii)
121 121
122ENTRY(printch) 122ENTRY(printch)
@@ -125,14 +125,14 @@ ENTRY(printch)
125 mov r0, #0x03 @ SYS_WRITEC 125 mov r0, #0x03 @ SYS_WRITEC
126 ARM( svc #0x123456 ) 126 ARM( svc #0x123456 )
127 THUMB( svc #0xab ) 127 THUMB( svc #0xab )
128 mov pc, lr 128 ret lr
129ENDPROC(printch) 129ENDPROC(printch)
130 130
131ENTRY(debug_ll_addr) 131ENTRY(debug_ll_addr)
132 mov r2, #0 132 mov r2, #0
133 str r2, [r0] 133 str r2, [r0]
134 str r2, [r1] 134 str r2, [r1]
135 mov pc, lr 135 ret lr
136ENDPROC(debug_ll_addr) 136ENDPROC(debug_ll_addr)
137 137
138#endif 138#endif
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index 52a949a8077d..36276cdccfbc 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -224,7 +224,7 @@ svc_preempt:
2241: bl preempt_schedule_irq @ irq en/disable is done inside 2241: bl preempt_schedule_irq @ irq en/disable is done inside
225 ldr r0, [tsk, #TI_FLAGS] @ get new tasks TI_FLAGS 225 ldr r0, [tsk, #TI_FLAGS] @ get new tasks TI_FLAGS
226 tst r0, #_TIF_NEED_RESCHED 226 tst r0, #_TIF_NEED_RESCHED
227 moveq pc, r8 @ go again 227 reteq r8 @ go again
228 b 1b 228 b 1b
229#endif 229#endif
230 230
@@ -490,7 +490,7 @@ ENDPROC(__und_usr)
490 .pushsection .fixup, "ax" 490 .pushsection .fixup, "ax"
491 .align 2 491 .align 2
4924: str r4, [sp, #S_PC] @ retry current instruction 4924: str r4, [sp, #S_PC] @ retry current instruction
493 mov pc, r9 493 ret r9
494 .popsection 494 .popsection
495 .pushsection __ex_table,"a" 495 .pushsection __ex_table,"a"
496 .long 1b, 4b 496 .long 1b, 4b
@@ -552,7 +552,7 @@ call_fpe:
552#endif 552#endif
553 tst r0, #0x08000000 @ only CDP/CPRT/LDC/STC have bit 27 553 tst r0, #0x08000000 @ only CDP/CPRT/LDC/STC have bit 27
554 tstne r0, #0x04000000 @ bit 26 set on both ARM and Thumb-2 554 tstne r0, #0x04000000 @ bit 26 set on both ARM and Thumb-2
555 moveq pc, lr 555 reteq lr
556 and r8, r0, #0x00000f00 @ mask out CP number 556 and r8, r0, #0x00000f00 @ mask out CP number
557 THUMB( lsr r8, r8, #8 ) 557 THUMB( lsr r8, r8, #8 )
558 mov r7, #1 558 mov r7, #1
@@ -571,33 +571,33 @@ call_fpe:
571 THUMB( add pc, r8 ) 571 THUMB( add pc, r8 )
572 nop 572 nop
573 573
574 movw_pc lr @ CP#0 574 ret.w lr @ CP#0
575 W(b) do_fpe @ CP#1 (FPE) 575 W(b) do_fpe @ CP#1 (FPE)
576 W(b) do_fpe @ CP#2 (FPE) 576 W(b) do_fpe @ CP#2 (FPE)
577 movw_pc lr @ CP#3 577 ret.w lr @ CP#3
578#ifdef CONFIG_CRUNCH 578#ifdef CONFIG_CRUNCH
579 b crunch_task_enable @ CP#4 (MaverickCrunch) 579 b crunch_task_enable @ CP#4 (MaverickCrunch)
580 b crunch_task_enable @ CP#5 (MaverickCrunch) 580 b crunch_task_enable @ CP#5 (MaverickCrunch)
581 b crunch_task_enable @ CP#6 (MaverickCrunch) 581 b crunch_task_enable @ CP#6 (MaverickCrunch)
582#else 582#else
583 movw_pc lr @ CP#4 583 ret.w lr @ CP#4
584 movw_pc lr @ CP#5 584 ret.w lr @ CP#5
585 movw_pc lr @ CP#6 585 ret.w lr @ CP#6
586#endif 586#endif
587 movw_pc lr @ CP#7 587 ret.w lr @ CP#7
588 movw_pc lr @ CP#8 588 ret.w lr @ CP#8
589 movw_pc lr @ CP#9 589 ret.w lr @ CP#9
590#ifdef CONFIG_VFP 590#ifdef CONFIG_VFP
591 W(b) do_vfp @ CP#10 (VFP) 591 W(b) do_vfp @ CP#10 (VFP)
592 W(b) do_vfp @ CP#11 (VFP) 592 W(b) do_vfp @ CP#11 (VFP)
593#else 593#else
594 movw_pc lr @ CP#10 (VFP) 594 ret.w lr @ CP#10 (VFP)
595 movw_pc lr @ CP#11 (VFP) 595 ret.w lr @ CP#11 (VFP)
596#endif 596#endif
597 movw_pc lr @ CP#12 597 ret.w lr @ CP#12
598 movw_pc lr @ CP#13 598 ret.w lr @ CP#13
599 movw_pc lr @ CP#14 (Debug) 599 ret.w lr @ CP#14 (Debug)
600 movw_pc lr @ CP#15 (Control) 600 ret.w lr @ CP#15 (Control)
601 601
602#ifdef NEED_CPU_ARCHITECTURE 602#ifdef NEED_CPU_ARCHITECTURE
603 .align 2 603 .align 2
@@ -649,7 +649,7 @@ ENTRY(fp_enter)
649 .popsection 649 .popsection
650 650
651ENTRY(no_fp) 651ENTRY(no_fp)
652 mov pc, lr 652 ret lr
653ENDPROC(no_fp) 653ENDPROC(no_fp)
654 654
655__und_usr_fault_32: 655__und_usr_fault_32:
@@ -745,7 +745,7 @@ ENDPROC(__switch_to)
745#ifdef CONFIG_ARM_THUMB 745#ifdef CONFIG_ARM_THUMB
746 bx \reg 746 bx \reg
747#else 747#else
748 mov pc, \reg 748 ret \reg
749#endif 749#endif
750 .endm 750 .endm
751 751
@@ -837,7 +837,7 @@ kuser_cmpxchg64_fixup:
837#if __LINUX_ARM_ARCH__ < 6 837#if __LINUX_ARM_ARCH__ < 6
838 bcc kuser_cmpxchg32_fixup 838 bcc kuser_cmpxchg32_fixup
839#endif 839#endif
840 mov pc, lr 840 ret lr
841 .previous 841 .previous
842 842
843#else 843#else
@@ -905,7 +905,7 @@ kuser_cmpxchg32_fixup:
905 subs r8, r4, r7 905 subs r8, r4, r7
906 rsbcss r8, r8, #(2b - 1b) 906 rsbcss r8, r8, #(2b - 1b)
907 strcs r7, [sp, #S_PC] 907 strcs r7, [sp, #S_PC]
908 mov pc, lr 908 ret lr
909 .previous 909 .previous
910 910
911#else 911#else
diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S
index 7139d4a7dea7..e52fe5a2d843 100644
--- a/arch/arm/kernel/entry-common.S
+++ b/arch/arm/kernel/entry-common.S
@@ -8,6 +8,7 @@
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 */ 9 */
10 10
11#include <asm/assembler.h>
11#include <asm/unistd.h> 12#include <asm/unistd.h>
12#include <asm/ftrace.h> 13#include <asm/ftrace.h>
13#include <asm/unwind.h> 14#include <asm/unwind.h>
@@ -88,7 +89,7 @@ ENTRY(ret_from_fork)
88 cmp r5, #0 89 cmp r5, #0
89 movne r0, r4 90 movne r0, r4
90 adrne lr, BSYM(1f) 91 adrne lr, BSYM(1f)
91 movne pc, r5 92 retne r5
921: get_thread_info tsk 931: get_thread_info tsk
93 b ret_slow_syscall 94 b ret_slow_syscall
94ENDPROC(ret_from_fork) 95ENDPROC(ret_from_fork)
@@ -290,7 +291,7 @@ ENDPROC(ftrace_graph_caller_old)
290 291
291.macro mcount_exit 292.macro mcount_exit
292 ldmia sp!, {r0-r3, ip, lr} 293 ldmia sp!, {r0-r3, ip, lr}
293 mov pc, ip 294 ret ip
294.endm 295.endm
295 296
296ENTRY(__gnu_mcount_nc) 297ENTRY(__gnu_mcount_nc)
@@ -298,7 +299,7 @@ UNWIND(.fnstart)
298#ifdef CONFIG_DYNAMIC_FTRACE 299#ifdef CONFIG_DYNAMIC_FTRACE
299 mov ip, lr 300 mov ip, lr
300 ldmia sp!, {lr} 301 ldmia sp!, {lr}
301 mov pc, ip 302 ret ip
302#else 303#else
303 __mcount 304 __mcount
304#endif 305#endif
@@ -333,12 +334,12 @@ return_to_handler:
333 bl ftrace_return_to_handler 334 bl ftrace_return_to_handler
334 mov lr, r0 @ r0 has real ret addr 335 mov lr, r0 @ r0 has real ret addr
335 ldmia sp!, {r0-r3} 336 ldmia sp!, {r0-r3}
336 mov pc, lr 337 ret lr
337#endif 338#endif
338 339
339ENTRY(ftrace_stub) 340ENTRY(ftrace_stub)
340.Lftrace_stub: 341.Lftrace_stub:
341 mov pc, lr 342 ret lr
342ENDPROC(ftrace_stub) 343ENDPROC(ftrace_stub)
343 344
344#endif /* CONFIG_FUNCTION_TRACER */ 345#endif /* CONFIG_FUNCTION_TRACER */
@@ -561,7 +562,7 @@ sys_mmap2:
561 streq r5, [sp, #4] 562 streq r5, [sp, #4]
562 beq sys_mmap_pgoff 563 beq sys_mmap_pgoff
563 mov r0, #-EINVAL 564 mov r0, #-EINVAL
564 mov pc, lr 565 ret lr
565#else 566#else
566 str r5, [sp, #4] 567 str r5, [sp, #4]
567 b sys_mmap_pgoff 568 b sys_mmap_pgoff
diff --git a/arch/arm/kernel/entry-header.S b/arch/arm/kernel/entry-header.S
index 5d702f8900b1..8db307d0954b 100644
--- a/arch/arm/kernel/entry-header.S
+++ b/arch/arm/kernel/entry-header.S
@@ -240,12 +240,6 @@
240 movs pc, lr @ return & move spsr_svc into cpsr 240 movs pc, lr @ return & move spsr_svc into cpsr
241 .endm 241 .endm
242 242
243 @
244 @ 32-bit wide "mov pc, reg"
245 @
246 .macro movw_pc, reg
247 mov pc, \reg
248 .endm
249#else /* CONFIG_THUMB2_KERNEL */ 243#else /* CONFIG_THUMB2_KERNEL */
250 .macro svc_exit, rpsr, irq = 0 244 .macro svc_exit, rpsr, irq = 0
251 .if \irq != 0 245 .if \irq != 0
@@ -304,14 +298,6 @@
304 movs pc, lr @ return & move spsr_svc into cpsr 298 movs pc, lr @ return & move spsr_svc into cpsr
305 .endm 299 .endm
306#endif /* ifdef CONFIG_CPU_V7M / else */ 300#endif /* ifdef CONFIG_CPU_V7M / else */
307
308 @
309 @ 32-bit wide "mov pc, reg"
310 @
311 .macro movw_pc, reg
312 mov pc, \reg
313 nop
314 .endm
315#endif /* !CONFIG_THUMB2_KERNEL */ 301#endif /* !CONFIG_THUMB2_KERNEL */
316 302
317/* 303/*
diff --git a/arch/arm/kernel/fiqasm.S b/arch/arm/kernel/fiqasm.S
index 207f9d652010..8dd26e1a9bd6 100644
--- a/arch/arm/kernel/fiqasm.S
+++ b/arch/arm/kernel/fiqasm.S
@@ -32,7 +32,7 @@ ENTRY(__set_fiq_regs)
32 ldr lr, [r0] 32 ldr lr, [r0]
33 msr cpsr_c, r1 @ return to SVC mode 33 msr cpsr_c, r1 @ return to SVC mode
34 mov r0, r0 @ avoid hazard prior to ARMv4 34 mov r0, r0 @ avoid hazard prior to ARMv4
35 mov pc, lr 35 ret lr
36ENDPROC(__set_fiq_regs) 36ENDPROC(__set_fiq_regs)
37 37
38ENTRY(__get_fiq_regs) 38ENTRY(__get_fiq_regs)
@@ -45,5 +45,5 @@ ENTRY(__get_fiq_regs)
45 str lr, [r0] 45 str lr, [r0]
46 msr cpsr_c, r1 @ return to SVC mode 46 msr cpsr_c, r1 @ return to SVC mode
47 mov r0, r0 @ avoid hazard prior to ARMv4 47 mov r0, r0 @ avoid hazard prior to ARMv4
48 mov pc, lr 48 ret lr
49ENDPROC(__get_fiq_regs) 49ENDPROC(__get_fiq_regs)
diff --git a/arch/arm/kernel/head-common.S b/arch/arm/kernel/head-common.S
index 572a38335c96..8733012d231f 100644
--- a/arch/arm/kernel/head-common.S
+++ b/arch/arm/kernel/head-common.S
@@ -10,6 +10,7 @@
10 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
11 * 11 *
12 */ 12 */
13#include <asm/assembler.h>
13 14
14#define ATAG_CORE 0x54410001 15#define ATAG_CORE 0x54410001
15#define ATAG_CORE_SIZE ((2*4 + 3*4) >> 2) 16#define ATAG_CORE_SIZE ((2*4 + 3*4) >> 2)
@@ -61,10 +62,10 @@ __vet_atags:
61 cmp r5, r6 62 cmp r5, r6
62 bne 1f 63 bne 1f
63 64
642: mov pc, lr @ atag/dtb pointer is ok 652: ret lr @ atag/dtb pointer is ok
65 66
661: mov r2, #0 671: mov r2, #0
67 mov pc, lr 68 ret lr
68ENDPROC(__vet_atags) 69ENDPROC(__vet_atags)
69 70
70/* 71/*
@@ -162,7 +163,7 @@ __lookup_processor_type:
162 cmp r5, r6 163 cmp r5, r6
163 blo 1b 164 blo 1b
164 mov r5, #0 @ unknown processor 165 mov r5, #0 @ unknown processor
1652: mov pc, lr 1662: ret lr
166ENDPROC(__lookup_processor_type) 167ENDPROC(__lookup_processor_type)
167 168
168/* 169/*
diff --git a/arch/arm/kernel/head-nommu.S b/arch/arm/kernel/head-nommu.S
index 716249cc2ee1..cc176b67c134 100644
--- a/arch/arm/kernel/head-nommu.S
+++ b/arch/arm/kernel/head-nommu.S
@@ -82,7 +82,7 @@ ENTRY(stext)
82 adr lr, BSYM(1f) @ return (PIC) address 82 adr lr, BSYM(1f) @ return (PIC) address
83 ARM( add pc, r10, #PROCINFO_INITFUNC ) 83 ARM( add pc, r10, #PROCINFO_INITFUNC )
84 THUMB( add r12, r10, #PROCINFO_INITFUNC ) 84 THUMB( add r12, r10, #PROCINFO_INITFUNC )
85 THUMB( mov pc, r12 ) 85 THUMB( ret r12 )
86 1: b __after_proc_init 86 1: b __after_proc_init
87ENDPROC(stext) 87ENDPROC(stext)
88 88
@@ -119,7 +119,7 @@ ENTRY(secondary_startup)
119 mov r13, r12 @ __secondary_switched address 119 mov r13, r12 @ __secondary_switched address
120 ARM( add pc, r10, #PROCINFO_INITFUNC ) 120 ARM( add pc, r10, #PROCINFO_INITFUNC )
121 THUMB( add r12, r10, #PROCINFO_INITFUNC ) 121 THUMB( add r12, r10, #PROCINFO_INITFUNC )
122 THUMB( mov pc, r12 ) 122 THUMB( ret r12 )
123ENDPROC(secondary_startup) 123ENDPROC(secondary_startup)
124 124
125ENTRY(__secondary_switched) 125ENTRY(__secondary_switched)
@@ -164,7 +164,7 @@ __after_proc_init:
164#endif 164#endif
165 mcr p15, 0, r0, c1, c0, 0 @ write control reg 165 mcr p15, 0, r0, c1, c0, 0 @ write control reg
166#endif /* CONFIG_CPU_CP15 */ 166#endif /* CONFIG_CPU_CP15 */
167 mov pc, r13 167 ret r13
168ENDPROC(__after_proc_init) 168ENDPROC(__after_proc_init)
169 .ltorg 169 .ltorg
170 170
@@ -254,7 +254,7 @@ ENTRY(__setup_mpu)
254 orr r0, r0, #CR_M @ Set SCTRL.M (MPU on) 254 orr r0, r0, #CR_M @ Set SCTRL.M (MPU on)
255 mcr p15, 0, r0, c1, c0, 0 @ Enable MPU 255 mcr p15, 0, r0, c1, c0, 0 @ Enable MPU
256 isb 256 isb
257 mov pc,lr 257 ret lr
258ENDPROC(__setup_mpu) 258ENDPROC(__setup_mpu)
259#endif 259#endif
260#include "head-common.S" 260#include "head-common.S"
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index 2c35f0ff2fdc..664eee8c4a26 100644
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -140,7 +140,7 @@ ENTRY(stext)
140 mov r8, r4 @ set TTBR1 to swapper_pg_dir 140 mov r8, r4 @ set TTBR1 to swapper_pg_dir
141 ARM( add pc, r10, #PROCINFO_INITFUNC ) 141 ARM( add pc, r10, #PROCINFO_INITFUNC )
142 THUMB( add r12, r10, #PROCINFO_INITFUNC ) 142 THUMB( add r12, r10, #PROCINFO_INITFUNC )
143 THUMB( mov pc, r12 ) 143 THUMB( ret r12 )
1441: b __enable_mmu 1441: b __enable_mmu
145ENDPROC(stext) 145ENDPROC(stext)
146 .ltorg 146 .ltorg
@@ -335,7 +335,7 @@ __create_page_tables:
335 sub r4, r4, #0x1000 @ point to the PGD table 335 sub r4, r4, #0x1000 @ point to the PGD table
336 mov r4, r4, lsr #ARCH_PGD_SHIFT 336 mov r4, r4, lsr #ARCH_PGD_SHIFT
337#endif 337#endif
338 mov pc, lr 338 ret lr
339ENDPROC(__create_page_tables) 339ENDPROC(__create_page_tables)
340 .ltorg 340 .ltorg
341 .align 341 .align
@@ -383,7 +383,7 @@ ENTRY(secondary_startup)
383 ARM( add pc, r10, #PROCINFO_INITFUNC ) @ initialise processor 383 ARM( add pc, r10, #PROCINFO_INITFUNC ) @ initialise processor
384 @ (return control reg) 384 @ (return control reg)
385 THUMB( add r12, r10, #PROCINFO_INITFUNC ) 385 THUMB( add r12, r10, #PROCINFO_INITFUNC )
386 THUMB( mov pc, r12 ) 386 THUMB( ret r12 )
387ENDPROC(secondary_startup) 387ENDPROC(secondary_startup)
388 388
389 /* 389 /*
@@ -468,7 +468,7 @@ ENTRY(__turn_mmu_on)
468 instr_sync 468 instr_sync
469 mov r3, r3 469 mov r3, r3
470 mov r3, r13 470 mov r3, r13
471 mov pc, r3 471 ret r3
472__turn_mmu_on_end: 472__turn_mmu_on_end:
473ENDPROC(__turn_mmu_on) 473ENDPROC(__turn_mmu_on)
474 .popsection 474 .popsection
@@ -487,7 +487,7 @@ __fixup_smp:
487 orr r4, r4, #0x0000b000 487 orr r4, r4, #0x0000b000
488 orr r4, r4, #0x00000020 @ val 0x4100b020 488 orr r4, r4, #0x00000020 @ val 0x4100b020
489 teq r3, r4 @ ARM 11MPCore? 489 teq r3, r4 @ ARM 11MPCore?
490 moveq pc, lr @ yes, assume SMP 490 reteq lr @ yes, assume SMP
491 491
492 mrc p15, 0, r0, c0, c0, 5 @ read MPIDR 492 mrc p15, 0, r0, c0, c0, 5 @ read MPIDR
493 and r0, r0, #0xc0000000 @ multiprocessing extensions and 493 and r0, r0, #0xc0000000 @ multiprocessing extensions and
@@ -500,7 +500,7 @@ __fixup_smp:
500 orr r4, r4, #0x0000c000 500 orr r4, r4, #0x0000c000
501 orr r4, r4, #0x00000090 501 orr r4, r4, #0x00000090
502 teq r3, r4 @ Check for ARM Cortex-A9 502 teq r3, r4 @ Check for ARM Cortex-A9
503 movne pc, lr @ Not ARM Cortex-A9, 503 retne lr @ Not ARM Cortex-A9,
504 504
505 @ If a future SoC *does* use 0x0 as the PERIPH_BASE, then the 505 @ If a future SoC *does* use 0x0 as the PERIPH_BASE, then the
506 @ below address check will need to be #ifdef'd or equivalent 506 @ below address check will need to be #ifdef'd or equivalent
@@ -512,7 +512,7 @@ __fixup_smp:
512ARM_BE8(rev r0, r0) @ byteswap if big endian 512ARM_BE8(rev r0, r0) @ byteswap if big endian
513 and r0, r0, #0x3 @ number of CPUs 513 and r0, r0, #0x3 @ number of CPUs
514 teq r0, #0x0 @ is 1? 514 teq r0, #0x0 @ is 1?
515 movne pc, lr 515 retne lr
516 516
517__fixup_smp_on_up: 517__fixup_smp_on_up:
518 adr r0, 1f 518 adr r0, 1f
@@ -539,7 +539,7 @@ smp_on_up:
539 .text 539 .text
540__do_fixup_smp_on_up: 540__do_fixup_smp_on_up:
541 cmp r4, r5 541 cmp r4, r5
542 movhs pc, lr 542 reths lr
543 ldmia r4!, {r0, r6} 543 ldmia r4!, {r0, r6}
544 ARM( str r6, [r0, r3] ) 544 ARM( str r6, [r0, r3] )
545 THUMB( add r0, r0, r3 ) 545 THUMB( add r0, r0, r3 )
@@ -672,7 +672,7 @@ ARM_BE8(rev16 ip, ip)
6722: cmp r4, r5 6722: cmp r4, r5
673 ldrcc r7, [r4], #4 @ use branch for delay slot 673 ldrcc r7, [r4], #4 @ use branch for delay slot
674 bcc 1b 674 bcc 1b
675 mov pc, lr 675 ret lr
676#endif 676#endif
677ENDPROC(__fixup_a_pv_table) 677ENDPROC(__fixup_a_pv_table)
678 678
diff --git a/arch/arm/kernel/hyp-stub.S b/arch/arm/kernel/hyp-stub.S
index 797b1a6a4906..56ce6290c831 100644
--- a/arch/arm/kernel/hyp-stub.S
+++ b/arch/arm/kernel/hyp-stub.S
@@ -99,7 +99,7 @@ ENTRY(__hyp_stub_install_secondary)
99 * immediately. 99 * immediately.
100 */ 100 */
101 compare_cpu_mode_with_primary r4, r5, r6, r7 101 compare_cpu_mode_with_primary r4, r5, r6, r7
102 movne pc, lr 102 retne lr
103 103
104 /* 104 /*
105 * Once we have given up on one CPU, we do not try to install the 105 * Once we have given up on one CPU, we do not try to install the
@@ -111,7 +111,7 @@ ENTRY(__hyp_stub_install_secondary)
111 */ 111 */
112 112
113 cmp r4, #HYP_MODE 113 cmp r4, #HYP_MODE
114 movne pc, lr @ give up if the CPU is not in HYP mode 114 retne lr @ give up if the CPU is not in HYP mode
115 115
116/* 116/*
117 * Configure HSCTLR to set correct exception endianness/instruction set 117 * Configure HSCTLR to set correct exception endianness/instruction set
@@ -201,7 +201,7 @@ ENDPROC(__hyp_get_vectors)
201 @ fall through 201 @ fall through
202ENTRY(__hyp_set_vectors) 202ENTRY(__hyp_set_vectors)
203 __HVC(0) 203 __HVC(0)
204 mov pc, lr 204 ret lr
205ENDPROC(__hyp_set_vectors) 205ENDPROC(__hyp_set_vectors)
206 206
207#ifndef ZIMAGE 207#ifndef ZIMAGE
diff --git a/arch/arm/kernel/iwmmxt.S b/arch/arm/kernel/iwmmxt.S
index 2b32978ae905..ad58e565fe98 100644
--- a/arch/arm/kernel/iwmmxt.S
+++ b/arch/arm/kernel/iwmmxt.S
@@ -100,7 +100,7 @@ ENTRY(iwmmxt_task_enable)
100 get_thread_info r10 100 get_thread_info r10
101#endif 101#endif
1024: dec_preempt_count r10, r3 1024: dec_preempt_count r10, r3
103 mov pc, r9 @ normal exit from exception 103 ret r9 @ normal exit from exception
104 104
105concan_save: 105concan_save:
106 106
@@ -144,7 +144,7 @@ concan_dump:
144 wstrd wR15, [r1, #MMX_WR15] 144 wstrd wR15, [r1, #MMX_WR15]
145 145
1462: teq r0, #0 @ anything to load? 1462: teq r0, #0 @ anything to load?
147 moveq pc, lr @ if not, return 147 reteq lr @ if not, return
148 148
149concan_load: 149concan_load:
150 150
@@ -177,10 +177,10 @@ concan_load:
177 @ clear CUP/MUP (only if r1 != 0) 177 @ clear CUP/MUP (only if r1 != 0)
178 teq r1, #0 178 teq r1, #0
179 mov r2, #0 179 mov r2, #0
180 moveq pc, lr 180 reteq lr
181 181
182 tmcr wCon, r2 182 tmcr wCon, r2
183 mov pc, lr 183 ret lr
184 184
185/* 185/*
186 * Back up Concan regs to save area and disable access to them 186 * Back up Concan regs to save area and disable access to them
@@ -266,7 +266,7 @@ ENTRY(iwmmxt_task_copy)
266 mov r3, lr @ preserve return address 266 mov r3, lr @ preserve return address
267 bl concan_dump 267 bl concan_dump
268 msr cpsr_c, ip @ restore interrupt mode 268 msr cpsr_c, ip @ restore interrupt mode
269 mov pc, r3 269 ret r3
270 270
271/* 271/*
272 * Restore Concan state from given memory address 272 * Restore Concan state from given memory address
@@ -302,7 +302,7 @@ ENTRY(iwmmxt_task_restore)
302 mov r3, lr @ preserve return address 302 mov r3, lr @ preserve return address
303 bl concan_load 303 bl concan_load
304 msr cpsr_c, ip @ restore interrupt mode 304 msr cpsr_c, ip @ restore interrupt mode
305 mov pc, r3 305 ret r3
306 306
307/* 307/*
308 * Concan handling on task switch 308 * Concan handling on task switch
@@ -324,7 +324,7 @@ ENTRY(iwmmxt_task_switch)
324 add r3, r0, #TI_IWMMXT_STATE @ get next task Concan save area 324 add r3, r0, #TI_IWMMXT_STATE @ get next task Concan save area
325 ldr r2, [r2] @ get current Concan owner 325 ldr r2, [r2] @ get current Concan owner
326 teq r2, r3 @ next task owns it? 326 teq r2, r3 @ next task owns it?
327 movne pc, lr @ no: leave Concan disabled 327 retne lr @ no: leave Concan disabled
328 328
3291: @ flip Concan access 3291: @ flip Concan access
330 XSC(eor r1, r1, #0x3) 330 XSC(eor r1, r1, #0x3)
@@ -351,7 +351,7 @@ ENTRY(iwmmxt_task_release)
351 eors r0, r0, r1 @ if equal... 351 eors r0, r0, r1 @ if equal...
352 streq r0, [r3] @ then clear ownership 352 streq r0, [r3] @ then clear ownership
353 msr cpsr_c, r2 @ restore interrupts 353 msr cpsr_c, r2 @ restore interrupts
354 mov pc, lr 354 ret lr
355 355
356 .data 356 .data
357concan_owner: 357concan_owner:
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index 4238bcba9d60..ae3e216a52c2 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -621,10 +621,7 @@ perf_callchain_kernel(struct perf_callchain_entry *entry, struct pt_regs *regs)
621 return; 621 return;
622 } 622 }
623 623
624 fr.fp = regs->ARM_fp; 624 arm_get_current_stackframe(regs, &fr);
625 fr.sp = regs->ARM_sp;
626 fr.lr = regs->ARM_lr;
627 fr.pc = regs->ARM_pc;
628 walk_stackframe(&fr, callchain_trace, entry); 625 walk_stackframe(&fr, callchain_trace, entry);
629} 626}
630 627
diff --git a/arch/arm/kernel/perf_event_cpu.c b/arch/arm/kernel/perf_event_cpu.c
index af9e35e8836f..c02c2e8c877d 100644
--- a/arch/arm/kernel/perf_event_cpu.c
+++ b/arch/arm/kernel/perf_event_cpu.c
@@ -250,40 +250,39 @@ static struct platform_device_id cpu_pmu_plat_device_ids[] = {
250static int probe_current_pmu(struct arm_pmu *pmu) 250static int probe_current_pmu(struct arm_pmu *pmu)
251{ 251{
252 int cpu = get_cpu(); 252 int cpu = get_cpu();
253 unsigned long implementor = read_cpuid_implementor();
254 unsigned long part_number = read_cpuid_part_number();
255 int ret = -ENODEV; 253 int ret = -ENODEV;
256 254
257 pr_info("probing PMU on CPU %d\n", cpu); 255 pr_info("probing PMU on CPU %d\n", cpu);
258 256
257 switch (read_cpuid_part()) {
259 /* ARM Ltd CPUs. */ 258 /* ARM Ltd CPUs. */
260 if (implementor == ARM_CPU_IMP_ARM) { 259 case ARM_CPU_PART_ARM1136:
261 switch (part_number) { 260 case ARM_CPU_PART_ARM1156:
262 case ARM_CPU_PART_ARM1136: 261 case ARM_CPU_PART_ARM1176:
263 case ARM_CPU_PART_ARM1156: 262 ret = armv6pmu_init(pmu);
264 case ARM_CPU_PART_ARM1176: 263 break;
265 ret = armv6pmu_init(pmu); 264 case ARM_CPU_PART_ARM11MPCORE:
266 break; 265 ret = armv6mpcore_pmu_init(pmu);
267 case ARM_CPU_PART_ARM11MPCORE: 266 break;
268 ret = armv6mpcore_pmu_init(pmu); 267 case ARM_CPU_PART_CORTEX_A8:
269 break; 268 ret = armv7_a8_pmu_init(pmu);
270 case ARM_CPU_PART_CORTEX_A8: 269 break;
271 ret = armv7_a8_pmu_init(pmu); 270 case ARM_CPU_PART_CORTEX_A9:
272 break; 271 ret = armv7_a9_pmu_init(pmu);
273 case ARM_CPU_PART_CORTEX_A9: 272 break;
274 ret = armv7_a9_pmu_init(pmu); 273
275 break; 274 default:
276 } 275 if (read_cpuid_implementor() == ARM_CPU_IMP_INTEL) {
277 /* Intel CPUs [xscale]. */ 276 switch (xscale_cpu_arch_version()) {
278 } else if (implementor == ARM_CPU_IMP_INTEL) { 277 case ARM_CPU_XSCALE_ARCH_V1:
279 switch (xscale_cpu_arch_version()) { 278 ret = xscale1pmu_init(pmu);
280 case ARM_CPU_XSCALE_ARCH_V1: 279 break;
281 ret = xscale1pmu_init(pmu); 280 case ARM_CPU_XSCALE_ARCH_V2:
282 break; 281 ret = xscale2pmu_init(pmu);
283 case ARM_CPU_XSCALE_ARCH_V2: 282 break;
284 ret = xscale2pmu_init(pmu); 283 }
285 break;
286 } 284 }
285 break;
287 } 286 }
288 287
289 put_cpu(); 288 put_cpu();
diff --git a/arch/arm/kernel/relocate_kernel.S b/arch/arm/kernel/relocate_kernel.S
index 95858966d84e..35e72585ec1d 100644
--- a/arch/arm/kernel/relocate_kernel.S
+++ b/arch/arm/kernel/relocate_kernel.S
@@ -3,6 +3,7 @@
3 */ 3 */
4 4
5#include <linux/linkage.h> 5#include <linux/linkage.h>
6#include <asm/assembler.h>
6#include <asm/kexec.h> 7#include <asm/kexec.h>
7 8
8 .align 3 /* not needed for this code, but keeps fncpy() happy */ 9 .align 3 /* not needed for this code, but keeps fncpy() happy */
@@ -59,7 +60,7 @@ ENTRY(relocate_new_kernel)
59 mov r0,#0 60 mov r0,#0
60 ldr r1,kexec_mach_type 61 ldr r1,kexec_mach_type
61 ldr r2,kexec_boot_atags 62 ldr r2,kexec_boot_atags
62 ARM( mov pc, lr ) 63 ARM( ret lr )
63 THUMB( bx lr ) 64 THUMB( bx lr )
64 65
65 .align 66 .align
diff --git a/arch/arm/kernel/sleep.S b/arch/arm/kernel/sleep.S
index 1b880db2a033..e1e60e5a7a27 100644
--- a/arch/arm/kernel/sleep.S
+++ b/arch/arm/kernel/sleep.S
@@ -107,7 +107,7 @@ ENTRY(cpu_resume_mmu)
107 instr_sync 107 instr_sync
108 mov r0, r0 108 mov r0, r0
109 mov r0, r0 109 mov r0, r0
110 mov pc, r3 @ jump to virtual address 110 ret r3 @ jump to virtual address
111ENDPROC(cpu_resume_mmu) 111ENDPROC(cpu_resume_mmu)
112 .popsection 112 .popsection
113cpu_resume_after_mmu: 113cpu_resume_after_mmu:
diff --git a/arch/arm/kernel/smp_scu.c b/arch/arm/kernel/smp_scu.c
index 1aafa0d785eb..72f9241ad5db 100644
--- a/arch/arm/kernel/smp_scu.c
+++ b/arch/arm/kernel/smp_scu.c
@@ -17,6 +17,8 @@
17#include <asm/cputype.h> 17#include <asm/cputype.h>
18 18
19#define SCU_CTRL 0x00 19#define SCU_CTRL 0x00
20#define SCU_ENABLE (1 << 0)
21#define SCU_STANDBY_ENABLE (1 << 5)
20#define SCU_CONFIG 0x04 22#define SCU_CONFIG 0x04
21#define SCU_CPU_STATUS 0x08 23#define SCU_CPU_STATUS 0x08
22#define SCU_INVALIDATE 0x0c 24#define SCU_INVALIDATE 0x0c
@@ -50,10 +52,16 @@ void scu_enable(void __iomem *scu_base)
50 52
51 scu_ctrl = readl_relaxed(scu_base + SCU_CTRL); 53 scu_ctrl = readl_relaxed(scu_base + SCU_CTRL);
52 /* already enabled? */ 54 /* already enabled? */
53 if (scu_ctrl & 1) 55 if (scu_ctrl & SCU_ENABLE)
54 return; 56 return;
55 57
56 scu_ctrl |= 1; 58 scu_ctrl |= SCU_ENABLE;
59
60 /* Cortex-A9 earlier than r2p0 has no standby bit in SCU */
61 if ((read_cpuid_id() & 0xff0ffff0) == 0x410fc090 &&
62 (read_cpuid_id() & 0x00f0000f) >= 0x00200000)
63 scu_ctrl |= SCU_STANDBY_ENABLE;
64
57 writel_relaxed(scu_ctrl, scu_base + SCU_CTRL); 65 writel_relaxed(scu_ctrl, scu_base + SCU_CTRL);
58 66
59 /* 67 /*
diff --git a/arch/arm/kernel/smp_tlb.c b/arch/arm/kernel/smp_tlb.c
index 95d063620b76..2e72be4f623e 100644
--- a/arch/arm/kernel/smp_tlb.c
+++ b/arch/arm/kernel/smp_tlb.c
@@ -92,15 +92,19 @@ void erratum_a15_798181_init(void)
92 unsigned int midr = read_cpuid_id(); 92 unsigned int midr = read_cpuid_id();
93 unsigned int revidr = read_cpuid(CPUID_REVIDR); 93 unsigned int revidr = read_cpuid(CPUID_REVIDR);
94 94
95 /* Cortex-A15 r0p0..r3p2 w/o ECO fix affected */ 95 /* Brahma-B15 r0p0..r0p2 affected
96 if ((midr & 0xff0ffff0) != 0x410fc0f0 || midr > 0x413fc0f2 || 96 * Cortex-A15 r0p0..r3p2 w/o ECO fix affected */
97 (revidr & 0x210) == 0x210) { 97 if ((midr & 0xff0ffff0) == 0x420f00f0 && midr <= 0x420f00f2)
98 return;
99 }
100 if (revidr & 0x10)
101 erratum_a15_798181_handler = erratum_a15_798181_partial;
102 else
103 erratum_a15_798181_handler = erratum_a15_798181_broadcast; 98 erratum_a15_798181_handler = erratum_a15_798181_broadcast;
99 else if ((midr & 0xff0ffff0) == 0x410fc0f0 && midr <= 0x413fc0f2 &&
100 (revidr & 0x210) != 0x210) {
101 if (revidr & 0x10)
102 erratum_a15_798181_handler =
103 erratum_a15_798181_partial;
104 else
105 erratum_a15_798181_handler =
106 erratum_a15_798181_broadcast;
107 }
104} 108}
105#endif 109#endif
106 110
diff --git a/arch/arm/kernel/time.c b/arch/arm/kernel/time.c
index 829a96d4a179..0cc7e58c47cc 100644
--- a/arch/arm/kernel/time.c
+++ b/arch/arm/kernel/time.c
@@ -50,10 +50,7 @@ unsigned long profile_pc(struct pt_regs *regs)
50 if (!in_lock_functions(regs->ARM_pc)) 50 if (!in_lock_functions(regs->ARM_pc))
51 return regs->ARM_pc; 51 return regs->ARM_pc;
52 52
53 frame.fp = regs->ARM_fp; 53 arm_get_current_stackframe(regs, &frame);
54 frame.sp = regs->ARM_sp;
55 frame.lr = regs->ARM_lr;
56 frame.pc = regs->ARM_pc;
57 do { 54 do {
58 int ret = unwind_frame(&frame); 55 int ret = unwind_frame(&frame);
59 if (ret < 0) 56 if (ret < 0)
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index abd2fc067736..c8e4bb714944 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -31,11 +31,13 @@
31#include <asm/exception.h> 31#include <asm/exception.h>
32#include <asm/unistd.h> 32#include <asm/unistd.h>
33#include <asm/traps.h> 33#include <asm/traps.h>
34#include <asm/ptrace.h>
34#include <asm/unwind.h> 35#include <asm/unwind.h>
35#include <asm/tls.h> 36#include <asm/tls.h>
36#include <asm/system_misc.h> 37#include <asm/system_misc.h>
37#include <asm/opcodes.h> 38#include <asm/opcodes.h>
38 39
40
39static const char *handler[]= { 41static const char *handler[]= {
40 "prefetch abort", 42 "prefetch abort",
41 "data abort", 43 "data abort",
@@ -184,7 +186,7 @@ static void dump_backtrace(struct pt_regs *regs, struct task_struct *tsk)
184 tsk = current; 186 tsk = current;
185 187
186 if (regs) { 188 if (regs) {
187 fp = regs->ARM_fp; 189 fp = frame_pointer(regs);
188 mode = processor_mode(regs); 190 mode = processor_mode(regs);
189 } else if (tsk != current) { 191 } else if (tsk != current) {
190 fp = thread_saved_fp(tsk); 192 fp = thread_saved_fp(tsk);
@@ -719,7 +721,7 @@ asmlinkage int arm_syscall(int no, struct pt_regs *regs)
719 dump_instr("", regs); 721 dump_instr("", regs);
720 if (user_mode(regs)) { 722 if (user_mode(regs)) {
721 __show_regs(regs); 723 __show_regs(regs);
722 c_backtrace(regs->ARM_fp, processor_mode(regs)); 724 c_backtrace(frame_pointer(regs), processor_mode(regs));
723 } 725 }
724 } 726 }
725#endif 727#endif
diff --git a/arch/arm/kernel/unwind.c b/arch/arm/kernel/unwind.c
index e67682f02cb2..a61a1dfbb0db 100644
--- a/arch/arm/kernel/unwind.c
+++ b/arch/arm/kernel/unwind.c
@@ -479,12 +479,10 @@ void unwind_backtrace(struct pt_regs *regs, struct task_struct *tsk)
479 tsk = current; 479 tsk = current;
480 480
481 if (regs) { 481 if (regs) {
482 frame.fp = regs->ARM_fp; 482 arm_get_current_stackframe(regs, &frame);
483 frame.sp = regs->ARM_sp;
484 frame.lr = regs->ARM_lr;
485 /* PC might be corrupted, use LR in that case. */ 483 /* PC might be corrupted, use LR in that case. */
486 frame.pc = kernel_text_address(regs->ARM_pc) 484 if (!kernel_text_address(regs->ARM_pc))
487 ? regs->ARM_pc : regs->ARM_lr; 485 frame.pc = regs->ARM_lr;
488 } else if (tsk == current) { 486 } else if (tsk == current) {
489 frame.fp = (unsigned long)__builtin_frame_address(0); 487 frame.fp = (unsigned long)__builtin_frame_address(0);
490 frame.sp = current_sp; 488 frame.sp = current_sp;
diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S
index 7bcee5c9b604..6f57cb94367f 100644
--- a/arch/arm/kernel/vmlinux.lds.S
+++ b/arch/arm/kernel/vmlinux.lds.S
@@ -318,7 +318,6 @@ SECTIONS
318 _end = .; 318 _end = .;
319 319
320 STABS_DEBUG 320 STABS_DEBUG
321 .comment 0 : { *(.comment) }
322} 321}
323 322
324/* 323/*
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-22 17:44:02 -0500