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-rw-r--r--arch/arm/kernel/debug.S4
-rw-r--r--arch/arm/kernel/head.S65
-rw-r--r--arch/arm/kernel/setup.c21
3 files changed, 19 insertions, 71 deletions
diff --git a/arch/arm/kernel/debug.S b/arch/arm/kernel/debug.S
index bcd66e00bdbe..b7685f1bb04a 100644
--- a/arch/arm/kernel/debug.S
+++ b/arch/arm/kernel/debug.S
@@ -22,7 +22,7 @@
22#if defined(CONFIG_DEBUG_ICEDCC) 22#if defined(CONFIG_DEBUG_ICEDCC)
23 @@ debug using ARM EmbeddedICE DCC channel 23 @@ debug using ARM EmbeddedICE DCC channel
24 24
25 .macro addruart, rp, rv 25 .macro addruart, rp, rv, tmp
26 .endm 26 .endm
27 27
28#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) || defined(CONFIG_CPU_V7) 28#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) || defined(CONFIG_CPU_V7)
@@ -106,7 +106,7 @@
106 106
107#ifdef CONFIG_MMU 107#ifdef CONFIG_MMU
108 .macro addruart_current, rx, tmp1, tmp2 108 .macro addruart_current, rx, tmp1, tmp2
109 addruart \tmp1, \tmp2 109 addruart \tmp1, \tmp2, \rx
110 mrc p15, 0, \rx, c1, c0 110 mrc p15, 0, \rx, c1, c0
111 tst \rx, #1 111 tst \rx, #1
112 moveq \rx, \tmp1 112 moveq \rx, \tmp1
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index 742b6108a001..673c806cc106 100644
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -95,7 +95,7 @@ ENTRY(stext)
95 sub r4, r3, r4 @ (PHYS_OFFSET - PAGE_OFFSET) 95 sub r4, r3, r4 @ (PHYS_OFFSET - PAGE_OFFSET)
96 add r8, r8, r4 @ PHYS_OFFSET 96 add r8, r8, r4 @ PHYS_OFFSET
97#else 97#else
98 ldr r8, =PLAT_PHYS_OFFSET 98 ldr r8, =PHYS_OFFSET @ always constant in this case
99#endif 99#endif
100 100
101 /* 101 /*
@@ -234,7 +234,7 @@ __create_page_tables:
234 * This allows debug messages to be output 234 * This allows debug messages to be output
235 * via a serial console before paging_init. 235 * via a serial console before paging_init.
236 */ 236 */
237 addruart r7, r3 237 addruart r7, r3, r0
238 238
239 mov r3, r3, lsr #20 239 mov r3, r3, lsr #20
240 mov r3, r3, lsl #2 240 mov r3, r3, lsl #2
@@ -488,13 +488,8 @@ __fixup_pv_table:
488 add r5, r5, r3 @ adjust table end address 488 add r5, r5, r3 @ adjust table end address
489 add r7, r7, r3 @ adjust __pv_phys_offset address 489 add r7, r7, r3 @ adjust __pv_phys_offset address
490 str r8, [r7] @ save computed PHYS_OFFSET to __pv_phys_offset 490 str r8, [r7] @ save computed PHYS_OFFSET to __pv_phys_offset
491#ifndef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT
492 mov r6, r3, lsr #24 @ constant for add/sub instructions 491 mov r6, r3, lsr #24 @ constant for add/sub instructions
493 teq r3, r6, lsl #24 @ must be 16MiB aligned 492 teq r3, r6, lsl #24 @ must be 16MiB aligned
494#else
495 mov r6, r3, lsr #16 @ constant for add/sub instructions
496 teq r3, r6, lsl #16 @ must be 64kiB aligned
497#endif
498THUMB( it ne @ cross section branch ) 493THUMB( it ne @ cross section branch )
499 bne __error 494 bne __error
500 str r6, [r7, #4] @ save to __pv_offset 495 str r6, [r7, #4] @ save to __pv_offset
@@ -510,20 +505,8 @@ ENDPROC(__fixup_pv_table)
510 .text 505 .text
511__fixup_a_pv_table: 506__fixup_a_pv_table:
512#ifdef CONFIG_THUMB2_KERNEL 507#ifdef CONFIG_THUMB2_KERNEL
513#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT 508 lsls r6, #24
514 lsls r0, r6, #24 509 beq 2f
515 lsr r6, #8
516 beq 1f
517 clz r7, r0
518 lsr r0, #24
519 lsl r0, r7
520 bic r0, 0x0080
521 lsrs r7, #1
522 orrcs r0, #0x0080
523 orr r0, r0, r7, lsl #12
524#endif
5251: lsls r6, #24
526 beq 4f
527 clz r7, r6 510 clz r7, r6
528 lsr r6, #24 511 lsr r6, #24
529 lsl r6, r7 512 lsl r6, r7
@@ -532,43 +515,25 @@ __fixup_a_pv_table:
532 orrcs r6, #0x0080 515 orrcs r6, #0x0080
533 orr r6, r6, r7, lsl #12 516 orr r6, r6, r7, lsl #12
534 orr r6, #0x4000 517 orr r6, #0x4000
535 b 4f 518 b 2f
5362: @ at this point the C flag is always clear 5191: add r7, r3
537 add r7, r3 520 ldrh ip, [r7, #2]
538#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT
539 ldrh ip, [r7]
540 tst ip, 0x0400 @ the i bit tells us LS or MS byte
541 beq 3f
542 cmp r0, #0 @ set C flag, and ...
543 biceq ip, 0x0400 @ immediate zero value has a special encoding
544 streqh ip, [r7] @ that requires the i bit cleared
545#endif
5463: ldrh ip, [r7, #2]
547 and ip, 0x8f00 521 and ip, 0x8f00
548 orrcc ip, r6 @ mask in offset bits 31-24 522 orr ip, r6 @ mask in offset bits 31-24
549 orrcs ip, r0 @ mask in offset bits 23-16
550 strh ip, [r7, #2] 523 strh ip, [r7, #2]
5514: cmp r4, r5 5242: cmp r4, r5
552 ldrcc r7, [r4], #4 @ use branch for delay slot 525 ldrcc r7, [r4], #4 @ use branch for delay slot
553 bcc 2b 526 bcc 1b
554 bx lr 527 bx lr
555#else 528#else
556#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT 529 b 2f
557 and r0, r6, #255 @ offset bits 23-16 5301: ldr ip, [r7, r3]
558 mov r6, r6, lsr #8 @ offset bits 31-24
559#else
560 mov r0, #0 @ just in case...
561#endif
562 b 3f
5632: ldr ip, [r7, r3]
564 bic ip, ip, #0x000000ff 531 bic ip, ip, #0x000000ff
565 tst ip, #0x400 @ rotate shift tells us LS or MS byte 532 orr ip, ip, r6 @ mask in offset bits 31-24
566 orrne ip, ip, r6 @ mask in offset bits 31-24
567 orreq ip, ip, r0 @ mask in offset bits 23-16
568 str ip, [r7, r3] 533 str ip, [r7, r3]
5693: cmp r4, r5 5342: cmp r4, r5
570 ldrcc r7, [r4], #4 @ use branch for delay slot 535 ldrcc r7, [r4], #4 @ use branch for delay slot
571 bcc 2b 536 bcc 1b
572 mov pc, lr 537 mov pc, lr
573#endif 538#endif
574ENDPROC(__fixup_a_pv_table) 539ENDPROC(__fixup_a_pv_table)
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index e514c76043b4..6136144f8f8d 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -820,25 +820,8 @@ static struct machine_desc * __init setup_machine_tags(unsigned int nr)
820 820
821 if (__atags_pointer) 821 if (__atags_pointer)
822 tags = phys_to_virt(__atags_pointer); 822 tags = phys_to_virt(__atags_pointer);
823 else if (mdesc->boot_params) { 823 else if (mdesc->atag_offset)
824#ifdef CONFIG_MMU 824 tags = (void *)(PAGE_OFFSET + mdesc->atag_offset);
825 /*
826 * We still are executing with a minimal MMU mapping created
827 * with the presumption that the machine default for this
828 * is located in the first MB of RAM. Anything else will
829 * fault and silently hang the kernel at this point.
830 */
831 if (mdesc->boot_params < PHYS_OFFSET ||
832 mdesc->boot_params >= PHYS_OFFSET + SZ_1M) {
833 printk(KERN_WARNING
834 "Default boot params at physical 0x%08lx out of reach\n",
835 mdesc->boot_params);
836 } else
837#endif
838 {
839 tags = phys_to_virt(mdesc->boot_params);
840 }
841 }
842 825
843#if defined(CONFIG_DEPRECATED_PARAM_STRUCT) 826#if defined(CONFIG_DEPRECATED_PARAM_STRUCT)
844 /* 827 /*