diff options
Diffstat (limited to 'arch/arm/kernel/setup.c')
-rw-r--r-- | arch/arm/kernel/setup.c | 109 |
1 files changed, 60 insertions, 49 deletions
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c index acbb447ac6b5..70bca649e925 100644 --- a/arch/arm/kernel/setup.c +++ b/arch/arm/kernel/setup.c | |||
@@ -343,54 +343,6 @@ static void __init feat_v6_fixup(void) | |||
343 | elf_hwcap &= ~HWCAP_TLS; | 343 | elf_hwcap &= ~HWCAP_TLS; |
344 | } | 344 | } |
345 | 345 | ||
346 | static void __init setup_processor(void) | ||
347 | { | ||
348 | struct proc_info_list *list; | ||
349 | |||
350 | /* | ||
351 | * locate processor in the list of supported processor | ||
352 | * types. The linker builds this table for us from the | ||
353 | * entries in arch/arm/mm/proc-*.S | ||
354 | */ | ||
355 | list = lookup_processor_type(read_cpuid_id()); | ||
356 | if (!list) { | ||
357 | printk("CPU configuration botched (ID %08x), unable " | ||
358 | "to continue.\n", read_cpuid_id()); | ||
359 | while (1); | ||
360 | } | ||
361 | |||
362 | cpu_name = list->cpu_name; | ||
363 | |||
364 | #ifdef MULTI_CPU | ||
365 | processor = *list->proc; | ||
366 | #endif | ||
367 | #ifdef MULTI_TLB | ||
368 | cpu_tlb = *list->tlb; | ||
369 | #endif | ||
370 | #ifdef MULTI_USER | ||
371 | cpu_user = *list->user; | ||
372 | #endif | ||
373 | #ifdef MULTI_CACHE | ||
374 | cpu_cache = *list->cache; | ||
375 | #endif | ||
376 | |||
377 | printk("CPU: %s [%08x] revision %d (ARMv%s), cr=%08lx\n", | ||
378 | cpu_name, read_cpuid_id(), read_cpuid_id() & 15, | ||
379 | proc_arch[cpu_architecture()], cr_alignment); | ||
380 | |||
381 | sprintf(init_utsname()->machine, "%s%c", list->arch_name, ENDIANNESS); | ||
382 | sprintf(elf_platform, "%s%c", list->elf_name, ENDIANNESS); | ||
383 | elf_hwcap = list->elf_hwcap; | ||
384 | #ifndef CONFIG_ARM_THUMB | ||
385 | elf_hwcap &= ~HWCAP_THUMB; | ||
386 | #endif | ||
387 | |||
388 | feat_v6_fixup(); | ||
389 | |||
390 | cacheid_init(); | ||
391 | cpu_proc_init(); | ||
392 | } | ||
393 | |||
394 | /* | 346 | /* |
395 | * cpu_init - initialise one CPU. | 347 | * cpu_init - initialise one CPU. |
396 | * | 348 | * |
@@ -406,6 +358,8 @@ void cpu_init(void) | |||
406 | BUG(); | 358 | BUG(); |
407 | } | 359 | } |
408 | 360 | ||
361 | cpu_proc_init(); | ||
362 | |||
409 | /* | 363 | /* |
410 | * Define the placement constraint for the inline asm directive below. | 364 | * Define the placement constraint for the inline asm directive below. |
411 | * In Thumb-2, msr with an immediate value is not allowed. | 365 | * In Thumb-2, msr with an immediate value is not allowed. |
@@ -442,6 +396,54 @@ void cpu_init(void) | |||
442 | : "r14"); | 396 | : "r14"); |
443 | } | 397 | } |
444 | 398 | ||
399 | static void __init setup_processor(void) | ||
400 | { | ||
401 | struct proc_info_list *list; | ||
402 | |||
403 | /* | ||
404 | * locate processor in the list of supported processor | ||
405 | * types. The linker builds this table for us from the | ||
406 | * entries in arch/arm/mm/proc-*.S | ||
407 | */ | ||
408 | list = lookup_processor_type(read_cpuid_id()); | ||
409 | if (!list) { | ||
410 | printk("CPU configuration botched (ID %08x), unable " | ||
411 | "to continue.\n", read_cpuid_id()); | ||
412 | while (1); | ||
413 | } | ||
414 | |||
415 | cpu_name = list->cpu_name; | ||
416 | |||
417 | #ifdef MULTI_CPU | ||
418 | processor = *list->proc; | ||
419 | #endif | ||
420 | #ifdef MULTI_TLB | ||
421 | cpu_tlb = *list->tlb; | ||
422 | #endif | ||
423 | #ifdef MULTI_USER | ||
424 | cpu_user = *list->user; | ||
425 | #endif | ||
426 | #ifdef MULTI_CACHE | ||
427 | cpu_cache = *list->cache; | ||
428 | #endif | ||
429 | |||
430 | printk("CPU: %s [%08x] revision %d (ARMv%s), cr=%08lx\n", | ||
431 | cpu_name, read_cpuid_id(), read_cpuid_id() & 15, | ||
432 | proc_arch[cpu_architecture()], cr_alignment); | ||
433 | |||
434 | sprintf(init_utsname()->machine, "%s%c", list->arch_name, ENDIANNESS); | ||
435 | sprintf(elf_platform, "%s%c", list->elf_name, ENDIANNESS); | ||
436 | elf_hwcap = list->elf_hwcap; | ||
437 | #ifndef CONFIG_ARM_THUMB | ||
438 | elf_hwcap &= ~HWCAP_THUMB; | ||
439 | #endif | ||
440 | |||
441 | feat_v6_fixup(); | ||
442 | |||
443 | cacheid_init(); | ||
444 | cpu_init(); | ||
445 | } | ||
446 | |||
445 | void __init dump_machine_table(void) | 447 | void __init dump_machine_table(void) |
446 | { | 448 | { |
447 | struct machine_desc *p; | 449 | struct machine_desc *p; |
@@ -915,9 +917,14 @@ void __init setup_arch(char **cmdline_p) | |||
915 | #endif | 917 | #endif |
916 | reserve_crashkernel(); | 918 | reserve_crashkernel(); |
917 | 919 | ||
918 | cpu_init(); | ||
919 | tcm_init(); | 920 | tcm_init(); |
920 | 921 | ||
922 | #ifdef CONFIG_ZONE_DMA | ||
923 | if (mdesc->dma_zone_size) { | ||
924 | extern unsigned long arm_dma_zone_size; | ||
925 | arm_dma_zone_size = mdesc->dma_zone_size; | ||
926 | } | ||
927 | #endif | ||
921 | #ifdef CONFIG_MULTI_IRQ_HANDLER | 928 | #ifdef CONFIG_MULTI_IRQ_HANDLER |
922 | handle_arch_irq = mdesc->handle_irq; | 929 | handle_arch_irq = mdesc->handle_irq; |
923 | #endif | 930 | #endif |
@@ -979,6 +986,10 @@ static const char *hwcap_str[] = { | |||
979 | "neon", | 986 | "neon", |
980 | "vfpv3", | 987 | "vfpv3", |
981 | "vfpv3d16", | 988 | "vfpv3d16", |
989 | "tls", | ||
990 | "vfpv4", | ||
991 | "idiva", | ||
992 | "idivt", | ||
982 | NULL | 993 | NULL |
983 | }; | 994 | }; |
984 | 995 | ||