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-rw-r--r--arch/arm/kernel/entry-armv.S72
1 files changed, 35 insertions, 37 deletions
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index 3d727a8a23bc..d2903e3bc861 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -21,6 +21,7 @@
21#include <mach/entry-macro.S> 21#include <mach/entry-macro.S>
22#include <asm/thread_notify.h> 22#include <asm/thread_notify.h>
23#include <asm/unwind.h> 23#include <asm/unwind.h>
24#include <asm/unistd.h>
24 25
25#include "entry-header.S" 26#include "entry-header.S"
26 27
@@ -272,7 +273,15 @@ __und_svc:
272 @ 273 @
273 @ r0 - instruction 274 @ r0 - instruction
274 @ 275 @
276#ifndef CONFIG_THUMB2_KERNEL
275 ldr r0, [r2, #-4] 277 ldr r0, [r2, #-4]
278#else
279 ldrh r0, [r2, #-2] @ Thumb instruction at LR - 2
280 and r9, r0, #0xf800
281 cmp r9, #0xe800 @ 32-bit instruction if xx >= 0
282 ldrhhs r9, [r2] @ bottom 16 bits
283 orrhs r0, r9, r0, lsl #16
284#endif
276 adr r9, BSYM(1f) 285 adr r9, BSYM(1f)
277 bl call_fpe 286 bl call_fpe
278 287
@@ -303,22 +312,16 @@ __pabt_svc:
303 tst r3, #PSR_I_BIT 312 tst r3, #PSR_I_BIT
304 biceq r9, r9, #PSR_I_BIT 313 biceq r9, r9, #PSR_I_BIT
305 314
306 @
307 @ set args, then call main handler
308 @
309 @ r0 - address of faulting instruction
310 @ r1 - pointer to registers on stack
311 @
312#ifdef MULTI_PABORT
313 mov r0, r2 @ pass address of aborted instruction. 315 mov r0, r2 @ pass address of aborted instruction.
316#ifdef MULTI_PABORT
314 ldr r4, .LCprocfns 317 ldr r4, .LCprocfns
315 mov lr, pc 318 mov lr, pc
316 ldr pc, [r4, #PROCESSOR_PABT_FUNC] 319 ldr pc, [r4, #PROCESSOR_PABT_FUNC]
317#else 320#else
318 CPU_PABORT_HANDLER(r0, r2) 321 bl CPU_PABORT_HANDLER
319#endif 322#endif
320 msr cpsr_c, r9 @ Maybe enable interrupts 323 msr cpsr_c, r9 @ Maybe enable interrupts
321 mov r1, sp @ regs 324 mov r2, sp @ regs
322 bl do_PrefetchAbort @ call abort handler 325 bl do_PrefetchAbort @ call abort handler
323 326
324 @ 327 @
@@ -606,33 +609,33 @@ call_fpe:
606 THUMB( add pc, r8 ) 609 THUMB( add pc, r8 )
607 nop 610 nop
608 611
609 W(mov) pc, lr @ CP#0 612 movw_pc lr @ CP#0
610 W(b) do_fpe @ CP#1 (FPE) 613 W(b) do_fpe @ CP#1 (FPE)
611 W(b) do_fpe @ CP#2 (FPE) 614 W(b) do_fpe @ CP#2 (FPE)
612 W(mov) pc, lr @ CP#3 615 movw_pc lr @ CP#3
613#ifdef CONFIG_CRUNCH 616#ifdef CONFIG_CRUNCH
614 b crunch_task_enable @ CP#4 (MaverickCrunch) 617 b crunch_task_enable @ CP#4 (MaverickCrunch)
615 b crunch_task_enable @ CP#5 (MaverickCrunch) 618 b crunch_task_enable @ CP#5 (MaverickCrunch)
616 b crunch_task_enable @ CP#6 (MaverickCrunch) 619 b crunch_task_enable @ CP#6 (MaverickCrunch)
617#else 620#else
618 W(mov) pc, lr @ CP#4 621 movw_pc lr @ CP#4
619 W(mov) pc, lr @ CP#5 622 movw_pc lr @ CP#5
620 W(mov) pc, lr @ CP#6 623 movw_pc lr @ CP#6
621#endif 624#endif
622 W(mov) pc, lr @ CP#7 625 movw_pc lr @ CP#7
623 W(mov) pc, lr @ CP#8 626 movw_pc lr @ CP#8
624 W(mov) pc, lr @ CP#9 627 movw_pc lr @ CP#9
625#ifdef CONFIG_VFP 628#ifdef CONFIG_VFP
626 W(b) do_vfp @ CP#10 (VFP) 629 W(b) do_vfp @ CP#10 (VFP)
627 W(b) do_vfp @ CP#11 (VFP) 630 W(b) do_vfp @ CP#11 (VFP)
628#else 631#else
629 W(mov) pc, lr @ CP#10 (VFP) 632 movw_pc lr @ CP#10 (VFP)
630 W(mov) pc, lr @ CP#11 (VFP) 633 movw_pc lr @ CP#11 (VFP)
631#endif 634#endif
632 W(mov) pc, lr @ CP#12 635 movw_pc lr @ CP#12
633 W(mov) pc, lr @ CP#13 636 movw_pc lr @ CP#13
634 W(mov) pc, lr @ CP#14 (Debug) 637 movw_pc lr @ CP#14 (Debug)
635 W(mov) pc, lr @ CP#15 (Control) 638 movw_pc lr @ CP#15 (Control)
636 639
637#ifdef CONFIG_NEON 640#ifdef CONFIG_NEON
638 .align 6 641 .align 6
@@ -678,7 +681,9 @@ ENTRY(fp_enter)
678 .word no_fp 681 .word no_fp
679 .previous 682 .previous
680 683
681no_fp: mov pc, lr 684ENTRY(no_fp)
685 mov pc, lr
686ENDPROC(no_fp)
682 687
683__und_usr_unknown: 688__und_usr_unknown:
684 enable_irq 689 enable_irq
@@ -691,16 +696,16 @@ ENDPROC(__und_usr_unknown)
691__pabt_usr: 696__pabt_usr:
692 usr_entry 697 usr_entry
693 698
694#ifdef MULTI_PABORT
695 mov r0, r2 @ pass address of aborted instruction. 699 mov r0, r2 @ pass address of aborted instruction.
700#ifdef MULTI_PABORT
696 ldr r4, .LCprocfns 701 ldr r4, .LCprocfns
697 mov lr, pc 702 mov lr, pc
698 ldr pc, [r4, #PROCESSOR_PABT_FUNC] 703 ldr pc, [r4, #PROCESSOR_PABT_FUNC]
699#else 704#else
700 CPU_PABORT_HANDLER(r0, r2) 705 bl CPU_PABORT_HANDLER
701#endif 706#endif
702 enable_irq @ Enable interrupts 707 enable_irq @ Enable interrupts
703 mov r1, sp @ regs 708 mov r2, sp @ regs
704 bl do_PrefetchAbort @ call abort handler 709 bl do_PrefetchAbort @ call abort handler
705 UNWIND(.fnend ) 710 UNWIND(.fnend )
706 /* fall through */ 711 /* fall through */
@@ -734,13 +739,6 @@ ENTRY(__switch_to)
734#ifdef CONFIG_MMU 739#ifdef CONFIG_MMU
735 ldr r6, [r2, #TI_CPU_DOMAIN] 740 ldr r6, [r2, #TI_CPU_DOMAIN]
736#endif 741#endif
737#if __LINUX_ARM_ARCH__ >= 6
738#ifdef CONFIG_CPU_32v6K
739 clrex
740#else
741 strex r5, r4, [ip] @ Clear exclusive monitor
742#endif
743#endif
744#if defined(CONFIG_HAS_TLS_REG) 742#if defined(CONFIG_HAS_TLS_REG)
745 mcr p15, 0, r3, c13, c0, 3 @ set TLS register 743 mcr p15, 0, r3, c13, c0, 3 @ set TLS register
746#elif !defined(CONFIG_TLS_REG_EMUL) 744#elif !defined(CONFIG_TLS_REG_EMUL)
@@ -911,10 +909,10 @@ __kuser_cmpxchg: @ 0xffff0fc0
911 * A special ghost syscall is used for that (see traps.c). 909 * A special ghost syscall is used for that (see traps.c).
912 */ 910 */
913 stmfd sp!, {r7, lr} 911 stmfd sp!, {r7, lr}
914 mov r7, #0xff00 @ 0xfff0 into r7 for EABI 912 ldr r7, =1f @ it's 20 bits
915 orr r7, r7, #0xf0 913 swi __ARM_NR_cmpxchg
916 swi #0x9ffff0
917 ldmfd sp!, {r7, pc} 914 ldmfd sp!, {r7, pc}
9151: .word __ARM_NR_cmpxchg
918 916
919#elif __LINUX_ARM_ARCH__ < 6 917#elif __LINUX_ARM_ARCH__ < 6
920 918
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-11 13:23:34 -0400