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Diffstat (limited to 'arch/arm/include/asm/io.h')
-rw-r--r--arch/arm/include/asm/io.h33
1 files changed, 17 insertions, 16 deletions
diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index 20e0f7c9e03e..d66605dea55a 100644
--- a/arch/arm/include/asm/io.h
+++ b/arch/arm/include/asm/io.h
@@ -95,6 +95,15 @@ static inline void __iomem *__typesafe_io(unsigned long addr)
95 return (void __iomem *)addr; 95 return (void __iomem *)addr;
96} 96}
97 97
98/* IO barriers */
99#ifdef CONFIG_ARM_DMA_MEM_BUFFERABLE
100#define __iormb() rmb()
101#define __iowmb() wmb()
102#else
103#define __iormb() do { } while (0)
104#define __iowmb() do { } while (0)
105#endif
106
98/* 107/*
99 * Now, pick up the machine-defined IO definitions 108 * Now, pick up the machine-defined IO definitions
100 */ 109 */
@@ -125,17 +134,17 @@ static inline void __iomem *__typesafe_io(unsigned long addr)
125 * The {in,out}[bwl] macros are for emulating x86-style PCI/ISA IO space. 134 * The {in,out}[bwl] macros are for emulating x86-style PCI/ISA IO space.
126 */ 135 */
127#ifdef __io 136#ifdef __io
128#define outb(v,p) __raw_writeb(v,__io(p)) 137#define outb(v,p) ({ __iowmb(); __raw_writeb(v,__io(p)); })
129#define outw(v,p) __raw_writew((__force __u16) \ 138#define outw(v,p) ({ __iowmb(); __raw_writew((__force __u16) \
130 cpu_to_le16(v),__io(p)) 139 cpu_to_le16(v),__io(p)); })
131#define outl(v,p) __raw_writel((__force __u32) \ 140#define outl(v,p) ({ __iowmb(); __raw_writel((__force __u32) \
132 cpu_to_le32(v),__io(p)) 141 cpu_to_le32(v),__io(p)); })
133 142
134#define inb(p) ({ __u8 __v = __raw_readb(__io(p)); __v; }) 143#define inb(p) ({ __u8 __v = __raw_readb(__io(p)); __iormb(); __v; })
135#define inw(p) ({ __u16 __v = le16_to_cpu((__force __le16) \ 144#define inw(p) ({ __u16 __v = le16_to_cpu((__force __le16) \
136 __raw_readw(__io(p))); __v; }) 145 __raw_readw(__io(p))); __iormb(); __v; })
137#define inl(p) ({ __u32 __v = le32_to_cpu((__force __le32) \ 146#define inl(p) ({ __u32 __v = le32_to_cpu((__force __le32) \
138 __raw_readl(__io(p))); __v; }) 147 __raw_readl(__io(p))); __iormb(); __v; })
139 148
140#define outsb(p,d,l) __raw_writesb(__io(p),d,l) 149#define outsb(p,d,l) __raw_writesb(__io(p),d,l)
141#define outsw(p,d,l) __raw_writesw(__io(p),d,l) 150#define outsw(p,d,l) __raw_writesw(__io(p),d,l)
@@ -192,14 +201,6 @@ extern void _memset_io(volatile void __iomem *, int, size_t);
192#define writel_relaxed(v,c) ((void)__raw_writel((__force u32) \ 201#define writel_relaxed(v,c) ((void)__raw_writel((__force u32) \
193 cpu_to_le32(v),__mem_pci(c))) 202 cpu_to_le32(v),__mem_pci(c)))
194 203
195#ifdef CONFIG_ARM_DMA_MEM_BUFFERABLE
196#define __iormb() rmb()
197#define __iowmb() wmb()
198#else
199#define __iormb() do { } while (0)
200#define __iowmb() do { } while (0)
201#endif
202
203#define readb(c) ({ u8 __v = readb_relaxed(c); __iormb(); __v; }) 204#define readb(c) ({ u8 __v = readb_relaxed(c); __iormb(); __v; })
204#define readw(c) ({ u16 __v = readw_relaxed(c); __iormb(); __v; }) 205#define readw(c) ({ u16 __v = readw_relaxed(c); __iormb(); __v; })
205#define readl(c) ({ u32 __v = readl_relaxed(c); __iormb(); __v; }) 206#define readl(c) ({ u32 __v = readl_relaxed(c); __iormb(); __v; })