diff options
Diffstat (limited to 'arch/arm/boot')
41 files changed, 3526 insertions, 688 deletions
diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts b/arch/arm/boot/dts/exynos5250-smdk5250.dts index 399d17b231d2..49945cc1bc7d 100644 --- a/arch/arm/boot/dts/exynos5250-smdk5250.dts +++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts | |||
@@ -23,4 +23,52 @@ | |||
23 | chosen { | 23 | chosen { |
24 | bootargs = "root=/dev/ram0 rw ramdisk=8192 console=ttySAC1,115200"; | 24 | bootargs = "root=/dev/ram0 rw ramdisk=8192 console=ttySAC1,115200"; |
25 | }; | 25 | }; |
26 | |||
27 | i2c@12C60000 { | ||
28 | samsung,i2c-sda-delay = <100>; | ||
29 | samsung,i2c-max-bus-freq = <20000>; | ||
30 | gpios = <&gpb3 0 2 3 0>, | ||
31 | <&gpb3 1 2 3 0>; | ||
32 | |||
33 | eeprom@50 { | ||
34 | compatible = "samsung,s524ad0xd1"; | ||
35 | reg = <0x50>; | ||
36 | }; | ||
37 | }; | ||
38 | |||
39 | i2c@12C70000 { | ||
40 | samsung,i2c-sda-delay = <100>; | ||
41 | samsung,i2c-max-bus-freq = <20000>; | ||
42 | gpios = <&gpb3 2 2 3 0>, | ||
43 | <&gpb3 3 2 3 0>; | ||
44 | |||
45 | eeprom@51 { | ||
46 | compatible = "samsung,s524ad0xd1"; | ||
47 | reg = <0x51>; | ||
48 | }; | ||
49 | }; | ||
50 | |||
51 | i2c@12C80000 { | ||
52 | status = "disabled"; | ||
53 | }; | ||
54 | |||
55 | i2c@12C90000 { | ||
56 | status = "disabled"; | ||
57 | }; | ||
58 | |||
59 | i2c@12CA0000 { | ||
60 | status = "disabled"; | ||
61 | }; | ||
62 | |||
63 | i2c@12CB0000 { | ||
64 | status = "disabled"; | ||
65 | }; | ||
66 | |||
67 | i2c@12CC0000 { | ||
68 | status = "disabled"; | ||
69 | }; | ||
70 | |||
71 | i2c@12CD0000 { | ||
72 | status = "disabled"; | ||
73 | }; | ||
26 | }; | 74 | }; |
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index dfc433599436..5ca0cdb76413 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi | |||
@@ -23,11 +23,11 @@ | |||
23 | compatible = "samsung,exynos5250"; | 23 | compatible = "samsung,exynos5250"; |
24 | interrupt-parent = <&gic>; | 24 | interrupt-parent = <&gic>; |
25 | 25 | ||
26 | gic:interrupt-controller@10490000 { | 26 | gic:interrupt-controller@10481000 { |
27 | compatible = "arm,cortex-a9-gic"; | 27 | compatible = "arm,cortex-a9-gic"; |
28 | #interrupt-cells = <3>; | 28 | #interrupt-cells = <3>; |
29 | interrupt-controller; | 29 | interrupt-controller; |
30 | reg = <0x10490000 0x1000>, <0x10480000 0x100>; | 30 | reg = <0x10481000 0x1000>, <0x10482000 0x2000>; |
31 | }; | 31 | }; |
32 | 32 | ||
33 | watchdog { | 33 | watchdog { |
@@ -42,30 +42,6 @@ | |||
42 | interrupts = <0 43 0>, <0 44 0>; | 42 | interrupts = <0 43 0>, <0 44 0>; |
43 | }; | 43 | }; |
44 | 44 | ||
45 | sdhci@12200000 { | ||
46 | compatible = "samsung,exynos4210-sdhci"; | ||
47 | reg = <0x12200000 0x100>; | ||
48 | interrupts = <0 75 0>; | ||
49 | }; | ||
50 | |||
51 | sdhci@12210000 { | ||
52 | compatible = "samsung,exynos4210-sdhci"; | ||
53 | reg = <0x12210000 0x100>; | ||
54 | interrupts = <0 76 0>; | ||
55 | }; | ||
56 | |||
57 | sdhci@12220000 { | ||
58 | compatible = "samsung,exynos4210-sdhci"; | ||
59 | reg = <0x12220000 0x100>; | ||
60 | interrupts = <0 77 0>; | ||
61 | }; | ||
62 | |||
63 | sdhci@12230000 { | ||
64 | compatible = "samsung,exynos4210-sdhci"; | ||
65 | reg = <0x12230000 0x100>; | ||
66 | interrupts = <0 78 0>; | ||
67 | }; | ||
68 | |||
69 | serial@12C00000 { | 45 | serial@12C00000 { |
70 | compatible = "samsung,exynos4210-uart"; | 46 | compatible = "samsung,exynos4210-uart"; |
71 | reg = <0x12C00000 0x100>; | 47 | reg = <0x12C00000 0x100>; |
@@ -94,48 +70,64 @@ | |||
94 | compatible = "samsung,s3c2440-i2c"; | 70 | compatible = "samsung,s3c2440-i2c"; |
95 | reg = <0x12C60000 0x100>; | 71 | reg = <0x12C60000 0x100>; |
96 | interrupts = <0 56 0>; | 72 | interrupts = <0 56 0>; |
73 | #address-cells = <1>; | ||
74 | #size-cells = <0>; | ||
97 | }; | 75 | }; |
98 | 76 | ||
99 | i2c@12C70000 { | 77 | i2c@12C70000 { |
100 | compatible = "samsung,s3c2440-i2c"; | 78 | compatible = "samsung,s3c2440-i2c"; |
101 | reg = <0x12C70000 0x100>; | 79 | reg = <0x12C70000 0x100>; |
102 | interrupts = <0 57 0>; | 80 | interrupts = <0 57 0>; |
81 | #address-cells = <1>; | ||
82 | #size-cells = <0>; | ||
103 | }; | 83 | }; |
104 | 84 | ||
105 | i2c@12C80000 { | 85 | i2c@12C80000 { |
106 | compatible = "samsung,s3c2440-i2c"; | 86 | compatible = "samsung,s3c2440-i2c"; |
107 | reg = <0x12C80000 0x100>; | 87 | reg = <0x12C80000 0x100>; |
108 | interrupts = <0 58 0>; | 88 | interrupts = <0 58 0>; |
89 | #address-cells = <1>; | ||
90 | #size-cells = <0>; | ||
109 | }; | 91 | }; |
110 | 92 | ||
111 | i2c@12C90000 { | 93 | i2c@12C90000 { |
112 | compatible = "samsung,s3c2440-i2c"; | 94 | compatible = "samsung,s3c2440-i2c"; |
113 | reg = <0x12C90000 0x100>; | 95 | reg = <0x12C90000 0x100>; |
114 | interrupts = <0 59 0>; | 96 | interrupts = <0 59 0>; |
97 | #address-cells = <1>; | ||
98 | #size-cells = <0>; | ||
115 | }; | 99 | }; |
116 | 100 | ||
117 | i2c@12CA0000 { | 101 | i2c@12CA0000 { |
118 | compatible = "samsung,s3c2440-i2c"; | 102 | compatible = "samsung,s3c2440-i2c"; |
119 | reg = <0x12CA0000 0x100>; | 103 | reg = <0x12CA0000 0x100>; |
120 | interrupts = <0 60 0>; | 104 | interrupts = <0 60 0>; |
105 | #address-cells = <1>; | ||
106 | #size-cells = <0>; | ||
121 | }; | 107 | }; |
122 | 108 | ||
123 | i2c@12CB0000 { | 109 | i2c@12CB0000 { |
124 | compatible = "samsung,s3c2440-i2c"; | 110 | compatible = "samsung,s3c2440-i2c"; |
125 | reg = <0x12CB0000 0x100>; | 111 | reg = <0x12CB0000 0x100>; |
126 | interrupts = <0 61 0>; | 112 | interrupts = <0 61 0>; |
113 | #address-cells = <1>; | ||
114 | #size-cells = <0>; | ||
127 | }; | 115 | }; |
128 | 116 | ||
129 | i2c@12CC0000 { | 117 | i2c@12CC0000 { |
130 | compatible = "samsung,s3c2440-i2c"; | 118 | compatible = "samsung,s3c2440-i2c"; |
131 | reg = <0x12CC0000 0x100>; | 119 | reg = <0x12CC0000 0x100>; |
132 | interrupts = <0 62 0>; | 120 | interrupts = <0 62 0>; |
121 | #address-cells = <1>; | ||
122 | #size-cells = <0>; | ||
133 | }; | 123 | }; |
134 | 124 | ||
135 | i2c@12CD0000 { | 125 | i2c@12CD0000 { |
136 | compatible = "samsung,s3c2440-i2c"; | 126 | compatible = "samsung,s3c2440-i2c"; |
137 | reg = <0x12CD0000 0x100>; | 127 | reg = <0x12CD0000 0x100>; |
138 | interrupts = <0 63 0>; | 128 | interrupts = <0 63 0>; |
129 | #address-cells = <1>; | ||
130 | #size-cells = <0>; | ||
139 | }; | 131 | }; |
140 | 132 | ||
141 | amba { | 133 | amba { |
@@ -157,13 +149,13 @@ | |||
157 | interrupts = <0 35 0>; | 149 | interrupts = <0 35 0>; |
158 | }; | 150 | }; |
159 | 151 | ||
160 | mdma0: pdma@10800000 { | 152 | mdma0: mdma@10800000 { |
161 | compatible = "arm,pl330", "arm,primecell"; | 153 | compatible = "arm,pl330", "arm,primecell"; |
162 | reg = <0x10800000 0x1000>; | 154 | reg = <0x10800000 0x1000>; |
163 | interrupts = <0 33 0>; | 155 | interrupts = <0 33 0>; |
164 | }; | 156 | }; |
165 | 157 | ||
166 | mdma1: pdma@11C10000 { | 158 | mdma1: mdma@11C10000 { |
167 | compatible = "arm,pl330", "arm,primecell"; | 159 | compatible = "arm,pl330", "arm,primecell"; |
168 | reg = <0x11C10000 0x1000>; | 160 | reg = <0x11C10000 0x1000>; |
169 | interrupts = <0 124 0>; | 161 | interrupts = <0 124 0>; |
@@ -242,6 +234,12 @@ | |||
242 | #gpio-cells = <4>; | 234 | #gpio-cells = <4>; |
243 | }; | 235 | }; |
244 | 236 | ||
237 | gpc4: gpio-controller@114002E0 { | ||
238 | compatible = "samsung,exynos4-gpio"; | ||
239 | reg = <0x114002E0 0x20>; | ||
240 | #gpio-cells = <4>; | ||
241 | }; | ||
242 | |||
245 | gpd0: gpio-controller@11400160 { | 243 | gpd0: gpio-controller@11400160 { |
246 | compatible = "samsung,exynos4-gpio"; | 244 | compatible = "samsung,exynos4-gpio"; |
247 | reg = <0x11400160 0x20>; | 245 | reg = <0x11400160 0x20>; |
@@ -388,19 +386,19 @@ | |||
388 | 386 | ||
389 | gpv2: gpio-controller@10D10040 { | 387 | gpv2: gpio-controller@10D10040 { |
390 | compatible = "samsung,exynos4-gpio"; | 388 | compatible = "samsung,exynos4-gpio"; |
391 | reg = <0x10D10040 0x20>; | 389 | reg = <0x10D10060 0x20>; |
392 | #gpio-cells = <4>; | 390 | #gpio-cells = <4>; |
393 | }; | 391 | }; |
394 | 392 | ||
395 | gpv3: gpio-controller@10D10060 { | 393 | gpv3: gpio-controller@10D10060 { |
396 | compatible = "samsung,exynos4-gpio"; | 394 | compatible = "samsung,exynos4-gpio"; |
397 | reg = <0x10D10060 0x20>; | 395 | reg = <0x10D10080 0x20>; |
398 | #gpio-cells = <4>; | 396 | #gpio-cells = <4>; |
399 | }; | 397 | }; |
400 | 398 | ||
401 | gpv4: gpio-controller@10D10080 { | 399 | gpv4: gpio-controller@10D10080 { |
402 | compatible = "samsung,exynos4-gpio"; | 400 | compatible = "samsung,exynos4-gpio"; |
403 | reg = <0x10D10080 0x20>; | 401 | reg = <0x10D100C0 0x20>; |
404 | #gpio-cells = <4>; | 402 | #gpio-cells = <4>; |
405 | }; | 403 | }; |
406 | 404 | ||
diff --git a/arch/arm/boot/dts/imx23-evk.dts b/arch/arm/boot/dts/imx23-evk.dts new file mode 100644 index 000000000000..70bffa929b65 --- /dev/null +++ b/arch/arm/boot/dts/imx23-evk.dts | |||
@@ -0,0 +1,43 @@ | |||
1 | /* | ||
2 | * Copyright 2012 Freescale Semiconductor, Inc. | ||
3 | * | ||
4 | * The code contained herein is licensed under the GNU General Public | ||
5 | * License. You may obtain a copy of the GNU General Public License | ||
6 | * Version 2 or later at the following locations: | ||
7 | * | ||
8 | * http://www.opensource.org/licenses/gpl-license.html | ||
9 | * http://www.gnu.org/copyleft/gpl.html | ||
10 | */ | ||
11 | |||
12 | /dts-v1/; | ||
13 | /include/ "imx23.dtsi" | ||
14 | |||
15 | / { | ||
16 | model = "Freescale i.MX23 Evaluation Kit"; | ||
17 | compatible = "fsl,imx23-evk", "fsl,imx23"; | ||
18 | |||
19 | memory { | ||
20 | reg = <0x40000000 0x08000000>; | ||
21 | }; | ||
22 | |||
23 | apb@80000000 { | ||
24 | apbh@80000000 { | ||
25 | ssp0: ssp@80010000 { | ||
26 | compatible = "fsl,imx23-mmc"; | ||
27 | pinctrl-names = "default"; | ||
28 | pinctrl-0 = <&mmc0_8bit_pins_a &mmc0_pins_fixup>; | ||
29 | bus-width = <8>; | ||
30 | wp-gpios = <&gpio1 30 0>; | ||
31 | status = "okay"; | ||
32 | }; | ||
33 | }; | ||
34 | |||
35 | apbx@80040000 { | ||
36 | duart: serial@80070000 { | ||
37 | pinctrl-names = "default"; | ||
38 | pinctrl-0 = <&duart_pins_a>; | ||
39 | status = "okay"; | ||
40 | }; | ||
41 | }; | ||
42 | }; | ||
43 | }; | ||
diff --git a/arch/arm/boot/dts/imx23.dtsi b/arch/arm/boot/dts/imx23.dtsi new file mode 100644 index 000000000000..8c5f9994f3fc --- /dev/null +++ b/arch/arm/boot/dts/imx23.dtsi | |||
@@ -0,0 +1,295 @@ | |||
1 | /* | ||
2 | * Copyright 2012 Freescale Semiconductor, Inc. | ||
3 | * | ||
4 | * The code contained herein is licensed under the GNU General Public | ||
5 | * License. You may obtain a copy of the GNU General Public License | ||
6 | * Version 2 or later at the following locations: | ||
7 | * | ||
8 | * http://www.opensource.org/licenses/gpl-license.html | ||
9 | * http://www.gnu.org/copyleft/gpl.html | ||
10 | */ | ||
11 | |||
12 | /include/ "skeleton.dtsi" | ||
13 | |||
14 | / { | ||
15 | interrupt-parent = <&icoll>; | ||
16 | |||
17 | aliases { | ||
18 | gpio0 = &gpio0; | ||
19 | gpio1 = &gpio1; | ||
20 | gpio2 = &gpio2; | ||
21 | }; | ||
22 | |||
23 | cpus { | ||
24 | cpu@0 { | ||
25 | compatible = "arm,arm926ejs"; | ||
26 | }; | ||
27 | }; | ||
28 | |||
29 | apb@80000000 { | ||
30 | compatible = "simple-bus"; | ||
31 | #address-cells = <1>; | ||
32 | #size-cells = <1>; | ||
33 | reg = <0x80000000 0x80000>; | ||
34 | ranges; | ||
35 | |||
36 | apbh@80000000 { | ||
37 | compatible = "simple-bus"; | ||
38 | #address-cells = <1>; | ||
39 | #size-cells = <1>; | ||
40 | reg = <0x80000000 0x40000>; | ||
41 | ranges; | ||
42 | |||
43 | icoll: interrupt-controller@80000000 { | ||
44 | compatible = "fsl,imx23-icoll", "fsl,mxs-icoll"; | ||
45 | interrupt-controller; | ||
46 | #interrupt-cells = <1>; | ||
47 | reg = <0x80000000 0x2000>; | ||
48 | }; | ||
49 | |||
50 | dma-apbh@80004000 { | ||
51 | compatible = "fsl,imx23-dma-apbh"; | ||
52 | reg = <0x80004000 2000>; | ||
53 | }; | ||
54 | |||
55 | ecc@80008000 { | ||
56 | reg = <0x80008000 2000>; | ||
57 | status = "disabled"; | ||
58 | }; | ||
59 | |||
60 | bch@8000a000 { | ||
61 | reg = <0x8000a000 2000>; | ||
62 | status = "disabled"; | ||
63 | }; | ||
64 | |||
65 | gpmi@8000c000 { | ||
66 | reg = <0x8000c000 2000>; | ||
67 | status = "disabled"; | ||
68 | }; | ||
69 | |||
70 | ssp0: ssp@80010000 { | ||
71 | reg = <0x80010000 2000>; | ||
72 | interrupts = <15 14>; | ||
73 | fsl,ssp-dma-channel = <1>; | ||
74 | status = "disabled"; | ||
75 | }; | ||
76 | |||
77 | etm@80014000 { | ||
78 | reg = <0x80014000 2000>; | ||
79 | status = "disabled"; | ||
80 | }; | ||
81 | |||
82 | pinctrl@80018000 { | ||
83 | #address-cells = <1>; | ||
84 | #size-cells = <0>; | ||
85 | compatible = "fsl,imx23-pinctrl", "simple-bus"; | ||
86 | reg = <0x80018000 2000>; | ||
87 | |||
88 | gpio0: gpio@0 { | ||
89 | compatible = "fsl,imx23-gpio", "fsl,mxs-gpio"; | ||
90 | interrupts = <16>; | ||
91 | gpio-controller; | ||
92 | #gpio-cells = <2>; | ||
93 | interrupt-controller; | ||
94 | #interrupt-cells = <2>; | ||
95 | }; | ||
96 | |||
97 | gpio1: gpio@1 { | ||
98 | compatible = "fsl,imx23-gpio", "fsl,mxs-gpio"; | ||
99 | interrupts = <17>; | ||
100 | gpio-controller; | ||
101 | #gpio-cells = <2>; | ||
102 | interrupt-controller; | ||
103 | #interrupt-cells = <2>; | ||
104 | }; | ||
105 | |||
106 | gpio2: gpio@2 { | ||
107 | compatible = "fsl,imx23-gpio", "fsl,mxs-gpio"; | ||
108 | interrupts = <18>; | ||
109 | gpio-controller; | ||
110 | #gpio-cells = <2>; | ||
111 | interrupt-controller; | ||
112 | #interrupt-cells = <2>; | ||
113 | }; | ||
114 | |||
115 | duart_pins_a: duart@0 { | ||
116 | reg = <0>; | ||
117 | fsl,pinmux-ids = <0x11a2 0x11b2>; | ||
118 | fsl,drive-strength = <0>; | ||
119 | fsl,voltage = <1>; | ||
120 | fsl,pull-up = <0>; | ||
121 | }; | ||
122 | |||
123 | mmc0_8bit_pins_a: mmc0-8bit@0 { | ||
124 | reg = <0>; | ||
125 | fsl,pinmux-ids = <0x2020 0x2030 0x2040 | ||
126 | 0x2050 0x0082 0x0092 0x00a2 | ||
127 | 0x00b2 0x2000 0x2010 0x2060>; | ||
128 | fsl,drive-strength = <1>; | ||
129 | fsl,voltage = <1>; | ||
130 | fsl,pull-up = <1>; | ||
131 | }; | ||
132 | |||
133 | mmc0_pins_fixup: mmc0-pins-fixup { | ||
134 | fsl,pinmux-ids = <0x2010 0x2060>; | ||
135 | fsl,pull-up = <0>; | ||
136 | }; | ||
137 | }; | ||
138 | |||
139 | digctl@8001c000 { | ||
140 | reg = <0x8001c000 2000>; | ||
141 | status = "disabled"; | ||
142 | }; | ||
143 | |||
144 | emi@80020000 { | ||
145 | reg = <0x80020000 2000>; | ||
146 | status = "disabled"; | ||
147 | }; | ||
148 | |||
149 | dma-apbx@80024000 { | ||
150 | compatible = "fsl,imx23-dma-apbx"; | ||
151 | reg = <0x80024000 2000>; | ||
152 | }; | ||
153 | |||
154 | dcp@80028000 { | ||
155 | reg = <0x80028000 2000>; | ||
156 | status = "disabled"; | ||
157 | }; | ||
158 | |||
159 | pxp@8002a000 { | ||
160 | reg = <0x8002a000 2000>; | ||
161 | status = "disabled"; | ||
162 | }; | ||
163 | |||
164 | ocotp@8002c000 { | ||
165 | reg = <0x8002c000 2000>; | ||
166 | status = "disabled"; | ||
167 | }; | ||
168 | |||
169 | axi-ahb@8002e000 { | ||
170 | reg = <0x8002e000 2000>; | ||
171 | status = "disabled"; | ||
172 | }; | ||
173 | |||
174 | lcdif@80030000 { | ||
175 | reg = <0x80030000 2000>; | ||
176 | status = "disabled"; | ||
177 | }; | ||
178 | |||
179 | ssp1: ssp@80034000 { | ||
180 | reg = <0x80034000 2000>; | ||
181 | interrupts = <2 20>; | ||
182 | fsl,ssp-dma-channel = <2>; | ||
183 | status = "disabled"; | ||
184 | }; | ||
185 | |||
186 | tvenc@80038000 { | ||
187 | reg = <0x80038000 2000>; | ||
188 | status = "disabled"; | ||
189 | }; | ||
190 | }; | ||
191 | |||
192 | apbx@80040000 { | ||
193 | compatible = "simple-bus"; | ||
194 | #address-cells = <1>; | ||
195 | #size-cells = <1>; | ||
196 | reg = <0x80040000 0x40000>; | ||
197 | ranges; | ||
198 | |||
199 | clkctl@80040000 { | ||
200 | reg = <0x80040000 2000>; | ||
201 | status = "disabled"; | ||
202 | }; | ||
203 | |||
204 | saif0: saif@80042000 { | ||
205 | reg = <0x80042000 2000>; | ||
206 | status = "disabled"; | ||
207 | }; | ||
208 | |||
209 | power@80044000 { | ||
210 | reg = <0x80044000 2000>; | ||
211 | status = "disabled"; | ||
212 | }; | ||
213 | |||
214 | saif1: saif@80046000 { | ||
215 | reg = <0x80046000 2000>; | ||
216 | status = "disabled"; | ||
217 | }; | ||
218 | |||
219 | audio-out@80048000 { | ||
220 | reg = <0x80048000 2000>; | ||
221 | status = "disabled"; | ||
222 | }; | ||
223 | |||
224 | audio-in@8004c000 { | ||
225 | reg = <0x8004c000 2000>; | ||
226 | status = "disabled"; | ||
227 | }; | ||
228 | |||
229 | lradc@80050000 { | ||
230 | reg = <0x80050000 2000>; | ||
231 | status = "disabled"; | ||
232 | }; | ||
233 | |||
234 | spdif@80054000 { | ||
235 | reg = <0x80054000 2000>; | ||
236 | status = "disabled"; | ||
237 | }; | ||
238 | |||
239 | i2c@80058000 { | ||
240 | reg = <0x80058000 2000>; | ||
241 | status = "disabled"; | ||
242 | }; | ||
243 | |||
244 | rtc@8005c000 { | ||
245 | reg = <0x8005c000 2000>; | ||
246 | status = "disabled"; | ||
247 | }; | ||
248 | |||
249 | pwm@80064000 { | ||
250 | reg = <0x80064000 2000>; | ||
251 | status = "disabled"; | ||
252 | }; | ||
253 | |||
254 | timrot@80068000 { | ||
255 | reg = <0x80068000 2000>; | ||
256 | status = "disabled"; | ||
257 | }; | ||
258 | |||
259 | auart0: serial@8006c000 { | ||
260 | reg = <0x8006c000 0x2000>; | ||
261 | status = "disabled"; | ||
262 | }; | ||
263 | |||
264 | auart1: serial@8006e000 { | ||
265 | reg = <0x8006e000 0x2000>; | ||
266 | status = "disabled"; | ||
267 | }; | ||
268 | |||
269 | duart: serial@80070000 { | ||
270 | compatible = "arm,pl011", "arm,primecell"; | ||
271 | reg = <0x80070000 0x2000>; | ||
272 | interrupts = <0>; | ||
273 | status = "disabled"; | ||
274 | }; | ||
275 | |||
276 | usbphy@8007c000 { | ||
277 | reg = <0x8007c000 0x2000>; | ||
278 | status = "disabled"; | ||
279 | }; | ||
280 | }; | ||
281 | }; | ||
282 | |||
283 | ahb@80080000 { | ||
284 | compatible = "simple-bus"; | ||
285 | #address-cells = <1>; | ||
286 | #size-cells = <1>; | ||
287 | reg = <0x80080000 0x80000>; | ||
288 | ranges; | ||
289 | |||
290 | usbctrl@80080000 { | ||
291 | reg = <0x80080000 0x10000>; | ||
292 | status = "disabled"; | ||
293 | }; | ||
294 | }; | ||
295 | }; | ||
diff --git a/arch/arm/boot/dts/imx27-phytec-phycore.dts b/arch/arm/boot/dts/imx27-phytec-phycore.dts index a51a08fc2af9..2b0ff60247a4 100644 --- a/arch/arm/boot/dts/imx27-phytec-phycore.dts +++ b/arch/arm/boot/dts/imx27-phytec-phycore.dts | |||
@@ -27,22 +27,22 @@ | |||
27 | status = "okay"; | 27 | status = "okay"; |
28 | }; | 28 | }; |
29 | 29 | ||
30 | uart@1000a000 { | 30 | serial@1000a000 { |
31 | fsl,uart-has-rtscts; | 31 | fsl,uart-has-rtscts; |
32 | status = "okay"; | 32 | status = "okay"; |
33 | }; | 33 | }; |
34 | 34 | ||
35 | uart@1000b000 { | 35 | serial@1000b000 { |
36 | fsl,uart-has-rtscts; | 36 | fsl,uart-has-rtscts; |
37 | status = "okay"; | 37 | status = "okay"; |
38 | }; | 38 | }; |
39 | 39 | ||
40 | uart@1000c000 { | 40 | serial@1000c000 { |
41 | fsl,uart-has-rtscts; | 41 | fsl,uart-has-rtscts; |
42 | status = "okay"; | 42 | status = "okay"; |
43 | }; | 43 | }; |
44 | 44 | ||
45 | fec@1002b000 { | 45 | ethernet@1002b000 { |
46 | status = "okay"; | 46 | status = "okay"; |
47 | }; | 47 | }; |
48 | 48 | ||
diff --git a/arch/arm/boot/dts/imx27.dtsi b/arch/arm/boot/dts/imx27.dtsi index bc5e7d5ddd54..2b1a166d41f9 100644 --- a/arch/arm/boot/dts/imx27.dtsi +++ b/arch/arm/boot/dts/imx27.dtsi | |||
@@ -59,28 +59,28 @@ | |||
59 | status = "disabled"; | 59 | status = "disabled"; |
60 | }; | 60 | }; |
61 | 61 | ||
62 | uart1: uart@1000a000 { | 62 | uart1: serial@1000a000 { |
63 | compatible = "fsl,imx27-uart", "fsl,imx21-uart"; | 63 | compatible = "fsl,imx27-uart", "fsl,imx21-uart"; |
64 | reg = <0x1000a000 0x1000>; | 64 | reg = <0x1000a000 0x1000>; |
65 | interrupts = <20>; | 65 | interrupts = <20>; |
66 | status = "disabled"; | 66 | status = "disabled"; |
67 | }; | 67 | }; |
68 | 68 | ||
69 | uart2: uart@1000b000 { | 69 | uart2: serial@1000b000 { |
70 | compatible = "fsl,imx27-uart", "fsl,imx21-uart"; | 70 | compatible = "fsl,imx27-uart", "fsl,imx21-uart"; |
71 | reg = <0x1000b000 0x1000>; | 71 | reg = <0x1000b000 0x1000>; |
72 | interrupts = <19>; | 72 | interrupts = <19>; |
73 | status = "disabled"; | 73 | status = "disabled"; |
74 | }; | 74 | }; |
75 | 75 | ||
76 | uart3: uart@1000c000 { | 76 | uart3: serial@1000c000 { |
77 | compatible = "fsl,imx27-uart", "fsl,imx21-uart"; | 77 | compatible = "fsl,imx27-uart", "fsl,imx21-uart"; |
78 | reg = <0x1000c000 0x1000>; | 78 | reg = <0x1000c000 0x1000>; |
79 | interrupts = <18>; | 79 | interrupts = <18>; |
80 | status = "disabled"; | 80 | status = "disabled"; |
81 | }; | 81 | }; |
82 | 82 | ||
83 | uart4: uart@1000d000 { | 83 | uart4: serial@1000d000 { |
84 | compatible = "fsl,imx27-uart", "fsl,imx21-uart"; | 84 | compatible = "fsl,imx27-uart", "fsl,imx21-uart"; |
85 | reg = <0x1000d000 0x1000>; | 85 | reg = <0x1000d000 0x1000>; |
86 | interrupts = <17>; | 86 | interrupts = <17>; |
@@ -183,14 +183,14 @@ | |||
183 | status = "disabled"; | 183 | status = "disabled"; |
184 | }; | 184 | }; |
185 | 185 | ||
186 | uart5: uart@1001b000 { | 186 | uart5: serial@1001b000 { |
187 | compatible = "fsl,imx27-uart", "fsl,imx21-uart"; | 187 | compatible = "fsl,imx27-uart", "fsl,imx21-uart"; |
188 | reg = <0x1001b000 0x1000>; | 188 | reg = <0x1001b000 0x1000>; |
189 | interrupts = <49>; | 189 | interrupts = <49>; |
190 | status = "disabled"; | 190 | status = "disabled"; |
191 | }; | 191 | }; |
192 | 192 | ||
193 | uart6: uart@1001c000 { | 193 | uart6: serial@1001c000 { |
194 | compatible = "fsl,imx27-uart", "fsl,imx21-uart"; | 194 | compatible = "fsl,imx27-uart", "fsl,imx21-uart"; |
195 | reg = <0x1001c000 0x1000>; | 195 | reg = <0x1001c000 0x1000>; |
196 | interrupts = <48>; | 196 | interrupts = <48>; |
@@ -206,7 +206,7 @@ | |||
206 | status = "disabled"; | 206 | status = "disabled"; |
207 | }; | 207 | }; |
208 | 208 | ||
209 | fec: fec@1002b000 { | 209 | fec: ethernet@1002b000 { |
210 | compatible = "fsl,imx27-fec"; | 210 | compatible = "fsl,imx27-fec"; |
211 | reg = <0x1002b000 0x4000>; | 211 | reg = <0x1002b000 0x4000>; |
212 | interrupts = <50>; | 212 | interrupts = <50>; |
diff --git a/arch/arm/boot/dts/imx28-evk.dts b/arch/arm/boot/dts/imx28-evk.dts new file mode 100644 index 000000000000..ee520a529cb4 --- /dev/null +++ b/arch/arm/boot/dts/imx28-evk.dts | |||
@@ -0,0 +1,114 @@ | |||
1 | /* | ||
2 | * Copyright 2012 Freescale Semiconductor, Inc. | ||
3 | * | ||
4 | * The code contained herein is licensed under the GNU General Public | ||
5 | * License. You may obtain a copy of the GNU General Public License | ||
6 | * Version 2 or later at the following locations: | ||
7 | * | ||
8 | * http://www.opensource.org/licenses/gpl-license.html | ||
9 | * http://www.gnu.org/copyleft/gpl.html | ||
10 | */ | ||
11 | |||
12 | /dts-v1/; | ||
13 | /include/ "imx28.dtsi" | ||
14 | |||
15 | / { | ||
16 | model = "Freescale i.MX28 Evaluation Kit"; | ||
17 | compatible = "fsl,imx28-evk", "fsl,imx28"; | ||
18 | |||
19 | memory { | ||
20 | reg = <0x40000000 0x08000000>; | ||
21 | }; | ||
22 | |||
23 | apb@80000000 { | ||
24 | apbh@80000000 { | ||
25 | ssp0: ssp@80010000 { | ||
26 | compatible = "fsl,imx28-mmc"; | ||
27 | pinctrl-names = "default"; | ||
28 | pinctrl-0 = <&mmc0_8bit_pins_a | ||
29 | &mmc0_cd_cfg &mmc0_sck_cfg>; | ||
30 | bus-width = <8>; | ||
31 | wp-gpios = <&gpio2 12 0>; | ||
32 | status = "okay"; | ||
33 | }; | ||
34 | |||
35 | ssp1: ssp@80012000 { | ||
36 | compatible = "fsl,imx28-mmc"; | ||
37 | bus-width = <8>; | ||
38 | wp-gpios = <&gpio0 28 0>; | ||
39 | status = "okay"; | ||
40 | }; | ||
41 | }; | ||
42 | |||
43 | apbx@80040000 { | ||
44 | saif0: saif@80042000 { | ||
45 | pinctrl-names = "default"; | ||
46 | pinctrl-0 = <&saif0_pins_a>; | ||
47 | status = "okay"; | ||
48 | }; | ||
49 | |||
50 | saif1: saif@80046000 { | ||
51 | pinctrl-names = "default"; | ||
52 | pinctrl-0 = <&saif1_pins_a>; | ||
53 | fsl,saif-master = <&saif0>; | ||
54 | status = "okay"; | ||
55 | }; | ||
56 | |||
57 | i2c0: i2c@80058000 { | ||
58 | pinctrl-names = "default"; | ||
59 | pinctrl-0 = <&i2c0_pins_a>; | ||
60 | status = "okay"; | ||
61 | |||
62 | sgtl5000: codec@0a { | ||
63 | compatible = "fsl,sgtl5000"; | ||
64 | reg = <0x0a>; | ||
65 | VDDA-supply = <®_3p3v>; | ||
66 | VDDIO-supply = <®_3p3v>; | ||
67 | |||
68 | }; | ||
69 | }; | ||
70 | |||
71 | duart: serial@80074000 { | ||
72 | pinctrl-names = "default"; | ||
73 | pinctrl-0 = <&duart_pins_a>; | ||
74 | status = "okay"; | ||
75 | }; | ||
76 | }; | ||
77 | }; | ||
78 | |||
79 | ahb@80080000 { | ||
80 | mac0: ethernet@800f0000 { | ||
81 | phy-mode = "rmii"; | ||
82 | pinctrl-names = "default"; | ||
83 | pinctrl-0 = <&mac0_pins_a>; | ||
84 | status = "okay"; | ||
85 | }; | ||
86 | |||
87 | mac1: ethernet@800f4000 { | ||
88 | phy-mode = "rmii"; | ||
89 | pinctrl-names = "default"; | ||
90 | pinctrl-0 = <&mac1_pins_a>; | ||
91 | status = "okay"; | ||
92 | }; | ||
93 | }; | ||
94 | |||
95 | regulators { | ||
96 | compatible = "simple-bus"; | ||
97 | |||
98 | reg_3p3v: 3p3v { | ||
99 | compatible = "regulator-fixed"; | ||
100 | regulator-name = "3P3V"; | ||
101 | regulator-min-microvolt = <3300000>; | ||
102 | regulator-max-microvolt = <3300000>; | ||
103 | regulator-always-on; | ||
104 | }; | ||
105 | }; | ||
106 | |||
107 | sound { | ||
108 | compatible = "fsl,imx28-evk-sgtl5000", | ||
109 | "fsl,mxs-audio-sgtl5000"; | ||
110 | model = "imx28-evk-sgtl5000"; | ||
111 | saif-controllers = <&saif0 &saif1>; | ||
112 | audio-codec = <&sgtl5000>; | ||
113 | }; | ||
114 | }; | ||
diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi new file mode 100644 index 000000000000..4634cb861a59 --- /dev/null +++ b/arch/arm/boot/dts/imx28.dtsi | |||
@@ -0,0 +1,497 @@ | |||
1 | /* | ||
2 | * Copyright 2012 Freescale Semiconductor, Inc. | ||
3 | * | ||
4 | * The code contained herein is licensed under the GNU General Public | ||
5 | * License. You may obtain a copy of the GNU General Public License | ||
6 | * Version 2 or later at the following locations: | ||
7 | * | ||
8 | * http://www.opensource.org/licenses/gpl-license.html | ||
9 | * http://www.gnu.org/copyleft/gpl.html | ||
10 | */ | ||
11 | |||
12 | /include/ "skeleton.dtsi" | ||
13 | |||
14 | / { | ||
15 | interrupt-parent = <&icoll>; | ||
16 | |||
17 | aliases { | ||
18 | gpio0 = &gpio0; | ||
19 | gpio1 = &gpio1; | ||
20 | gpio2 = &gpio2; | ||
21 | gpio3 = &gpio3; | ||
22 | gpio4 = &gpio4; | ||
23 | saif0 = &saif0; | ||
24 | saif1 = &saif1; | ||
25 | }; | ||
26 | |||
27 | cpus { | ||
28 | cpu@0 { | ||
29 | compatible = "arm,arm926ejs"; | ||
30 | }; | ||
31 | }; | ||
32 | |||
33 | apb@80000000 { | ||
34 | compatible = "simple-bus"; | ||
35 | #address-cells = <1>; | ||
36 | #size-cells = <1>; | ||
37 | reg = <0x80000000 0x80000>; | ||
38 | ranges; | ||
39 | |||
40 | apbh@80000000 { | ||
41 | compatible = "simple-bus"; | ||
42 | #address-cells = <1>; | ||
43 | #size-cells = <1>; | ||
44 | reg = <0x80000000 0x3c900>; | ||
45 | ranges; | ||
46 | |||
47 | icoll: interrupt-controller@80000000 { | ||
48 | compatible = "fsl,imx28-icoll", "fsl,mxs-icoll"; | ||
49 | interrupt-controller; | ||
50 | #interrupt-cells = <1>; | ||
51 | reg = <0x80000000 0x2000>; | ||
52 | }; | ||
53 | |||
54 | hsadc@80002000 { | ||
55 | reg = <0x80002000 2000>; | ||
56 | interrupts = <13 87>; | ||
57 | status = "disabled"; | ||
58 | }; | ||
59 | |||
60 | dma-apbh@80004000 { | ||
61 | compatible = "fsl,imx28-dma-apbh"; | ||
62 | reg = <0x80004000 2000>; | ||
63 | }; | ||
64 | |||
65 | perfmon@80006000 { | ||
66 | reg = <0x80006000 800>; | ||
67 | interrupts = <27>; | ||
68 | status = "disabled"; | ||
69 | }; | ||
70 | |||
71 | bch@8000a000 { | ||
72 | reg = <0x8000a000 2000>; | ||
73 | interrupts = <41>; | ||
74 | status = "disabled"; | ||
75 | }; | ||
76 | |||
77 | gpmi@8000c000 { | ||
78 | reg = <0x8000c000 2000>; | ||
79 | interrupts = <42 88>; | ||
80 | status = "disabled"; | ||
81 | }; | ||
82 | |||
83 | ssp0: ssp@80010000 { | ||
84 | reg = <0x80010000 2000>; | ||
85 | interrupts = <96 82>; | ||
86 | fsl,ssp-dma-channel = <0>; | ||
87 | status = "disabled"; | ||
88 | }; | ||
89 | |||
90 | ssp1: ssp@80012000 { | ||
91 | reg = <0x80012000 2000>; | ||
92 | interrupts = <97 83>; | ||
93 | fsl,ssp-dma-channel = <1>; | ||
94 | status = "disabled"; | ||
95 | }; | ||
96 | |||
97 | ssp2: ssp@80014000 { | ||
98 | reg = <0x80014000 2000>; | ||
99 | interrupts = <98 84>; | ||
100 | fsl,ssp-dma-channel = <2>; | ||
101 | status = "disabled"; | ||
102 | }; | ||
103 | |||
104 | ssp3: ssp@80016000 { | ||
105 | reg = <0x80016000 2000>; | ||
106 | interrupts = <99 85>; | ||
107 | fsl,ssp-dma-channel = <3>; | ||
108 | status = "disabled"; | ||
109 | }; | ||
110 | |||
111 | pinctrl@80018000 { | ||
112 | #address-cells = <1>; | ||
113 | #size-cells = <0>; | ||
114 | compatible = "fsl,imx28-pinctrl", "simple-bus"; | ||
115 | reg = <0x80018000 2000>; | ||
116 | |||
117 | gpio0: gpio@0 { | ||
118 | compatible = "fsl,imx28-gpio", "fsl,mxs-gpio"; | ||
119 | interrupts = <127>; | ||
120 | gpio-controller; | ||
121 | #gpio-cells = <2>; | ||
122 | interrupt-controller; | ||
123 | #interrupt-cells = <2>; | ||
124 | }; | ||
125 | |||
126 | gpio1: gpio@1 { | ||
127 | compatible = "fsl,imx28-gpio", "fsl,mxs-gpio"; | ||
128 | interrupts = <126>; | ||
129 | gpio-controller; | ||
130 | #gpio-cells = <2>; | ||
131 | interrupt-controller; | ||
132 | #interrupt-cells = <2>; | ||
133 | }; | ||
134 | |||
135 | gpio2: gpio@2 { | ||
136 | compatible = "fsl,imx28-gpio", "fsl,mxs-gpio"; | ||
137 | interrupts = <125>; | ||
138 | gpio-controller; | ||
139 | #gpio-cells = <2>; | ||
140 | interrupt-controller; | ||
141 | #interrupt-cells = <2>; | ||
142 | }; | ||
143 | |||
144 | gpio3: gpio@3 { | ||
145 | compatible = "fsl,imx28-gpio", "fsl,mxs-gpio"; | ||
146 | interrupts = <124>; | ||
147 | gpio-controller; | ||
148 | #gpio-cells = <2>; | ||
149 | interrupt-controller; | ||
150 | #interrupt-cells = <2>; | ||
151 | }; | ||
152 | |||
153 | gpio4: gpio@4 { | ||
154 | compatible = "fsl,imx28-gpio", "fsl,mxs-gpio"; | ||
155 | interrupts = <123>; | ||
156 | gpio-controller; | ||
157 | #gpio-cells = <2>; | ||
158 | interrupt-controller; | ||
159 | #interrupt-cells = <2>; | ||
160 | }; | ||
161 | |||
162 | duart_pins_a: duart@0 { | ||
163 | reg = <0>; | ||
164 | fsl,pinmux-ids = <0x3102 0x3112>; | ||
165 | fsl,drive-strength = <0>; | ||
166 | fsl,voltage = <1>; | ||
167 | fsl,pull-up = <0>; | ||
168 | }; | ||
169 | |||
170 | mac0_pins_a: mac0@0 { | ||
171 | reg = <0>; | ||
172 | fsl,pinmux-ids = <0x4000 0x4010 0x4020 | ||
173 | 0x4030 0x4040 0x4060 0x4070 | ||
174 | 0x4080 0x4100>; | ||
175 | fsl,drive-strength = <1>; | ||
176 | fsl,voltage = <1>; | ||
177 | fsl,pull-up = <1>; | ||
178 | }; | ||
179 | |||
180 | mac1_pins_a: mac1@0 { | ||
181 | reg = <0>; | ||
182 | fsl,pinmux-ids = <0x40f1 0x4091 0x40a1 | ||
183 | 0x40e1 0x40b1 0x40c1>; | ||
184 | fsl,drive-strength = <1>; | ||
185 | fsl,voltage = <1>; | ||
186 | fsl,pull-up = <1>; | ||
187 | }; | ||
188 | |||
189 | mmc0_8bit_pins_a: mmc0-8bit@0 { | ||
190 | reg = <0>; | ||
191 | fsl,pinmux-ids = <0x2000 0x2010 0x2020 | ||
192 | 0x2030 0x2040 0x2050 0x2060 | ||
193 | 0x2070 0x2080 0x2090 0x20a0>; | ||
194 | fsl,drive-strength = <1>; | ||
195 | fsl,voltage = <1>; | ||
196 | fsl,pull-up = <1>; | ||
197 | }; | ||
198 | |||
199 | mmc0_cd_cfg: mmc0-cd-cfg { | ||
200 | fsl,pinmux-ids = <0x2090>; | ||
201 | fsl,pull-up = <0>; | ||
202 | }; | ||
203 | |||
204 | mmc0_sck_cfg: mmc0-sck-cfg { | ||
205 | fsl,pinmux-ids = <0x20a0>; | ||
206 | fsl,drive-strength = <2>; | ||
207 | fsl,pull-up = <0>; | ||
208 | }; | ||
209 | |||
210 | i2c0_pins_a: i2c0@0 { | ||
211 | reg = <0>; | ||
212 | fsl,pinmux-ids = <0x3180 0x3190>; | ||
213 | fsl,drive-strength = <1>; | ||
214 | fsl,voltage = <1>; | ||
215 | fsl,pull-up = <1>; | ||
216 | }; | ||
217 | |||
218 | saif0_pins_a: saif0@0 { | ||
219 | reg = <0>; | ||
220 | fsl,pinmux-ids = | ||
221 | <0x3140 0x3150 0x3160 0x3170>; | ||
222 | fsl,drive-strength = <2>; | ||
223 | fsl,voltage = <1>; | ||
224 | fsl,pull-up = <1>; | ||
225 | }; | ||
226 | |||
227 | saif1_pins_a: saif1@0 { | ||
228 | reg = <0>; | ||
229 | fsl,pinmux-ids = <0x31a0>; | ||
230 | fsl,drive-strength = <2>; | ||
231 | fsl,voltage = <1>; | ||
232 | fsl,pull-up = <1>; | ||
233 | }; | ||
234 | }; | ||
235 | |||
236 | digctl@8001c000 { | ||
237 | reg = <0x8001c000 2000>; | ||
238 | interrupts = <89>; | ||
239 | status = "disabled"; | ||
240 | }; | ||
241 | |||
242 | etm@80022000 { | ||
243 | reg = <0x80022000 2000>; | ||
244 | status = "disabled"; | ||
245 | }; | ||
246 | |||
247 | dma-apbx@80024000 { | ||
248 | compatible = "fsl,imx28-dma-apbx"; | ||
249 | reg = <0x80024000 2000>; | ||
250 | }; | ||
251 | |||
252 | dcp@80028000 { | ||
253 | reg = <0x80028000 2000>; | ||
254 | interrupts = <52 53 54>; | ||
255 | status = "disabled"; | ||
256 | }; | ||
257 | |||
258 | pxp@8002a000 { | ||
259 | reg = <0x8002a000 2000>; | ||
260 | interrupts = <39>; | ||
261 | status = "disabled"; | ||
262 | }; | ||
263 | |||
264 | ocotp@8002c000 { | ||
265 | reg = <0x8002c000 2000>; | ||
266 | status = "disabled"; | ||
267 | }; | ||
268 | |||
269 | axi-ahb@8002e000 { | ||
270 | reg = <0x8002e000 2000>; | ||
271 | status = "disabled"; | ||
272 | }; | ||
273 | |||
274 | lcdif@80030000 { | ||
275 | reg = <0x80030000 2000>; | ||
276 | interrupts = <38 86>; | ||
277 | status = "disabled"; | ||
278 | }; | ||
279 | |||
280 | can0: can@80032000 { | ||
281 | reg = <0x80032000 2000>; | ||
282 | interrupts = <8>; | ||
283 | status = "disabled"; | ||
284 | }; | ||
285 | |||
286 | can1: can@80034000 { | ||
287 | reg = <0x80034000 2000>; | ||
288 | interrupts = <9>; | ||
289 | status = "disabled"; | ||
290 | }; | ||
291 | |||
292 | simdbg@8003c000 { | ||
293 | reg = <0x8003c000 200>; | ||
294 | status = "disabled"; | ||
295 | }; | ||
296 | |||
297 | simgpmisel@8003c200 { | ||
298 | reg = <0x8003c200 100>; | ||
299 | status = "disabled"; | ||
300 | }; | ||
301 | |||
302 | simsspsel@8003c300 { | ||
303 | reg = <0x8003c300 100>; | ||
304 | status = "disabled"; | ||
305 | }; | ||
306 | |||
307 | simmemsel@8003c400 { | ||
308 | reg = <0x8003c400 100>; | ||
309 | status = "disabled"; | ||
310 | }; | ||
311 | |||
312 | gpiomon@8003c500 { | ||
313 | reg = <0x8003c500 100>; | ||
314 | status = "disabled"; | ||
315 | }; | ||
316 | |||
317 | simenet@8003c700 { | ||
318 | reg = <0x8003c700 100>; | ||
319 | status = "disabled"; | ||
320 | }; | ||
321 | |||
322 | armjtag@8003c800 { | ||
323 | reg = <0x8003c800 100>; | ||
324 | status = "disabled"; | ||
325 | }; | ||
326 | }; | ||
327 | |||
328 | apbx@80040000 { | ||
329 | compatible = "simple-bus"; | ||
330 | #address-cells = <1>; | ||
331 | #size-cells = <1>; | ||
332 | reg = <0x80040000 0x40000>; | ||
333 | ranges; | ||
334 | |||
335 | clkctl@80040000 { | ||
336 | reg = <0x80040000 2000>; | ||
337 | status = "disabled"; | ||
338 | }; | ||
339 | |||
340 | saif0: saif@80042000 { | ||
341 | compatible = "fsl,imx28-saif"; | ||
342 | reg = <0x80042000 2000>; | ||
343 | interrupts = <59 80>; | ||
344 | fsl,saif-dma-channel = <4>; | ||
345 | status = "disabled"; | ||
346 | }; | ||
347 | |||
348 | power@80044000 { | ||
349 | reg = <0x80044000 2000>; | ||
350 | status = "disabled"; | ||
351 | }; | ||
352 | |||
353 | saif1: saif@80046000 { | ||
354 | compatible = "fsl,imx28-saif"; | ||
355 | reg = <0x80046000 2000>; | ||
356 | interrupts = <58 81>; | ||
357 | fsl,saif-dma-channel = <5>; | ||
358 | status = "disabled"; | ||
359 | }; | ||
360 | |||
361 | lradc@80050000 { | ||
362 | reg = <0x80050000 2000>; | ||
363 | status = "disabled"; | ||
364 | }; | ||
365 | |||
366 | spdif@80054000 { | ||
367 | reg = <0x80054000 2000>; | ||
368 | interrupts = <45 66>; | ||
369 | status = "disabled"; | ||
370 | }; | ||
371 | |||
372 | rtc@80056000 { | ||
373 | reg = <0x80056000 2000>; | ||
374 | interrupts = <28 29>; | ||
375 | status = "disabled"; | ||
376 | }; | ||
377 | |||
378 | i2c0: i2c@80058000 { | ||
379 | #address-cells = <1>; | ||
380 | #size-cells = <0>; | ||
381 | compatible = "fsl,imx28-i2c"; | ||
382 | reg = <0x80058000 2000>; | ||
383 | interrupts = <111 68>; | ||
384 | status = "disabled"; | ||
385 | }; | ||
386 | |||
387 | i2c1: i2c@8005a000 { | ||
388 | #address-cells = <1>; | ||
389 | #size-cells = <0>; | ||
390 | compatible = "fsl,imx28-i2c"; | ||
391 | reg = <0x8005a000 2000>; | ||
392 | interrupts = <110 69>; | ||
393 | status = "disabled"; | ||
394 | }; | ||
395 | |||
396 | pwm@80064000 { | ||
397 | reg = <0x80064000 2000>; | ||
398 | status = "disabled"; | ||
399 | }; | ||
400 | |||
401 | timrot@80068000 { | ||
402 | reg = <0x80068000 2000>; | ||
403 | status = "disabled"; | ||
404 | }; | ||
405 | |||
406 | auart0: serial@8006a000 { | ||
407 | reg = <0x8006a000 0x2000>; | ||
408 | interrupts = <112 70 71>; | ||
409 | status = "disabled"; | ||
410 | }; | ||
411 | |||
412 | auart1: serial@8006c000 { | ||
413 | reg = <0x8006c000 0x2000>; | ||
414 | interrupts = <113 72 73>; | ||
415 | status = "disabled"; | ||
416 | }; | ||
417 | |||
418 | auart2: serial@8006e000 { | ||
419 | reg = <0x8006e000 0x2000>; | ||
420 | interrupts = <114 74 75>; | ||
421 | status = "disabled"; | ||
422 | }; | ||
423 | |||
424 | auart3: serial@80070000 { | ||
425 | reg = <0x80070000 0x2000>; | ||
426 | interrupts = <115 76 77>; | ||
427 | status = "disabled"; | ||
428 | }; | ||
429 | |||
430 | auart4: serial@80072000 { | ||
431 | reg = <0x80072000 0x2000>; | ||
432 | interrupts = <116 78 79>; | ||
433 | status = "disabled"; | ||
434 | }; | ||
435 | |||
436 | duart: serial@80074000 { | ||
437 | compatible = "arm,pl011", "arm,primecell"; | ||
438 | reg = <0x80074000 0x1000>; | ||
439 | interrupts = <47>; | ||
440 | status = "disabled"; | ||
441 | }; | ||
442 | |||
443 | usbphy0: usbphy@8007c000 { | ||
444 | reg = <0x8007c000 0x2000>; | ||
445 | status = "disabled"; | ||
446 | }; | ||
447 | |||
448 | usbphy1: usbphy@8007e000 { | ||
449 | reg = <0x8007e000 0x2000>; | ||
450 | status = "disabled"; | ||
451 | }; | ||
452 | }; | ||
453 | }; | ||
454 | |||
455 | ahb@80080000 { | ||
456 | compatible = "simple-bus"; | ||
457 | #address-cells = <1>; | ||
458 | #size-cells = <1>; | ||
459 | reg = <0x80080000 0x80000>; | ||
460 | ranges; | ||
461 | |||
462 | usbctrl0: usbctrl@80080000 { | ||
463 | reg = <0x80080000 0x10000>; | ||
464 | status = "disabled"; | ||
465 | }; | ||
466 | |||
467 | usbctrl1: usbctrl@80090000 { | ||
468 | reg = <0x80090000 0x10000>; | ||
469 | status = "disabled"; | ||
470 | }; | ||
471 | |||
472 | dflpt@800c0000 { | ||
473 | reg = <0x800c0000 0x10000>; | ||
474 | status = "disabled"; | ||
475 | }; | ||
476 | |||
477 | mac0: ethernet@800f0000 { | ||
478 | compatible = "fsl,imx28-fec"; | ||
479 | reg = <0x800f0000 0x4000>; | ||
480 | interrupts = <101>; | ||
481 | status = "disabled"; | ||
482 | }; | ||
483 | |||
484 | mac1: ethernet@800f4000 { | ||
485 | compatible = "fsl,imx28-fec"; | ||
486 | reg = <0x800f4000 0x4000>; | ||
487 | interrupts = <102>; | ||
488 | status = "disabled"; | ||
489 | }; | ||
490 | |||
491 | switch@800f8000 { | ||
492 | reg = <0x800f8000 0x8000>; | ||
493 | status = "disabled"; | ||
494 | }; | ||
495 | |||
496 | }; | ||
497 | }; | ||
diff --git a/arch/arm/boot/dts/imx51-babbage.dts b/arch/arm/boot/dts/imx51-babbage.dts index 9949e6060dee..de065b5976e6 100644 --- a/arch/arm/boot/dts/imx51-babbage.dts +++ b/arch/arm/boot/dts/imx51-babbage.dts | |||
@@ -17,10 +17,6 @@ | |||
17 | model = "Freescale i.MX51 Babbage Board"; | 17 | model = "Freescale i.MX51 Babbage Board"; |
18 | compatible = "fsl,imx51-babbage", "fsl,imx51"; | 18 | compatible = "fsl,imx51-babbage", "fsl,imx51"; |
19 | 19 | ||
20 | chosen { | ||
21 | bootargs = "console=ttymxc0,115200 root=/dev/mmcblk0p3 rootwait"; | ||
22 | }; | ||
23 | |||
24 | memory { | 20 | memory { |
25 | reg = <0x90000000 0x20000000>; | 21 | reg = <0x90000000 0x20000000>; |
26 | }; | 22 | }; |
@@ -40,7 +36,7 @@ | |||
40 | status = "okay"; | 36 | status = "okay"; |
41 | }; | 37 | }; |
42 | 38 | ||
43 | uart3: uart@7000c000 { | 39 | uart3: serial@7000c000 { |
44 | fsl,uart-has-rtscts; | 40 | fsl,uart-has-rtscts; |
45 | status = "okay"; | 41 | status = "okay"; |
46 | }; | 42 | }; |
@@ -166,6 +162,11 @@ | |||
166 | }; | 162 | }; |
167 | }; | 163 | }; |
168 | }; | 164 | }; |
165 | |||
166 | ssi2: ssi@70014000 { | ||
167 | fsl,mode = "i2s-slave"; | ||
168 | status = "okay"; | ||
169 | }; | ||
169 | }; | 170 | }; |
170 | 171 | ||
171 | wdog@73f98000 { /* WDOG1 */ | 172 | wdog@73f98000 { /* WDOG1 */ |
@@ -177,12 +178,12 @@ | |||
177 | reg = <0x73fa8000 0x4000>; | 178 | reg = <0x73fa8000 0x4000>; |
178 | }; | 179 | }; |
179 | 180 | ||
180 | uart1: uart@73fbc000 { | 181 | uart1: serial@73fbc000 { |
181 | fsl,uart-has-rtscts; | 182 | fsl,uart-has-rtscts; |
182 | status = "okay"; | 183 | status = "okay"; |
183 | }; | 184 | }; |
184 | 185 | ||
185 | uart2: uart@73fc0000 { | 186 | uart2: serial@73fc0000 { |
186 | status = "okay"; | 187 | status = "okay"; |
187 | }; | 188 | }; |
188 | }; | 189 | }; |
@@ -195,13 +196,20 @@ | |||
195 | i2c@83fc4000 { /* I2C2 */ | 196 | i2c@83fc4000 { /* I2C2 */ |
196 | status = "okay"; | 197 | status = "okay"; |
197 | 198 | ||
198 | codec: sgtl5000@0a { | 199 | sgtl5000: codec@0a { |
199 | compatible = "fsl,sgtl5000"; | 200 | compatible = "fsl,sgtl5000"; |
200 | reg = <0x0a>; | 201 | reg = <0x0a>; |
202 | clock-frequency = <26000000>; | ||
203 | VDDA-supply = <&vdig_reg>; | ||
204 | VDDIO-supply = <&vvideo_reg>; | ||
201 | }; | 205 | }; |
202 | }; | 206 | }; |
203 | 207 | ||
204 | fec@83fec000 { | 208 | audmux@83fd0000 { |
209 | status = "okay"; | ||
210 | }; | ||
211 | |||
212 | ethernet@83fec000 { | ||
205 | phy-mode = "mii"; | 213 | phy-mode = "mii"; |
206 | status = "okay"; | 214 | status = "okay"; |
207 | }; | 215 | }; |
@@ -218,4 +226,18 @@ | |||
218 | gpio-key,wakeup; | 226 | gpio-key,wakeup; |
219 | }; | 227 | }; |
220 | }; | 228 | }; |
229 | |||
230 | sound { | ||
231 | compatible = "fsl,imx51-babbage-sgtl5000", | ||
232 | "fsl,imx-audio-sgtl5000"; | ||
233 | model = "imx51-babbage-sgtl5000"; | ||
234 | ssi-controller = <&ssi2>; | ||
235 | audio-codec = <&sgtl5000>; | ||
236 | audio-routing = | ||
237 | "MIC_IN", "Mic Jack", | ||
238 | "Mic Jack", "Mic Bias", | ||
239 | "Headphone Jack", "HP_OUT"; | ||
240 | mux-int-port = <2>; | ||
241 | mux-ext-port = <3>; | ||
242 | }; | ||
221 | }; | 243 | }; |
diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi index 6663986fe1c8..bfa65abe8ef2 100644 --- a/arch/arm/boot/dts/imx51.dtsi +++ b/arch/arm/boot/dts/imx51.dtsi | |||
@@ -86,7 +86,7 @@ | |||
86 | status = "disabled"; | 86 | status = "disabled"; |
87 | }; | 87 | }; |
88 | 88 | ||
89 | uart3: uart@7000c000 { | 89 | uart3: serial@7000c000 { |
90 | compatible = "fsl,imx51-uart", "fsl,imx21-uart"; | 90 | compatible = "fsl,imx51-uart", "fsl,imx21-uart"; |
91 | reg = <0x7000c000 0x4000>; | 91 | reg = <0x7000c000 0x4000>; |
92 | interrupts = <33>; | 92 | interrupts = <33>; |
@@ -102,6 +102,15 @@ | |||
102 | status = "disabled"; | 102 | status = "disabled"; |
103 | }; | 103 | }; |
104 | 104 | ||
105 | ssi2: ssi@70014000 { | ||
106 | compatible = "fsl,imx51-ssi", "fsl,imx21-ssi"; | ||
107 | reg = <0x70014000 0x4000>; | ||
108 | interrupts = <30>; | ||
109 | fsl,fifo-depth = <15>; | ||
110 | fsl,ssi-dma-events = <25 24 23 22>; /* TX0 RX0 TX1 RX1 */ | ||
111 | status = "disabled"; | ||
112 | }; | ||
113 | |||
105 | esdhc@70020000 { /* ESDHC3 */ | 114 | esdhc@70020000 { /* ESDHC3 */ |
106 | compatible = "fsl,imx51-esdhc"; | 115 | compatible = "fsl,imx51-esdhc"; |
107 | reg = <0x70020000 0x4000>; | 116 | reg = <0x70020000 0x4000>; |
@@ -171,14 +180,14 @@ | |||
171 | status = "disabled"; | 180 | status = "disabled"; |
172 | }; | 181 | }; |
173 | 182 | ||
174 | uart1: uart@73fbc000 { | 183 | uart1: serial@73fbc000 { |
175 | compatible = "fsl,imx51-uart", "fsl,imx21-uart"; | 184 | compatible = "fsl,imx51-uart", "fsl,imx21-uart"; |
176 | reg = <0x73fbc000 0x4000>; | 185 | reg = <0x73fbc000 0x4000>; |
177 | interrupts = <31>; | 186 | interrupts = <31>; |
178 | status = "disabled"; | 187 | status = "disabled"; |
179 | }; | 188 | }; |
180 | 189 | ||
181 | uart2: uart@73fc0000 { | 190 | uart2: serial@73fc0000 { |
182 | compatible = "fsl,imx51-uart", "fsl,imx21-uart"; | 191 | compatible = "fsl,imx51-uart", "fsl,imx21-uart"; |
183 | reg = <0x73fc0000 0x4000>; | 192 | reg = <0x73fc0000 0x4000>; |
184 | interrupts = <32>; | 193 | interrupts = <32>; |
@@ -235,7 +244,31 @@ | |||
235 | status = "disabled"; | 244 | status = "disabled"; |
236 | }; | 245 | }; |
237 | 246 | ||
238 | fec@83fec000 { | 247 | ssi1: ssi@83fcc000 { |
248 | compatible = "fsl,imx51-ssi", "fsl,imx21-ssi"; | ||
249 | reg = <0x83fcc000 0x4000>; | ||
250 | interrupts = <29>; | ||
251 | fsl,fifo-depth = <15>; | ||
252 | fsl,ssi-dma-events = <29 28 27 26>; /* TX0 RX0 TX1 RX1 */ | ||
253 | status = "disabled"; | ||
254 | }; | ||
255 | |||
256 | audmux@83fd0000 { | ||
257 | compatible = "fsl,imx51-audmux", "fsl,imx31-audmux"; | ||
258 | reg = <0x83fd0000 0x4000>; | ||
259 | status = "disabled"; | ||
260 | }; | ||
261 | |||
262 | ssi3: ssi@83fe8000 { | ||
263 | compatible = "fsl,imx51-ssi", "fsl,imx21-ssi"; | ||
264 | reg = <0x83fe8000 0x4000>; | ||
265 | interrupts = <96>; | ||
266 | fsl,fifo-depth = <15>; | ||
267 | fsl,ssi-dma-events = <47 46 37 35>; /* TX0 RX0 TX1 RX1 */ | ||
268 | status = "disabled"; | ||
269 | }; | ||
270 | |||
271 | ethernet@83fec000 { | ||
239 | compatible = "fsl,imx51-fec", "fsl,imx27-fec"; | 272 | compatible = "fsl,imx51-fec", "fsl,imx27-fec"; |
240 | reg = <0x83fec000 0x4000>; | 273 | reg = <0x83fec000 0x4000>; |
241 | interrupts = <87>; | 274 | interrupts = <87>; |
diff --git a/arch/arm/boot/dts/imx53-ard.dts b/arch/arm/boot/dts/imx53-ard.dts index 2dccce46ed81..5b8eafcdbeec 100644 --- a/arch/arm/boot/dts/imx53-ard.dts +++ b/arch/arm/boot/dts/imx53-ard.dts | |||
@@ -17,10 +17,6 @@ | |||
17 | model = "Freescale i.MX53 Automotive Reference Design Board"; | 17 | model = "Freescale i.MX53 Automotive Reference Design Board"; |
18 | compatible = "fsl,imx53-ard", "fsl,imx53"; | 18 | compatible = "fsl,imx53-ard", "fsl,imx53"; |
19 | 19 | ||
20 | chosen { | ||
21 | bootargs = "console=ttymxc0,115200 root=/dev/mmcblk0p3 rootwait"; | ||
22 | }; | ||
23 | |||
24 | memory { | 20 | memory { |
25 | reg = <0x70000000 0x40000000>; | 21 | reg = <0x70000000 0x40000000>; |
26 | }; | 22 | }; |
@@ -44,7 +40,7 @@ | |||
44 | reg = <0x53fa8000 0x4000>; | 40 | reg = <0x53fa8000 0x4000>; |
45 | }; | 41 | }; |
46 | 42 | ||
47 | uart1: uart@53fbc000 { | 43 | uart1: serial@53fbc000 { |
48 | status = "okay"; | 44 | status = "okay"; |
49 | }; | 45 | }; |
50 | }; | 46 | }; |
diff --git a/arch/arm/boot/dts/imx53-evk.dts b/arch/arm/boot/dts/imx53-evk.dts index 5bac4aa4800b..9c798034675e 100644 --- a/arch/arm/boot/dts/imx53-evk.dts +++ b/arch/arm/boot/dts/imx53-evk.dts | |||
@@ -17,10 +17,6 @@ | |||
17 | model = "Freescale i.MX53 Evaluation Kit"; | 17 | model = "Freescale i.MX53 Evaluation Kit"; |
18 | compatible = "fsl,imx53-evk", "fsl,imx53"; | 18 | compatible = "fsl,imx53-evk", "fsl,imx53"; |
19 | 19 | ||
20 | chosen { | ||
21 | bootargs = "console=ttymxc0,115200 root=/dev/mmcblk0p3 rootwait"; | ||
22 | }; | ||
23 | |||
24 | memory { | 20 | memory { |
25 | reg = <0x70000000 0x80000000>; | 21 | reg = <0x70000000 0x80000000>; |
26 | }; | 22 | }; |
@@ -75,7 +71,7 @@ | |||
75 | reg = <0x53fa8000 0x4000>; | 71 | reg = <0x53fa8000 0x4000>; |
76 | }; | 72 | }; |
77 | 73 | ||
78 | uart1: uart@53fbc000 { | 74 | uart1: serial@53fbc000 { |
79 | status = "okay"; | 75 | status = "okay"; |
80 | }; | 76 | }; |
81 | }; | 77 | }; |
@@ -99,7 +95,7 @@ | |||
99 | }; | 95 | }; |
100 | }; | 96 | }; |
101 | 97 | ||
102 | fec@63fec000 { | 98 | ethernet@63fec000 { |
103 | phy-mode = "rmii"; | 99 | phy-mode = "rmii"; |
104 | phy-reset-gpios = <&gpio7 6 0>; | 100 | phy-reset-gpios = <&gpio7 6 0>; |
105 | status = "okay"; | 101 | status = "okay"; |
diff --git a/arch/arm/boot/dts/imx53-qsb.dts b/arch/arm/boot/dts/imx53-qsb.dts index 5c57c8672c36..2d803a9a6949 100644 --- a/arch/arm/boot/dts/imx53-qsb.dts +++ b/arch/arm/boot/dts/imx53-qsb.dts | |||
@@ -17,10 +17,6 @@ | |||
17 | model = "Freescale i.MX53 Quick Start Board"; | 17 | model = "Freescale i.MX53 Quick Start Board"; |
18 | compatible = "fsl,imx53-qsb", "fsl,imx53"; | 18 | compatible = "fsl,imx53-qsb", "fsl,imx53"; |
19 | 19 | ||
20 | chosen { | ||
21 | bootargs = "console=ttymxc0,115200 root=/dev/mmcblk0p3 rootwait"; | ||
22 | }; | ||
23 | |||
24 | memory { | 20 | memory { |
25 | reg = <0x70000000 0x40000000>; | 21 | reg = <0x70000000 0x40000000>; |
26 | }; | 22 | }; |
@@ -33,6 +29,11 @@ | |||
33 | status = "okay"; | 29 | status = "okay"; |
34 | }; | 30 | }; |
35 | 31 | ||
32 | ssi2: ssi@50014000 { | ||
33 | fsl,mode = "i2s-slave"; | ||
34 | status = "okay"; | ||
35 | }; | ||
36 | |||
36 | esdhc@50020000 { /* ESDHC3 */ | 37 | esdhc@50020000 { /* ESDHC3 */ |
37 | cd-gpios = <&gpio3 11 0>; | 38 | cd-gpios = <&gpio3 11 0>; |
38 | wp-gpios = <&gpio3 12 0>; | 39 | wp-gpios = <&gpio3 12 0>; |
@@ -49,7 +50,7 @@ | |||
49 | reg = <0x53fa8000 0x4000>; | 50 | reg = <0x53fa8000 0x4000>; |
50 | }; | 51 | }; |
51 | 52 | ||
52 | uart1: uart@53fbc000 { | 53 | uart1: serial@53fbc000 { |
53 | status = "okay"; | 54 | status = "okay"; |
54 | }; | 55 | }; |
55 | }; | 56 | }; |
@@ -62,9 +63,11 @@ | |||
62 | i2c@63fc4000 { /* I2C2 */ | 63 | i2c@63fc4000 { /* I2C2 */ |
63 | status = "okay"; | 64 | status = "okay"; |
64 | 65 | ||
65 | codec: sgtl5000@0a { | 66 | sgtl5000: codec@0a { |
66 | compatible = "fsl,sgtl5000"; | 67 | compatible = "fsl,sgtl5000"; |
67 | reg = <0x0a>; | 68 | reg = <0x0a>; |
69 | VDDA-supply = <®_3p2v>; | ||
70 | VDDIO-supply = <®_3p2v>; | ||
68 | }; | 71 | }; |
69 | }; | 72 | }; |
70 | 73 | ||
@@ -77,12 +80,88 @@ | |||
77 | }; | 80 | }; |
78 | 81 | ||
79 | pmic: dialog@48 { | 82 | pmic: dialog@48 { |
80 | compatible = "dialog,da9053", "dialog,da9052"; | 83 | compatible = "dlg,da9053-aa", "dlg,da9052"; |
81 | reg = <0x48>; | 84 | reg = <0x48>; |
85 | |||
86 | regulators { | ||
87 | buck0 { | ||
88 | regulator-min-microvolt = <500000>; | ||
89 | regulator-max-microvolt = <2075000>; | ||
90 | }; | ||
91 | |||
92 | buck1 { | ||
93 | regulator-min-microvolt = <500000>; | ||
94 | regulator-max-microvolt = <2075000>; | ||
95 | }; | ||
96 | |||
97 | buck2 { | ||
98 | regulator-min-microvolt = <925000>; | ||
99 | regulator-max-microvolt = <2500000>; | ||
100 | }; | ||
101 | |||
102 | buck3 { | ||
103 | regulator-min-microvolt = <925000>; | ||
104 | regulator-max-microvolt = <2500000>; | ||
105 | }; | ||
106 | |||
107 | ldo4 { | ||
108 | regulator-min-microvolt = <600000>; | ||
109 | regulator-max-microvolt = <1800000>; | ||
110 | }; | ||
111 | |||
112 | ldo5 { | ||
113 | regulator-min-microvolt = <600000>; | ||
114 | regulator-max-microvolt = <1800000>; | ||
115 | }; | ||
116 | |||
117 | ldo6 { | ||
118 | regulator-min-microvolt = <1725000>; | ||
119 | regulator-max-microvolt = <3300000>; | ||
120 | }; | ||
121 | |||
122 | ldo7 { | ||
123 | regulator-min-microvolt = <1725000>; | ||
124 | regulator-max-microvolt = <3300000>; | ||
125 | }; | ||
126 | |||
127 | ldo8 { | ||
128 | regulator-min-microvolt = <1200000>; | ||
129 | regulator-max-microvolt = <3600000>; | ||
130 | }; | ||
131 | |||
132 | ldo9 { | ||
133 | regulator-min-microvolt = <1200000>; | ||
134 | regulator-max-microvolt = <3600000>; | ||
135 | }; | ||
136 | |||
137 | ldo10 { | ||
138 | regulator-min-microvolt = <1200000>; | ||
139 | regulator-max-microvolt = <3600000>; | ||
140 | }; | ||
141 | |||
142 | ldo11 { | ||
143 | regulator-min-microvolt = <1200000>; | ||
144 | regulator-max-microvolt = <3600000>; | ||
145 | }; | ||
146 | |||
147 | ldo12 { | ||
148 | regulator-min-microvolt = <1250000>; | ||
149 | regulator-max-microvolt = <3650000>; | ||
150 | }; | ||
151 | |||
152 | ldo13 { | ||
153 | regulator-min-microvolt = <1200000>; | ||
154 | regulator-max-microvolt = <3600000>; | ||
155 | }; | ||
156 | }; | ||
82 | }; | 157 | }; |
83 | }; | 158 | }; |
84 | 159 | ||
85 | fec@63fec000 { | 160 | audmux@63fd0000 { |
161 | status = "okay"; | ||
162 | }; | ||
163 | |||
164 | ethernet@63fec000 { | ||
86 | phy-mode = "rmii"; | 165 | phy-mode = "rmii"; |
87 | phy-reset-gpios = <&gpio7 6 0>; | 166 | phy-reset-gpios = <&gpio7 6 0>; |
88 | status = "okay"; | 167 | status = "okay"; |
@@ -122,4 +201,30 @@ | |||
122 | linux,default-trigger = "heartbeat"; | 201 | linux,default-trigger = "heartbeat"; |
123 | }; | 202 | }; |
124 | }; | 203 | }; |
204 | |||
205 | regulators { | ||
206 | compatible = "simple-bus"; | ||
207 | |||
208 | reg_3p2v: 3p2v { | ||
209 | compatible = "regulator-fixed"; | ||
210 | regulator-name = "3P2V"; | ||
211 | regulator-min-microvolt = <3200000>; | ||
212 | regulator-max-microvolt = <3200000>; | ||
213 | regulator-always-on; | ||
214 | }; | ||
215 | }; | ||
216 | |||
217 | sound { | ||
218 | compatible = "fsl,imx53-qsb-sgtl5000", | ||
219 | "fsl,imx-audio-sgtl5000"; | ||
220 | model = "imx53-qsb-sgtl5000"; | ||
221 | ssi-controller = <&ssi2>; | ||
222 | audio-codec = <&sgtl5000>; | ||
223 | audio-routing = | ||
224 | "MIC_IN", "Mic Jack", | ||
225 | "Mic Jack", "Mic Bias", | ||
226 | "Headphone Jack", "HP_OUT"; | ||
227 | mux-int-port = <2>; | ||
228 | mux-ext-port = <5>; | ||
229 | }; | ||
125 | }; | 230 | }; |
diff --git a/arch/arm/boot/dts/imx53-smd.dts b/arch/arm/boot/dts/imx53-smd.dts index c7ee86c2dfb5..08091029168e 100644 --- a/arch/arm/boot/dts/imx53-smd.dts +++ b/arch/arm/boot/dts/imx53-smd.dts | |||
@@ -17,10 +17,6 @@ | |||
17 | model = "Freescale i.MX53 Smart Mobile Reference Design Board"; | 17 | model = "Freescale i.MX53 Smart Mobile Reference Design Board"; |
18 | compatible = "fsl,imx53-smd", "fsl,imx53"; | 18 | compatible = "fsl,imx53-smd", "fsl,imx53"; |
19 | 19 | ||
20 | chosen { | ||
21 | bootargs = "console=ttymxc0,115200 root=/dev/mmcblk0p3 rootwait"; | ||
22 | }; | ||
23 | |||
24 | memory { | 20 | memory { |
25 | reg = <0x70000000 0x40000000>; | 21 | reg = <0x70000000 0x40000000>; |
26 | }; | 22 | }; |
@@ -35,11 +31,11 @@ | |||
35 | }; | 31 | }; |
36 | 32 | ||
37 | esdhc@50008000 { /* ESDHC2 */ | 33 | esdhc@50008000 { /* ESDHC2 */ |
38 | fsl,card-wired; | 34 | non-removable; |
39 | status = "okay"; | 35 | status = "okay"; |
40 | }; | 36 | }; |
41 | 37 | ||
42 | uart3: uart@5000c000 { | 38 | uart3: serial@5000c000 { |
43 | fsl,uart-has-rtscts; | 39 | fsl,uart-has-rtscts; |
44 | status = "okay"; | 40 | status = "okay"; |
45 | }; | 41 | }; |
@@ -76,7 +72,7 @@ | |||
76 | }; | 72 | }; |
77 | 73 | ||
78 | esdhc@50020000 { /* ESDHC3 */ | 74 | esdhc@50020000 { /* ESDHC3 */ |
79 | fsl,card-wired; | 75 | non-removable; |
80 | status = "okay"; | 76 | status = "okay"; |
81 | }; | 77 | }; |
82 | }; | 78 | }; |
@@ -90,11 +86,11 @@ | |||
90 | reg = <0x53fa8000 0x4000>; | 86 | reg = <0x53fa8000 0x4000>; |
91 | }; | 87 | }; |
92 | 88 | ||
93 | uart1: uart@53fbc000 { | 89 | uart1: serial@53fbc000 { |
94 | status = "okay"; | 90 | status = "okay"; |
95 | }; | 91 | }; |
96 | 92 | ||
97 | uart2: uart@53fc0000 { | 93 | uart2: serial@53fc0000 { |
98 | status = "okay"; | 94 | status = "okay"; |
99 | }; | 95 | }; |
100 | }; | 96 | }; |
@@ -142,7 +138,7 @@ | |||
142 | }; | 138 | }; |
143 | }; | 139 | }; |
144 | 140 | ||
145 | fec@63fec000 { | 141 | ethernet@63fec000 { |
146 | phy-mode = "rmii"; | 142 | phy-mode = "rmii"; |
147 | phy-reset-gpios = <&gpio7 6 0>; | 143 | phy-reset-gpios = <&gpio7 6 0>; |
148 | status = "okay"; | 144 | status = "okay"; |
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi index 5dd91b942c91..e3e869470cd3 100644 --- a/arch/arm/boot/dts/imx53.dtsi +++ b/arch/arm/boot/dts/imx53.dtsi | |||
@@ -88,7 +88,7 @@ | |||
88 | status = "disabled"; | 88 | status = "disabled"; |
89 | }; | 89 | }; |
90 | 90 | ||
91 | uart3: uart@5000c000 { | 91 | uart3: serial@5000c000 { |
92 | compatible = "fsl,imx53-uart", "fsl,imx21-uart"; | 92 | compatible = "fsl,imx53-uart", "fsl,imx21-uart"; |
93 | reg = <0x5000c000 0x4000>; | 93 | reg = <0x5000c000 0x4000>; |
94 | interrupts = <33>; | 94 | interrupts = <33>; |
@@ -104,6 +104,15 @@ | |||
104 | status = "disabled"; | 104 | status = "disabled"; |
105 | }; | 105 | }; |
106 | 106 | ||
107 | ssi2: ssi@50014000 { | ||
108 | compatible = "fsl,imx53-ssi", "fsl,imx21-ssi"; | ||
109 | reg = <0x50014000 0x4000>; | ||
110 | interrupts = <30>; | ||
111 | fsl,fifo-depth = <15>; | ||
112 | fsl,ssi-dma-events = <25 24 23 22>; /* TX0 RX0 TX1 RX1 */ | ||
113 | status = "disabled"; | ||
114 | }; | ||
115 | |||
107 | esdhc@50020000 { /* ESDHC3 */ | 116 | esdhc@50020000 { /* ESDHC3 */ |
108 | compatible = "fsl,imx53-esdhc"; | 117 | compatible = "fsl,imx53-esdhc"; |
109 | reg = <0x50020000 0x4000>; | 118 | reg = <0x50020000 0x4000>; |
@@ -173,14 +182,14 @@ | |||
173 | status = "disabled"; | 182 | status = "disabled"; |
174 | }; | 183 | }; |
175 | 184 | ||
176 | uart1: uart@53fbc000 { | 185 | uart1: serial@53fbc000 { |
177 | compatible = "fsl,imx53-uart", "fsl,imx21-uart"; | 186 | compatible = "fsl,imx53-uart", "fsl,imx21-uart"; |
178 | reg = <0x53fbc000 0x4000>; | 187 | reg = <0x53fbc000 0x4000>; |
179 | interrupts = <31>; | 188 | interrupts = <31>; |
180 | status = "disabled"; | 189 | status = "disabled"; |
181 | }; | 190 | }; |
182 | 191 | ||
183 | uart2: uart@53fc0000 { | 192 | uart2: serial@53fc0000 { |
184 | compatible = "fsl,imx53-uart", "fsl,imx21-uart"; | 193 | compatible = "fsl,imx53-uart", "fsl,imx21-uart"; |
185 | reg = <0x53fc0000 0x4000>; | 194 | reg = <0x53fc0000 0x4000>; |
186 | interrupts = <32>; | 195 | interrupts = <32>; |
@@ -226,7 +235,7 @@ | |||
226 | status = "disabled"; | 235 | status = "disabled"; |
227 | }; | 236 | }; |
228 | 237 | ||
229 | uart4: uart@53ff0000 { | 238 | uart4: serial@53ff0000 { |
230 | compatible = "fsl,imx53-uart", "fsl,imx21-uart"; | 239 | compatible = "fsl,imx53-uart", "fsl,imx21-uart"; |
231 | reg = <0x53ff0000 0x4000>; | 240 | reg = <0x53ff0000 0x4000>; |
232 | interrupts = <13>; | 241 | interrupts = <13>; |
@@ -241,7 +250,7 @@ | |||
241 | reg = <0x60000000 0x10000000>; | 250 | reg = <0x60000000 0x10000000>; |
242 | ranges; | 251 | ranges; |
243 | 252 | ||
244 | uart5: uart@63f90000 { | 253 | uart5: serial@63f90000 { |
245 | compatible = "fsl,imx53-uart", "fsl,imx21-uart"; | 254 | compatible = "fsl,imx53-uart", "fsl,imx21-uart"; |
246 | reg = <0x63f90000 0x4000>; | 255 | reg = <0x63f90000 0x4000>; |
247 | interrupts = <86>; | 256 | interrupts = <86>; |
@@ -290,7 +299,31 @@ | |||
290 | status = "disabled"; | 299 | status = "disabled"; |
291 | }; | 300 | }; |
292 | 301 | ||
293 | fec@63fec000 { | 302 | ssi1: ssi@63fcc000 { |
303 | compatible = "fsl,imx53-ssi", "fsl,imx21-ssi"; | ||
304 | reg = <0x63fcc000 0x4000>; | ||
305 | interrupts = <29>; | ||
306 | fsl,fifo-depth = <15>; | ||
307 | fsl,ssi-dma-events = <29 28 27 26>; /* TX0 RX0 TX1 RX1 */ | ||
308 | status = "disabled"; | ||
309 | }; | ||
310 | |||
311 | audmux@63fd0000 { | ||
312 | compatible = "fsl,imx53-audmux", "fsl,imx31-audmux"; | ||
313 | reg = <0x63fd0000 0x4000>; | ||
314 | status = "disabled"; | ||
315 | }; | ||
316 | |||
317 | ssi3: ssi@63fe8000 { | ||
318 | compatible = "fsl,imx53-ssi", "fsl,imx21-ssi"; | ||
319 | reg = <0x63fe8000 0x4000>; | ||
320 | interrupts = <96>; | ||
321 | fsl,fifo-depth = <15>; | ||
322 | fsl,ssi-dma-events = <47 46 45 44>; /* TX0 RX0 TX1 RX1 */ | ||
323 | status = "disabled"; | ||
324 | }; | ||
325 | |||
326 | ethernet@63fec000 { | ||
294 | compatible = "fsl,imx53-fec", "fsl,imx25-fec"; | 327 | compatible = "fsl,imx53-fec", "fsl,imx25-fec"; |
295 | reg = <0x63fec000 0x4000>; | 328 | reg = <0x63fec000 0x4000>; |
296 | interrupts = <87>; | 329 | interrupts = <87>; |
diff --git a/arch/arm/boot/dts/imx6q-arm2.dts b/arch/arm/boot/dts/imx6q-arm2.dts index ce1c8238c897..db4c6096c562 100644 --- a/arch/arm/boot/dts/imx6q-arm2.dts +++ b/arch/arm/boot/dts/imx6q-arm2.dts | |||
@@ -17,19 +17,14 @@ | |||
17 | model = "Freescale i.MX6 Quad Armadillo2 Board"; | 17 | model = "Freescale i.MX6 Quad Armadillo2 Board"; |
18 | compatible = "fsl,imx6q-arm2", "fsl,imx6q"; | 18 | compatible = "fsl,imx6q-arm2", "fsl,imx6q"; |
19 | 19 | ||
20 | chosen { | ||
21 | bootargs = "console=ttymxc0,115200 root=/dev/mmcblk3p3 rootwait"; | ||
22 | }; | ||
23 | |||
24 | memory { | 20 | memory { |
25 | reg = <0x10000000 0x80000000>; | 21 | reg = <0x10000000 0x80000000>; |
26 | }; | 22 | }; |
27 | 23 | ||
28 | soc { | 24 | soc { |
29 | aips-bus@02100000 { /* AIPS2 */ | 25 | aips-bus@02100000 { /* AIPS2 */ |
30 | enet@02188000 { | 26 | ethernet@02188000 { |
31 | phy-mode = "rgmii"; | 27 | phy-mode = "rgmii"; |
32 | local-mac-address = [00 04 9F 01 1B 61]; | ||
33 | status = "okay"; | 28 | status = "okay"; |
34 | }; | 29 | }; |
35 | 30 | ||
@@ -37,16 +32,20 @@ | |||
37 | cd-gpios = <&gpio6 11 0>; | 32 | cd-gpios = <&gpio6 11 0>; |
38 | wp-gpios = <&gpio6 14 0>; | 33 | wp-gpios = <&gpio6 14 0>; |
39 | vmmc-supply = <®_3p3v>; | 34 | vmmc-supply = <®_3p3v>; |
35 | pinctrl-names = "default"; | ||
36 | pinctrl-0 = <&pinctrl_usdhc3_1>; | ||
40 | status = "okay"; | 37 | status = "okay"; |
41 | }; | 38 | }; |
42 | 39 | ||
43 | usdhc@0219c000 { /* uSDHC4 */ | 40 | usdhc@0219c000 { /* uSDHC4 */ |
44 | fsl,card-wired; | 41 | non-removable; |
45 | vmmc-supply = <®_3p3v>; | 42 | vmmc-supply = <®_3p3v>; |
43 | pinctrl-names = "default"; | ||
44 | pinctrl-0 = <&pinctrl_usdhc4_1>; | ||
46 | status = "okay"; | 45 | status = "okay"; |
47 | }; | 46 | }; |
48 | 47 | ||
49 | uart4: uart@021f0000 { | 48 | uart4: serial@021f0000 { |
50 | status = "okay"; | 49 | status = "okay"; |
51 | }; | 50 | }; |
52 | }; | 51 | }; |
diff --git a/arch/arm/boot/dts/imx6q-sabrelite.dts b/arch/arm/boot/dts/imx6q-sabrelite.dts index 4663a4e5a285..e0ec92973e7e 100644 --- a/arch/arm/boot/dts/imx6q-sabrelite.dts +++ b/arch/arm/boot/dts/imx6q-sabrelite.dts | |||
@@ -22,8 +22,30 @@ | |||
22 | }; | 22 | }; |
23 | 23 | ||
24 | soc { | 24 | soc { |
25 | aips-bus@02000000 { /* AIPS1 */ | ||
26 | spba-bus@02000000 { | ||
27 | ecspi@02008000 { /* eCSPI1 */ | ||
28 | fsl,spi-num-chipselects = <1>; | ||
29 | cs-gpios = <&gpio3 19 0>; | ||
30 | status = "okay"; | ||
31 | |||
32 | flash: m25p80@0 { | ||
33 | compatible = "sst,sst25vf016b"; | ||
34 | spi-max-frequency = <20000000>; | ||
35 | reg = <0>; | ||
36 | }; | ||
37 | }; | ||
38 | |||
39 | ssi1: ssi@02028000 { | ||
40 | fsl,mode = "i2s-slave"; | ||
41 | status = "okay"; | ||
42 | }; | ||
43 | }; | ||
44 | |||
45 | }; | ||
46 | |||
25 | aips-bus@02100000 { /* AIPS2 */ | 47 | aips-bus@02100000 { /* AIPS2 */ |
26 | enet@02188000 { | 48 | ethernet@02188000 { |
27 | phy-mode = "rgmii"; | 49 | phy-mode = "rgmii"; |
28 | phy-reset-gpios = <&gpio3 23 0>; | 50 | phy-reset-gpios = <&gpio3 23 0>; |
29 | status = "okay"; | 51 | status = "okay"; |
@@ -43,13 +65,23 @@ | |||
43 | status = "okay"; | 65 | status = "okay"; |
44 | }; | 66 | }; |
45 | 67 | ||
46 | uart2: uart@021e8000 { | 68 | audmux@021d8000 { |
69 | status = "okay"; | ||
70 | pinctrl-names = "default"; | ||
71 | pinctrl-0 = <&pinctrl_audmux_1>; | ||
72 | }; | ||
73 | |||
74 | uart2: serial@021e8000 { | ||
47 | status = "okay"; | 75 | status = "okay"; |
76 | pinctrl-names = "default"; | ||
77 | pinctrl-0 = <&pinctrl_serial2_1>; | ||
48 | }; | 78 | }; |
49 | 79 | ||
50 | i2c@021a0000 { /* I2C1 */ | 80 | i2c@021a0000 { /* I2C1 */ |
51 | status = "okay"; | 81 | status = "okay"; |
52 | clock-frequency = <100000>; | 82 | clock-frequency = <100000>; |
83 | pinctrl-names = "default"; | ||
84 | pinctrl-0 = <&pinctrl_i2c1_1>; | ||
53 | 85 | ||
54 | codec: sgtl5000@0a { | 86 | codec: sgtl5000@0a { |
55 | compatible = "fsl,sgtl5000"; | 87 | compatible = "fsl,sgtl5000"; |
@@ -80,4 +112,18 @@ | |||
80 | regulator-always-on; | 112 | regulator-always-on; |
81 | }; | 113 | }; |
82 | }; | 114 | }; |
115 | |||
116 | sound { | ||
117 | compatible = "fsl,imx6q-sabrelite-sgtl5000", | ||
118 | "fsl,imx-audio-sgtl5000"; | ||
119 | model = "imx6q-sabrelite-sgtl5000"; | ||
120 | ssi-controller = <&ssi1>; | ||
121 | audio-codec = <&codec>; | ||
122 | audio-routing = | ||
123 | "MIC_IN", "Mic Jack", | ||
124 | "Mic Jack", "Mic Bias", | ||
125 | "Headphone Jack", "HP_OUT"; | ||
126 | mux-int-port = <1>; | ||
127 | mux-ext-port = <4>; | ||
128 | }; | ||
83 | }; | 129 | }; |
diff --git a/arch/arm/boot/dts/imx6q-sabresd.dts b/arch/arm/boot/dts/imx6q-sabresd.dts new file mode 100644 index 000000000000..07509a181178 --- /dev/null +++ b/arch/arm/boot/dts/imx6q-sabresd.dts | |||
@@ -0,0 +1,53 @@ | |||
1 | /* | ||
2 | * Copyright 2012 Freescale Semiconductor, Inc. | ||
3 | * Copyright 2011 Linaro Ltd. | ||
4 | * | ||
5 | * The code contained herein is licensed under the GNU General Public | ||
6 | * License. You may obtain a copy of the GNU General Public License | ||
7 | * Version 2 or later at the following locations: | ||
8 | * | ||
9 | * http://www.opensource.org/licenses/gpl-license.html | ||
10 | * http://www.gnu.org/copyleft/gpl.html | ||
11 | */ | ||
12 | |||
13 | /dts-v1/; | ||
14 | /include/ "imx6q.dtsi" | ||
15 | |||
16 | / { | ||
17 | model = "Freescale i.MX6Q SABRE Smart Device Board"; | ||
18 | compatible = "fsl,imx6q-sabresd", "fsl,imx6q"; | ||
19 | |||
20 | memory { | ||
21 | reg = <0x10000000 0x40000000>; | ||
22 | }; | ||
23 | |||
24 | soc { | ||
25 | |||
26 | aips-bus@02000000 { /* AIPS1 */ | ||
27 | spba-bus@02000000 { | ||
28 | uart1: serial@02020000 { | ||
29 | status = "okay"; | ||
30 | }; | ||
31 | }; | ||
32 | }; | ||
33 | |||
34 | aips-bus@02100000 { /* AIPS2 */ | ||
35 | ethernet@02188000 { | ||
36 | phy-mode = "rgmii"; | ||
37 | status = "okay"; | ||
38 | }; | ||
39 | |||
40 | usdhc@02194000 { /* uSDHC2 */ | ||
41 | cd-gpios = <&gpio2 2 0>; | ||
42 | wp-gpios = <&gpio2 3 0>; | ||
43 | status = "okay"; | ||
44 | }; | ||
45 | |||
46 | usdhc@02198000 { /* uSDHC3 */ | ||
47 | cd-gpios = <&gpio2 0 0>; | ||
48 | wp-gpios = <&gpio2 1 0>; | ||
49 | status = "okay"; | ||
50 | }; | ||
51 | }; | ||
52 | }; | ||
53 | }; | ||
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index 4905f51a106f..8c90cbac945f 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi | |||
@@ -165,7 +165,7 @@ | |||
165 | status = "disabled"; | 165 | status = "disabled"; |
166 | }; | 166 | }; |
167 | 167 | ||
168 | uart1: uart@02020000 { | 168 | uart1: serial@02020000 { |
169 | compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; | 169 | compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; |
170 | reg = <0x02020000 0x4000>; | 170 | reg = <0x02020000 0x4000>; |
171 | interrupts = <0 26 0x04>; | 171 | interrupts = <0 26 0x04>; |
@@ -177,19 +177,31 @@ | |||
177 | interrupts = <0 51 0x04>; | 177 | interrupts = <0 51 0x04>; |
178 | }; | 178 | }; |
179 | 179 | ||
180 | ssi@02028000 { /* SSI1 */ | 180 | ssi1: ssi@02028000 { |
181 | compatible = "fsl,imx6q-ssi","fsl,imx21-ssi"; | ||
181 | reg = <0x02028000 0x4000>; | 182 | reg = <0x02028000 0x4000>; |
182 | interrupts = <0 46 0x04>; | 183 | interrupts = <0 46 0x04>; |
184 | fsl,fifo-depth = <15>; | ||
185 | fsl,ssi-dma-events = <38 37>; | ||
186 | status = "disabled"; | ||
183 | }; | 187 | }; |
184 | 188 | ||
185 | ssi@0202c000 { /* SSI2 */ | 189 | ssi2: ssi@0202c000 { |
190 | compatible = "fsl,imx6q-ssi","fsl,imx21-ssi"; | ||
186 | reg = <0x0202c000 0x4000>; | 191 | reg = <0x0202c000 0x4000>; |
187 | interrupts = <0 47 0x04>; | 192 | interrupts = <0 47 0x04>; |
193 | fsl,fifo-depth = <15>; | ||
194 | fsl,ssi-dma-events = <42 41>; | ||
195 | status = "disabled"; | ||
188 | }; | 196 | }; |
189 | 197 | ||
190 | ssi@02030000 { /* SSI3 */ | 198 | ssi3: ssi@02030000 { |
199 | compatible = "fsl,imx6q-ssi","fsl,imx21-ssi"; | ||
191 | reg = <0x02030000 0x4000>; | 200 | reg = <0x02030000 0x4000>; |
192 | interrupts = <0 48 0x04>; | 201 | interrupts = <0 48 0x04>; |
202 | fsl,fifo-depth = <15>; | ||
203 | fsl,ssi-dma-events = <46 45>; | ||
204 | status = "disabled"; | ||
193 | }; | 205 | }; |
194 | 206 | ||
195 | asrc@02034000 { | 207 | asrc@02034000 { |
@@ -346,6 +358,90 @@ | |||
346 | compatible = "fsl,imx6q-anatop"; | 358 | compatible = "fsl,imx6q-anatop"; |
347 | reg = <0x020c8000 0x1000>; | 359 | reg = <0x020c8000 0x1000>; |
348 | interrupts = <0 49 0x04 0 54 0x04 0 127 0x04>; | 360 | interrupts = <0 49 0x04 0 54 0x04 0 127 0x04>; |
361 | |||
362 | regulator-1p1@110 { | ||
363 | compatible = "fsl,anatop-regulator"; | ||
364 | regulator-name = "vdd1p1"; | ||
365 | regulator-min-microvolt = <800000>; | ||
366 | regulator-max-microvolt = <1375000>; | ||
367 | regulator-always-on; | ||
368 | anatop-reg-offset = <0x110>; | ||
369 | anatop-vol-bit-shift = <8>; | ||
370 | anatop-vol-bit-width = <5>; | ||
371 | anatop-min-bit-val = <4>; | ||
372 | anatop-min-voltage = <800000>; | ||
373 | anatop-max-voltage = <1375000>; | ||
374 | }; | ||
375 | |||
376 | regulator-3p0@120 { | ||
377 | compatible = "fsl,anatop-regulator"; | ||
378 | regulator-name = "vdd3p0"; | ||
379 | regulator-min-microvolt = <2800000>; | ||
380 | regulator-max-microvolt = <3150000>; | ||
381 | regulator-always-on; | ||
382 | anatop-reg-offset = <0x120>; | ||
383 | anatop-vol-bit-shift = <8>; | ||
384 | anatop-vol-bit-width = <5>; | ||
385 | anatop-min-bit-val = <0>; | ||
386 | anatop-min-voltage = <2625000>; | ||
387 | anatop-max-voltage = <3400000>; | ||
388 | }; | ||
389 | |||
390 | regulator-2p5@130 { | ||
391 | compatible = "fsl,anatop-regulator"; | ||
392 | regulator-name = "vdd2p5"; | ||
393 | regulator-min-microvolt = <2000000>; | ||
394 | regulator-max-microvolt = <2750000>; | ||
395 | regulator-always-on; | ||
396 | anatop-reg-offset = <0x130>; | ||
397 | anatop-vol-bit-shift = <8>; | ||
398 | anatop-vol-bit-width = <5>; | ||
399 | anatop-min-bit-val = <0>; | ||
400 | anatop-min-voltage = <2000000>; | ||
401 | anatop-max-voltage = <2750000>; | ||
402 | }; | ||
403 | |||
404 | regulator-vddcore@140 { | ||
405 | compatible = "fsl,anatop-regulator"; | ||
406 | regulator-name = "cpu"; | ||
407 | regulator-min-microvolt = <725000>; | ||
408 | regulator-max-microvolt = <1450000>; | ||
409 | regulator-always-on; | ||
410 | anatop-reg-offset = <0x140>; | ||
411 | anatop-vol-bit-shift = <0>; | ||
412 | anatop-vol-bit-width = <5>; | ||
413 | anatop-min-bit-val = <1>; | ||
414 | anatop-min-voltage = <725000>; | ||
415 | anatop-max-voltage = <1450000>; | ||
416 | }; | ||
417 | |||
418 | regulator-vddpu@140 { | ||
419 | compatible = "fsl,anatop-regulator"; | ||
420 | regulator-name = "vddpu"; | ||
421 | regulator-min-microvolt = <725000>; | ||
422 | regulator-max-microvolt = <1450000>; | ||
423 | regulator-always-on; | ||
424 | anatop-reg-offset = <0x140>; | ||
425 | anatop-vol-bit-shift = <9>; | ||
426 | anatop-vol-bit-width = <5>; | ||
427 | anatop-min-bit-val = <1>; | ||
428 | anatop-min-voltage = <725000>; | ||
429 | anatop-max-voltage = <1450000>; | ||
430 | }; | ||
431 | |||
432 | regulator-vddsoc@140 { | ||
433 | compatible = "fsl,anatop-regulator"; | ||
434 | regulator-name = "vddsoc"; | ||
435 | regulator-min-microvolt = <725000>; | ||
436 | regulator-max-microvolt = <1450000>; | ||
437 | regulator-always-on; | ||
438 | anatop-reg-offset = <0x140>; | ||
439 | anatop-vol-bit-shift = <18>; | ||
440 | anatop-vol-bit-width = <5>; | ||
441 | anatop-min-bit-val = <1>; | ||
442 | anatop-min-voltage = <725000>; | ||
443 | anatop-max-voltage = <1450000>; | ||
444 | }; | ||
349 | }; | 445 | }; |
350 | 446 | ||
351 | usbphy@020c9000 { /* USBPHY1 */ | 447 | usbphy@020c9000 { /* USBPHY1 */ |
@@ -386,7 +482,62 @@ | |||
386 | }; | 482 | }; |
387 | 483 | ||
388 | iomuxc@020e0000 { | 484 | iomuxc@020e0000 { |
485 | compatible = "fsl,imx6q-iomuxc"; | ||
389 | reg = <0x020e0000 0x4000>; | 486 | reg = <0x020e0000 0x4000>; |
487 | |||
488 | /* shared pinctrl settings */ | ||
489 | audmux { | ||
490 | pinctrl_audmux_1: audmux-1 { | ||
491 | fsl,pins = <18 0x80000000 /* MX6Q_PAD_SD2_DAT0__AUDMUX_AUD4_RXD */ | ||
492 | 1586 0x80000000 /* MX6Q_PAD_SD2_DAT3__AUDMUX_AUD4_TXC */ | ||
493 | 11 0x80000000 /* MX6Q_PAD_SD2_DAT2__AUDMUX_AUD4_TXD */ | ||
494 | 3 0x80000000>; /* MX6Q_PAD_SD2_DAT1__AUDMUX_AUD4_TXFS */ | ||
495 | }; | ||
496 | }; | ||
497 | |||
498 | i2c1 { | ||
499 | pinctrl_i2c1_1: i2c1grp-1 { | ||
500 | fsl,pins = <137 0x4001b8b1 /* MX6Q_PAD_EIM_D21__I2C1_SCL */ | ||
501 | 196 0x4001b8b1>; /* MX6Q_PAD_EIM_D28__I2C1_SDA */ | ||
502 | }; | ||
503 | }; | ||
504 | |||
505 | serial2 { | ||
506 | pinctrl_serial2_1: serial2grp-1 { | ||
507 | fsl,pins = <183 0x1b0b1 /* MX6Q_PAD_EIM_D26__UART2_TXD */ | ||
508 | 191 0x1b0b1>; /* MX6Q_PAD_EIM_D27__UART2_RXD */ | ||
509 | }; | ||
510 | }; | ||
511 | |||
512 | usdhc3 { | ||
513 | pinctrl_usdhc3_1: usdhc3grp-1 { | ||
514 | fsl,pins = <1273 0x17059 /* MX6Q_PAD_SD3_CMD__USDHC3_CMD */ | ||
515 | 1281 0x10059 /* MX6Q_PAD_SD3_CLK__USDHC3_CLK */ | ||
516 | 1289 0x17059 /* MX6Q_PAD_SD3_DAT0__USDHC3_DAT0 */ | ||
517 | 1297 0x17059 /* MX6Q_PAD_SD3_DAT1__USDHC3_DAT1 */ | ||
518 | 1305 0x17059 /* MX6Q_PAD_SD3_DAT2__USDHC3_DAT2 */ | ||
519 | 1312 0x17059 /* MX6Q_PAD_SD3_DAT3__USDHC3_DAT3 */ | ||
520 | 1265 0x17059 /* MX6Q_PAD_SD3_DAT4__USDHC3_DAT4 */ | ||
521 | 1257 0x17059 /* MX6Q_PAD_SD3_DAT5__USDHC3_DAT5 */ | ||
522 | 1249 0x17059 /* MX6Q_PAD_SD3_DAT6__USDHC3_DAT6 */ | ||
523 | 1241 0x17059>; /* MX6Q_PAD_SD3_DAT7__USDHC3_DAT7 */ | ||
524 | }; | ||
525 | }; | ||
526 | |||
527 | usdhc4 { | ||
528 | pinctrl_usdhc4_1: usdhc4grp-1 { | ||
529 | fsl,pins = <1386 0x17059 /* MX6Q_PAD_SD4_CMD__USDHC4_CMD */ | ||
530 | 1392 0x10059 /* MX6Q_PAD_SD4_CLK__USDHC4_CLK */ | ||
531 | 1462 0x17059 /* MX6Q_PAD_SD4_DAT0__USDHC4_DAT0 */ | ||
532 | 1470 0x17059 /* MX6Q_PAD_SD4_DAT1__USDHC4_DAT1 */ | ||
533 | 1478 0x17059 /* MX6Q_PAD_SD4_DAT2__USDHC4_DAT2 */ | ||
534 | 1486 0x17059 /* MX6Q_PAD_SD4_DAT3__USDHC4_DAT3 */ | ||
535 | 1493 0x17059 /* MX6Q_PAD_SD4_DAT4__USDHC4_DAT4 */ | ||
536 | 1501 0x17059 /* MX6Q_PAD_SD4_DAT5__USDHC4_DAT5 */ | ||
537 | 1509 0x17059 /* MX6Q_PAD_SD4_DAT6__USDHC4_DAT6 */ | ||
538 | 1517 0x17059>; /* MX6Q_PAD_SD4_DAT7__USDHC4_DAT7 */ | ||
539 | }; | ||
540 | }; | ||
390 | }; | 541 | }; |
391 | 542 | ||
392 | dcic@020e4000 { /* DCIC1 */ | 543 | dcic@020e4000 { /* DCIC1 */ |
@@ -422,7 +573,7 @@ | |||
422 | reg = <0x0217c000 0x4000>; | 573 | reg = <0x0217c000 0x4000>; |
423 | }; | 574 | }; |
424 | 575 | ||
425 | enet@02188000 { | 576 | ethernet@02188000 { |
426 | compatible = "fsl,imx6q-fec"; | 577 | compatible = "fsl,imx6q-fec"; |
427 | reg = <0x02188000 0x4000>; | 578 | reg = <0x02188000 0x4000>; |
428 | interrupts = <0 118 0x04 0 119 0x04>; | 579 | interrupts = <0 118 0x04 0 119 0x04>; |
@@ -527,7 +678,9 @@ | |||
527 | }; | 678 | }; |
528 | 679 | ||
529 | audmux@021d8000 { | 680 | audmux@021d8000 { |
681 | compatible = "fsl,imx6q-audmux", "fsl,imx31-audmux"; | ||
530 | reg = <0x021d8000 0x4000>; | 682 | reg = <0x021d8000 0x4000>; |
683 | status = "disabled"; | ||
531 | }; | 684 | }; |
532 | 685 | ||
533 | mipi@021dc000 { /* MIPI-CSI */ | 686 | mipi@021dc000 { /* MIPI-CSI */ |
@@ -543,28 +696,28 @@ | |||
543 | interrupts = <0 18 0x04>; | 696 | interrupts = <0 18 0x04>; |
544 | }; | 697 | }; |
545 | 698 | ||
546 | uart2: uart@021e8000 { | 699 | uart2: serial@021e8000 { |
547 | compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; | 700 | compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; |
548 | reg = <0x021e8000 0x4000>; | 701 | reg = <0x021e8000 0x4000>; |
549 | interrupts = <0 27 0x04>; | 702 | interrupts = <0 27 0x04>; |
550 | status = "disabled"; | 703 | status = "disabled"; |
551 | }; | 704 | }; |
552 | 705 | ||
553 | uart3: uart@021ec000 { | 706 | uart3: serial@021ec000 { |
554 | compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; | 707 | compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; |
555 | reg = <0x021ec000 0x4000>; | 708 | reg = <0x021ec000 0x4000>; |
556 | interrupts = <0 28 0x04>; | 709 | interrupts = <0 28 0x04>; |
557 | status = "disabled"; | 710 | status = "disabled"; |
558 | }; | 711 | }; |
559 | 712 | ||
560 | uart4: uart@021f0000 { | 713 | uart4: serial@021f0000 { |
561 | compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; | 714 | compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; |
562 | reg = <0x021f0000 0x4000>; | 715 | reg = <0x021f0000 0x4000>; |
563 | interrupts = <0 29 0x04>; | 716 | interrupts = <0 29 0x04>; |
564 | status = "disabled"; | 717 | status = "disabled"; |
565 | }; | 718 | }; |
566 | 719 | ||
567 | uart5: uart@021f4000 { | 720 | uart5: serial@021f4000 { |
568 | compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; | 721 | compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; |
569 | reg = <0x021f4000 0x4000>; | 722 | reg = <0x021f4000 0x4000>; |
570 | interrupts = <0 30 0x04>; | 723 | interrupts = <0 30 0x04>; |
diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts index 8c756be4d7ad..5b4506c0a8c4 100644 --- a/arch/arm/boot/dts/omap3-beagle.dts +++ b/arch/arm/boot/dts/omap3-beagle.dts | |||
@@ -57,7 +57,7 @@ | |||
57 | &mmc1 { | 57 | &mmc1 { |
58 | vmmc-supply = <&vmmc1>; | 58 | vmmc-supply = <&vmmc1>; |
59 | vmmc_aux-supply = <&vsim>; | 59 | vmmc_aux-supply = <&vsim>; |
60 | ti,bus-width = <8>; | 60 | bus-width = <8>; |
61 | }; | 61 | }; |
62 | 62 | ||
63 | &mmc2 { | 63 | &mmc2 { |
diff --git a/arch/arm/boot/dts/omap4-panda.dts b/arch/arm/boot/dts/omap4-panda.dts index e671361bc791..1efe0c587985 100644 --- a/arch/arm/boot/dts/omap4-panda.dts +++ b/arch/arm/boot/dts/omap4-panda.dts | |||
@@ -70,7 +70,7 @@ | |||
70 | 70 | ||
71 | &mmc1 { | 71 | &mmc1 { |
72 | vmmc-supply = <&vmmc>; | 72 | vmmc-supply = <&vmmc>; |
73 | ti,bus-width = <8>; | 73 | bus-width = <8>; |
74 | }; | 74 | }; |
75 | 75 | ||
76 | &mmc2 { | 76 | &mmc2 { |
@@ -87,5 +87,5 @@ | |||
87 | 87 | ||
88 | &mmc5 { | 88 | &mmc5 { |
89 | ti,non-removable; | 89 | ti,non-removable; |
90 | ti,bus-width = <4>; | 90 | bus-width = <4>; |
91 | }; | 91 | }; |
diff --git a/arch/arm/boot/dts/omap4-sdp.dts b/arch/arm/boot/dts/omap4-sdp.dts index e5eeb6f9c6e6..d08c4d137280 100644 --- a/arch/arm/boot/dts/omap4-sdp.dts +++ b/arch/arm/boot/dts/omap4-sdp.dts | |||
@@ -137,12 +137,12 @@ | |||
137 | 137 | ||
138 | &mmc1 { | 138 | &mmc1 { |
139 | vmmc-supply = <&vmmc>; | 139 | vmmc-supply = <&vmmc>; |
140 | ti,bus-width = <8>; | 140 | bus-width = <8>; |
141 | }; | 141 | }; |
142 | 142 | ||
143 | &mmc2 { | 143 | &mmc2 { |
144 | vmmc-supply = <&vaux1>; | 144 | vmmc-supply = <&vaux1>; |
145 | ti,bus-width = <8>; | 145 | bus-width = <8>; |
146 | ti,non-removable; | 146 | ti,non-removable; |
147 | }; | 147 | }; |
148 | 148 | ||
@@ -155,6 +155,6 @@ | |||
155 | }; | 155 | }; |
156 | 156 | ||
157 | &mmc5 { | 157 | &mmc5 { |
158 | ti,bus-width = <4>; | 158 | bus-width = <4>; |
159 | ti,non-removable; | 159 | ti,non-removable; |
160 | }; | 160 | }; |
diff --git a/arch/arm/boot/dts/spear1310-evb.dts b/arch/arm/boot/dts/spear1310-evb.dts new file mode 100644 index 000000000000..8314e4171884 --- /dev/null +++ b/arch/arm/boot/dts/spear1310-evb.dts | |||
@@ -0,0 +1,292 @@ | |||
1 | /* | ||
2 | * DTS file for SPEAr1310 Evaluation Baord | ||
3 | * | ||
4 | * Copyright 2012 Viresh Kumar <viresh.kumar@st.com> | ||
5 | * | ||
6 | * The code contained herein is licensed under the GNU General Public | ||
7 | * License. You may obtain a copy of the GNU General Public License | ||
8 | * Version 2 or later at the following locations: | ||
9 | * | ||
10 | * http://www.opensource.org/licenses/gpl-license.html | ||
11 | * http://www.gnu.org/copyleft/gpl.html | ||
12 | */ | ||
13 | |||
14 | /dts-v1/; | ||
15 | /include/ "spear1310.dtsi" | ||
16 | |||
17 | / { | ||
18 | model = "ST SPEAr1310 Evaluation Board"; | ||
19 | compatible = "st,spear1310-evb", "st,spear1310"; | ||
20 | #address-cells = <1>; | ||
21 | #size-cells = <1>; | ||
22 | |||
23 | memory { | ||
24 | reg = <0 0x40000000>; | ||
25 | }; | ||
26 | |||
27 | ahb { | ||
28 | pinmux@e0700000 { | ||
29 | pinctrl-names = "default"; | ||
30 | pinctrl-0 = <&state_default>; | ||
31 | |||
32 | state_default: pinmux { | ||
33 | i2c0-pmx { | ||
34 | st,pins = "i2c0_grp"; | ||
35 | st,function = "i2c0"; | ||
36 | }; | ||
37 | i2s1 { | ||
38 | st,pins = "i2s1_grp"; | ||
39 | st,function = "i2s1"; | ||
40 | }; | ||
41 | gpio { | ||
42 | st,pins = "arm_gpio_grp"; | ||
43 | st,function = "arm_gpio"; | ||
44 | }; | ||
45 | eth { | ||
46 | st,pins = "gmii_grp"; | ||
47 | st,function = "gmii"; | ||
48 | }; | ||
49 | ssp0 { | ||
50 | st,pins = "ssp0_grp"; | ||
51 | st,function = "ssp0"; | ||
52 | }; | ||
53 | kbd { | ||
54 | st,pins = "keyboard_6x6_grp"; | ||
55 | st,function = "keyboard"; | ||
56 | }; | ||
57 | sdhci { | ||
58 | st,pins = "sdhci_grp"; | ||
59 | st,function = "sdhci"; | ||
60 | }; | ||
61 | smi-pmx { | ||
62 | st,pins = "smi_2_chips_grp"; | ||
63 | st,function = "smi"; | ||
64 | }; | ||
65 | uart0 { | ||
66 | st,pins = "uart0_grp"; | ||
67 | st,function = "uart0"; | ||
68 | }; | ||
69 | rs485 { | ||
70 | st,pins = "rs485_0_1_tdm_0_1_grp"; | ||
71 | st,function = "rs485_0_1_tdm_0_1"; | ||
72 | }; | ||
73 | i2c1_2 { | ||
74 | st,pins = "i2c_1_2_grp"; | ||
75 | st,function = "i2c_1_2"; | ||
76 | }; | ||
77 | pci { | ||
78 | st,pins = "pcie0_grp","pcie1_grp", | ||
79 | "pcie2_grp"; | ||
80 | st,function = "pci"; | ||
81 | }; | ||
82 | smii { | ||
83 | st,pins = "smii_0_1_2_grp"; | ||
84 | st,function = "smii_0_1_2"; | ||
85 | }; | ||
86 | nand { | ||
87 | st,pins = "nand_8bit_grp", | ||
88 | "nand_16bit_grp"; | ||
89 | st,function = "nand"; | ||
90 | }; | ||
91 | }; | ||
92 | }; | ||
93 | |||
94 | ahci@b1000000 { | ||
95 | status = "okay"; | ||
96 | }; | ||
97 | |||
98 | cf@b2800000 { | ||
99 | status = "okay"; | ||
100 | }; | ||
101 | |||
102 | dma@ea800000 { | ||
103 | status = "okay"; | ||
104 | }; | ||
105 | |||
106 | dma@eb000000 { | ||
107 | status = "okay"; | ||
108 | }; | ||
109 | |||
110 | fsmc: flash@b0000000 { | ||
111 | status = "okay"; | ||
112 | }; | ||
113 | |||
114 | gmac0: eth@e2000000 { | ||
115 | status = "okay"; | ||
116 | }; | ||
117 | |||
118 | sdhci@b3000000 { | ||
119 | status = "okay"; | ||
120 | }; | ||
121 | |||
122 | smi: flash@ea000000 { | ||
123 | status = "okay"; | ||
124 | clock-rate=<50000000>; | ||
125 | |||
126 | flash@e6000000 { | ||
127 | #address-cells = <1>; | ||
128 | #size-cells = <1>; | ||
129 | reg = <0xe6000000 0x800000>; | ||
130 | st,smi-fast-mode; | ||
131 | |||
132 | partition@0 { | ||
133 | label = "xloader"; | ||
134 | reg = <0x0 0x10000>; | ||
135 | }; | ||
136 | partition@10000 { | ||
137 | label = "u-boot"; | ||
138 | reg = <0x10000 0x40000>; | ||
139 | }; | ||
140 | partition@50000 { | ||
141 | label = "linux"; | ||
142 | reg = <0x50000 0x2c0000>; | ||
143 | }; | ||
144 | partition@310000 { | ||
145 | label = "rootfs"; | ||
146 | reg = <0x310000 0x4f0000>; | ||
147 | }; | ||
148 | }; | ||
149 | }; | ||
150 | |||
151 | spi0: spi@e0100000 { | ||
152 | status = "okay"; | ||
153 | }; | ||
154 | |||
155 | ehci@e4800000 { | ||
156 | status = "okay"; | ||
157 | }; | ||
158 | |||
159 | ehci@e5800000 { | ||
160 | status = "okay"; | ||
161 | }; | ||
162 | |||
163 | ohci@e4000000 { | ||
164 | status = "okay"; | ||
165 | }; | ||
166 | |||
167 | ohci@e5000000 { | ||
168 | status = "okay"; | ||
169 | }; | ||
170 | |||
171 | apb { | ||
172 | adc@e0080000 { | ||
173 | status = "okay"; | ||
174 | }; | ||
175 | |||
176 | gpio0: gpio@e0600000 { | ||
177 | status = "okay"; | ||
178 | }; | ||
179 | |||
180 | gpio1: gpio@e0680000 { | ||
181 | status = "okay"; | ||
182 | }; | ||
183 | |||
184 | i2c0: i2c@e0280000 { | ||
185 | status = "okay"; | ||
186 | }; | ||
187 | |||
188 | i2c1: i2c@5cd00000 { | ||
189 | status = "okay"; | ||
190 | }; | ||
191 | |||
192 | kbd@e0300000 { | ||
193 | linux,keymap = < 0x00000001 | ||
194 | 0x00010002 | ||
195 | 0x00020003 | ||
196 | 0x00030004 | ||
197 | 0x00040005 | ||
198 | 0x00050006 | ||
199 | 0x00060007 | ||
200 | 0x00070008 | ||
201 | 0x00080009 | ||
202 | 0x0100000a | ||
203 | 0x0101000c | ||
204 | 0x0102000d | ||
205 | 0x0103000e | ||
206 | 0x0104000f | ||
207 | 0x01050010 | ||
208 | 0x01060011 | ||
209 | 0x01070012 | ||
210 | 0x01080013 | ||
211 | 0x02000014 | ||
212 | 0x02010015 | ||
213 | 0x02020016 | ||
214 | 0x02030017 | ||
215 | 0x02040018 | ||
216 | 0x02050019 | ||
217 | 0x0206001a | ||
218 | 0x0207001b | ||
219 | 0x0208001c | ||
220 | 0x0300001d | ||
221 | 0x0301001e | ||
222 | 0x0302001f | ||
223 | 0x03030020 | ||
224 | 0x03040021 | ||
225 | 0x03050022 | ||
226 | 0x03060023 | ||
227 | 0x03070024 | ||
228 | 0x03080025 | ||
229 | 0x04000026 | ||
230 | 0x04010027 | ||
231 | 0x04020028 | ||
232 | 0x04030029 | ||
233 | 0x0404002a | ||
234 | 0x0405002b | ||
235 | 0x0406002c | ||
236 | 0x0407002d | ||
237 | 0x0408002e | ||
238 | 0x0500002f | ||
239 | 0x05010030 | ||
240 | 0x05020031 | ||
241 | 0x05030032 | ||
242 | 0x05040033 | ||
243 | 0x05050034 | ||
244 | 0x05060035 | ||
245 | 0x05070036 | ||
246 | 0x05080037 | ||
247 | 0x06000038 | ||
248 | 0x06010039 | ||
249 | 0x0602003a | ||
250 | 0x0603003b | ||
251 | 0x0604003c | ||
252 | 0x0605003d | ||
253 | 0x0606003e | ||
254 | 0x0607003f | ||
255 | 0x06080040 | ||
256 | 0x07000041 | ||
257 | 0x07010042 | ||
258 | 0x07020043 | ||
259 | 0x07030044 | ||
260 | 0x07040045 | ||
261 | 0x07050046 | ||
262 | 0x07060047 | ||
263 | 0x07070048 | ||
264 | 0x07080049 | ||
265 | 0x0800004a | ||
266 | 0x0801004b | ||
267 | 0x0802004c | ||
268 | 0x0803004d | ||
269 | 0x0804004e | ||
270 | 0x0805004f | ||
271 | 0x08060050 | ||
272 | 0x08070051 | ||
273 | 0x08080052 >; | ||
274 | autorepeat; | ||
275 | st,mode = <0>; | ||
276 | status = "okay"; | ||
277 | }; | ||
278 | |||
279 | rtc@e0580000 { | ||
280 | status = "okay"; | ||
281 | }; | ||
282 | |||
283 | serial@e0000000 { | ||
284 | status = "okay"; | ||
285 | }; | ||
286 | |||
287 | wdt@ec800620 { | ||
288 | status = "okay"; | ||
289 | }; | ||
290 | }; | ||
291 | }; | ||
292 | }; | ||
diff --git a/arch/arm/boot/dts/spear1310.dtsi b/arch/arm/boot/dts/spear1310.dtsi new file mode 100644 index 000000000000..9e61da404d57 --- /dev/null +++ b/arch/arm/boot/dts/spear1310.dtsi | |||
@@ -0,0 +1,184 @@ | |||
1 | /* | ||
2 | * DTS file for all SPEAr1310 SoCs | ||
3 | * | ||
4 | * Copyright 2012 Viresh Kumar <viresh.kumar@st.com> | ||
5 | * | ||
6 | * The code contained herein is licensed under the GNU General Public | ||
7 | * License. You may obtain a copy of the GNU General Public License | ||
8 | * Version 2 or later at the following locations: | ||
9 | * | ||
10 | * http://www.opensource.org/licenses/gpl-license.html | ||
11 | * http://www.gnu.org/copyleft/gpl.html | ||
12 | */ | ||
13 | |||
14 | /include/ "spear13xx.dtsi" | ||
15 | |||
16 | / { | ||
17 | compatible = "st,spear1310"; | ||
18 | |||
19 | ahb { | ||
20 | ahci@b1000000 { | ||
21 | compatible = "snps,spear-ahci"; | ||
22 | reg = <0xb1000000 0x10000>; | ||
23 | interrupts = <0 68 0x4>; | ||
24 | status = "disabled"; | ||
25 | }; | ||
26 | |||
27 | ahci@b1800000 { | ||
28 | compatible = "snps,spear-ahci"; | ||
29 | reg = <0xb1800000 0x10000>; | ||
30 | interrupts = <0 69 0x4>; | ||
31 | status = "disabled"; | ||
32 | }; | ||
33 | |||
34 | ahci@b4000000 { | ||
35 | compatible = "snps,spear-ahci"; | ||
36 | reg = <0xb4000000 0x10000>; | ||
37 | interrupts = <0 70 0x4>; | ||
38 | status = "disabled"; | ||
39 | }; | ||
40 | |||
41 | gmac1: eth@5c400000 { | ||
42 | compatible = "st,spear600-gmac"; | ||
43 | reg = <0x5c400000 0x8000>; | ||
44 | interrupts = <0 95 0x4>; | ||
45 | interrupt-names = "macirq"; | ||
46 | status = "disabled"; | ||
47 | }; | ||
48 | |||
49 | gmac2: eth@5c500000 { | ||
50 | compatible = "st,spear600-gmac"; | ||
51 | reg = <0x5c500000 0x8000>; | ||
52 | interrupts = <0 96 0x4>; | ||
53 | interrupt-names = "macirq"; | ||
54 | status = "disabled"; | ||
55 | }; | ||
56 | |||
57 | gmac3: eth@5c600000 { | ||
58 | compatible = "st,spear600-gmac"; | ||
59 | reg = <0x5c600000 0x8000>; | ||
60 | interrupts = <0 97 0x4>; | ||
61 | interrupt-names = "macirq"; | ||
62 | status = "disabled"; | ||
63 | }; | ||
64 | |||
65 | gmac4: eth@5c700000 { | ||
66 | compatible = "st,spear600-gmac"; | ||
67 | reg = <0x5c700000 0x8000>; | ||
68 | interrupts = <0 98 0x4>; | ||
69 | interrupt-names = "macirq"; | ||
70 | status = "disabled"; | ||
71 | }; | ||
72 | |||
73 | spi1: spi@5d400000 { | ||
74 | compatible = "arm,pl022", "arm,primecell"; | ||
75 | reg = <0x5d400000 0x1000>; | ||
76 | interrupts = <0 99 0x4>; | ||
77 | status = "disabled"; | ||
78 | }; | ||
79 | |||
80 | apb { | ||
81 | i2c1: i2c@5cd00000 { | ||
82 | #address-cells = <1>; | ||
83 | #size-cells = <0>; | ||
84 | compatible = "snps,designware-i2c"; | ||
85 | reg = <0x5cd00000 0x1000>; | ||
86 | interrupts = <0 87 0x4>; | ||
87 | status = "disabled"; | ||
88 | }; | ||
89 | |||
90 | i2c2: i2c@5ce00000 { | ||
91 | #address-cells = <1>; | ||
92 | #size-cells = <0>; | ||
93 | compatible = "snps,designware-i2c"; | ||
94 | reg = <0x5ce00000 0x1000>; | ||
95 | interrupts = <0 88 0x4>; | ||
96 | status = "disabled"; | ||
97 | }; | ||
98 | |||
99 | i2c3: i2c@5cf00000 { | ||
100 | #address-cells = <1>; | ||
101 | #size-cells = <0>; | ||
102 | compatible = "snps,designware-i2c"; | ||
103 | reg = <0x5cf00000 0x1000>; | ||
104 | interrupts = <0 89 0x4>; | ||
105 | status = "disabled"; | ||
106 | }; | ||
107 | |||
108 | i2c4: i2c@5d000000 { | ||
109 | #address-cells = <1>; | ||
110 | #size-cells = <0>; | ||
111 | compatible = "snps,designware-i2c"; | ||
112 | reg = <0x5d000000 0x1000>; | ||
113 | interrupts = <0 90 0x4>; | ||
114 | status = "disabled"; | ||
115 | }; | ||
116 | |||
117 | i2c5: i2c@5d100000 { | ||
118 | #address-cells = <1>; | ||
119 | #size-cells = <0>; | ||
120 | compatible = "snps,designware-i2c"; | ||
121 | reg = <0x5d100000 0x1000>; | ||
122 | interrupts = <0 91 0x4>; | ||
123 | status = "disabled"; | ||
124 | }; | ||
125 | |||
126 | i2c6: i2c@5d200000 { | ||
127 | #address-cells = <1>; | ||
128 | #size-cells = <0>; | ||
129 | compatible = "snps,designware-i2c"; | ||
130 | reg = <0x5d200000 0x1000>; | ||
131 | interrupts = <0 92 0x4>; | ||
132 | status = "disabled"; | ||
133 | }; | ||
134 | |||
135 | i2c7: i2c@5d300000 { | ||
136 | #address-cells = <1>; | ||
137 | #size-cells = <0>; | ||
138 | compatible = "snps,designware-i2c"; | ||
139 | reg = <0x5d300000 0x1000>; | ||
140 | interrupts = <0 93 0x4>; | ||
141 | status = "disabled"; | ||
142 | }; | ||
143 | |||
144 | serial@5c800000 { | ||
145 | compatible = "arm,pl011", "arm,primecell"; | ||
146 | reg = <0x5c800000 0x1000>; | ||
147 | interrupts = <0 82 0x4>; | ||
148 | status = "disabled"; | ||
149 | }; | ||
150 | |||
151 | serial@5c900000 { | ||
152 | compatible = "arm,pl011", "arm,primecell"; | ||
153 | reg = <0x5c900000 0x1000>; | ||
154 | interrupts = <0 83 0x4>; | ||
155 | status = "disabled"; | ||
156 | }; | ||
157 | |||
158 | serial@5ca00000 { | ||
159 | compatible = "arm,pl011", "arm,primecell"; | ||
160 | reg = <0x5ca00000 0x1000>; | ||
161 | interrupts = <0 84 0x4>; | ||
162 | status = "disabled"; | ||
163 | }; | ||
164 | |||
165 | serial@5cb00000 { | ||
166 | compatible = "arm,pl011", "arm,primecell"; | ||
167 | reg = <0x5cb00000 0x1000>; | ||
168 | interrupts = <0 85 0x4>; | ||
169 | status = "disabled"; | ||
170 | }; | ||
171 | |||
172 | serial@5cc00000 { | ||
173 | compatible = "arm,pl011", "arm,primecell"; | ||
174 | reg = <0x5cc00000 0x1000>; | ||
175 | interrupts = <0 86 0x4>; | ||
176 | status = "disabled"; | ||
177 | }; | ||
178 | |||
179 | thermal@e07008c4 { | ||
180 | st,thermal-flags = <0x7000>; | ||
181 | }; | ||
182 | }; | ||
183 | }; | ||
184 | }; | ||
diff --git a/arch/arm/boot/dts/spear1340-evb.dts b/arch/arm/boot/dts/spear1340-evb.dts new file mode 100644 index 000000000000..0d8472e5ab9f --- /dev/null +++ b/arch/arm/boot/dts/spear1340-evb.dts | |||
@@ -0,0 +1,308 @@ | |||
1 | /* | ||
2 | * DTS file for SPEAr1340 Evaluation Baord | ||
3 | * | ||
4 | * Copyright 2012 Viresh Kumar <viresh.kumar@st.com> | ||
5 | * | ||
6 | * The code contained herein is licensed under the GNU General Public | ||
7 | * License. You may obtain a copy of the GNU General Public License | ||
8 | * Version 2 or later at the following locations: | ||
9 | * | ||
10 | * http://www.opensource.org/licenses/gpl-license.html | ||
11 | * http://www.gnu.org/copyleft/gpl.html | ||
12 | */ | ||
13 | |||
14 | /dts-v1/; | ||
15 | /include/ "spear1340.dtsi" | ||
16 | |||
17 | / { | ||
18 | model = "ST SPEAr1340 Evaluation Board"; | ||
19 | compatible = "st,spear1340-evb", "st,spear1340"; | ||
20 | #address-cells = <1>; | ||
21 | #size-cells = <1>; | ||
22 | |||
23 | memory { | ||
24 | reg = <0 0x40000000>; | ||
25 | }; | ||
26 | |||
27 | ahb { | ||
28 | pinmux@e0700000 { | ||
29 | pinctrl-names = "default"; | ||
30 | pinctrl-0 = <&state_default>; | ||
31 | |||
32 | state_default: pinmux { | ||
33 | pads_as_gpio { | ||
34 | st,pins = "pads_as_gpio_grp"; | ||
35 | st,function = "pads_as_gpio"; | ||
36 | }; | ||
37 | fsmc { | ||
38 | st,pins = "fsmc_8bit_grp"; | ||
39 | st,function = "fsmc"; | ||
40 | }; | ||
41 | kbd { | ||
42 | st,pins = "keyboard_row_col_grp", | ||
43 | "keyboard_col5_grp"; | ||
44 | st,function = "keyboard"; | ||
45 | }; | ||
46 | uart0 { | ||
47 | st,pins = "uart0_grp", "uart0_enh_grp"; | ||
48 | st,function = "uart0"; | ||
49 | }; | ||
50 | i2c0-pmx { | ||
51 | st,pins = "i2c0_grp"; | ||
52 | st,function = "i2c0"; | ||
53 | }; | ||
54 | i2c1-pmx { | ||
55 | st,pins = "i2c1_grp"; | ||
56 | st,function = "i2c1"; | ||
57 | }; | ||
58 | spdif-in { | ||
59 | st,pins = "spdif_in_grp"; | ||
60 | st,function = "spdif_in"; | ||
61 | }; | ||
62 | spdif-out { | ||
63 | st,pins = "spdif_out_grp"; | ||
64 | st,function = "spdif_out"; | ||
65 | }; | ||
66 | ssp0 { | ||
67 | st,pins = "ssp0_grp", "ssp0_cs1_grp", | ||
68 | "ssp0_cs3_grp"; | ||
69 | st,function = "ssp0"; | ||
70 | }; | ||
71 | pwm { | ||
72 | st,pins = "pwm2_grp", "pwm3_grp"; | ||
73 | st,function = "pwm"; | ||
74 | }; | ||
75 | smi-pmx { | ||
76 | st,pins = "smi_grp"; | ||
77 | st,function = "smi"; | ||
78 | }; | ||
79 | i2s { | ||
80 | st,pins = "i2s_in_grp", "i2s_out_grp"; | ||
81 | st,function = "i2s"; | ||
82 | }; | ||
83 | gmac { | ||
84 | st,pins = "gmii_grp", "rgmii_grp"; | ||
85 | st,function = "gmac"; | ||
86 | }; | ||
87 | cam3 { | ||
88 | st,pins = "cam3_grp"; | ||
89 | st,function = "cam3"; | ||
90 | }; | ||
91 | cec0 { | ||
92 | st,pins = "cec0_grp"; | ||
93 | st,function = "cec0"; | ||
94 | }; | ||
95 | cec1 { | ||
96 | st,pins = "cec1_grp"; | ||
97 | st,function = "cec1"; | ||
98 | }; | ||
99 | sdhci { | ||
100 | st,pins = "sdhci_grp"; | ||
101 | st,function = "sdhci"; | ||
102 | }; | ||
103 | clcd { | ||
104 | st,pins = "clcd_grp"; | ||
105 | st,function = "clcd"; | ||
106 | }; | ||
107 | sata { | ||
108 | st,pins = "sata_grp"; | ||
109 | st,function = "sata"; | ||
110 | }; | ||
111 | }; | ||
112 | }; | ||
113 | |||
114 | dma@ea800000 { | ||
115 | status = "okay"; | ||
116 | }; | ||
117 | |||
118 | dma@eb000000 { | ||
119 | status = "okay"; | ||
120 | }; | ||
121 | |||
122 | fsmc: flash@b0000000 { | ||
123 | status = "okay"; | ||
124 | }; | ||
125 | |||
126 | gmac0: eth@e2000000 { | ||
127 | status = "okay"; | ||
128 | }; | ||
129 | |||
130 | sdhci@b3000000 { | ||
131 | status = "okay"; | ||
132 | }; | ||
133 | |||
134 | smi: flash@ea000000 { | ||
135 | status = "okay"; | ||
136 | clock-rate=<50000000>; | ||
137 | |||
138 | flash@e6000000 { | ||
139 | #address-cells = <1>; | ||
140 | #size-cells = <1>; | ||
141 | reg = <0xe6000000 0x800000>; | ||
142 | st,smi-fast-mode; | ||
143 | |||
144 | partition@0 { | ||
145 | label = "xloader"; | ||
146 | reg = <0x0 0x10000>; | ||
147 | }; | ||
148 | partition@10000 { | ||
149 | label = "u-boot"; | ||
150 | reg = <0x10000 0x40000>; | ||
151 | }; | ||
152 | partition@50000 { | ||
153 | label = "linux"; | ||
154 | reg = <0x50000 0x2c0000>; | ||
155 | }; | ||
156 | partition@310000 { | ||
157 | label = "rootfs"; | ||
158 | reg = <0x310000 0x4f0000>; | ||
159 | }; | ||
160 | }; | ||
161 | }; | ||
162 | |||
163 | spi0: spi@e0100000 { | ||
164 | status = "okay"; | ||
165 | }; | ||
166 | |||
167 | ehci@e4800000 { | ||
168 | status = "okay"; | ||
169 | }; | ||
170 | |||
171 | ehci@e5800000 { | ||
172 | status = "okay"; | ||
173 | }; | ||
174 | |||
175 | ohci@e4000000 { | ||
176 | status = "okay"; | ||
177 | }; | ||
178 | |||
179 | ohci@e5000000 { | ||
180 | status = "okay"; | ||
181 | }; | ||
182 | |||
183 | apb { | ||
184 | adc@e0080000 { | ||
185 | status = "okay"; | ||
186 | }; | ||
187 | |||
188 | gpio0: gpio@e0600000 { | ||
189 | status = "okay"; | ||
190 | }; | ||
191 | |||
192 | gpio1: gpio@e0680000 { | ||
193 | status = "okay"; | ||
194 | }; | ||
195 | |||
196 | i2c0: i2c@e0280000 { | ||
197 | status = "okay"; | ||
198 | }; | ||
199 | |||
200 | i2c1: i2c@b4000000 { | ||
201 | status = "okay"; | ||
202 | }; | ||
203 | |||
204 | kbd@e0300000 { | ||
205 | linux,keymap = < 0x00000001 | ||
206 | 0x00010002 | ||
207 | 0x00020003 | ||
208 | 0x00030004 | ||
209 | 0x00040005 | ||
210 | 0x00050006 | ||
211 | 0x00060007 | ||
212 | 0x00070008 | ||
213 | 0x00080009 | ||
214 | 0x0100000a | ||
215 | 0x0101000c | ||
216 | 0x0102000d | ||
217 | 0x0103000e | ||
218 | 0x0104000f | ||
219 | 0x01050010 | ||
220 | 0x01060011 | ||
221 | 0x01070012 | ||
222 | 0x01080013 | ||
223 | 0x02000014 | ||
224 | 0x02010015 | ||
225 | 0x02020016 | ||
226 | 0x02030017 | ||
227 | 0x02040018 | ||
228 | 0x02050019 | ||
229 | 0x0206001a | ||
230 | 0x0207001b | ||
231 | 0x0208001c | ||
232 | 0x0300001d | ||
233 | 0x0301001e | ||
234 | 0x0302001f | ||
235 | 0x03030020 | ||
236 | 0x03040021 | ||
237 | 0x03050022 | ||
238 | 0x03060023 | ||
239 | 0x03070024 | ||
240 | 0x03080025 | ||
241 | 0x04000026 | ||
242 | 0x04010027 | ||
243 | 0x04020028 | ||
244 | 0x04030029 | ||
245 | 0x0404002a | ||
246 | 0x0405002b | ||
247 | 0x0406002c | ||
248 | 0x0407002d | ||
249 | 0x0408002e | ||
250 | 0x0500002f | ||
251 | 0x05010030 | ||
252 | 0x05020031 | ||
253 | 0x05030032 | ||
254 | 0x05040033 | ||
255 | 0x05050034 | ||
256 | 0x05060035 | ||
257 | 0x05070036 | ||
258 | 0x05080037 | ||
259 | 0x06000038 | ||
260 | 0x06010039 | ||
261 | 0x0602003a | ||
262 | 0x0603003b | ||
263 | 0x0604003c | ||
264 | 0x0605003d | ||
265 | 0x0606003e | ||
266 | 0x0607003f | ||
267 | 0x06080040 | ||
268 | 0x07000041 | ||
269 | 0x07010042 | ||
270 | 0x07020043 | ||
271 | 0x07030044 | ||
272 | 0x07040045 | ||
273 | 0x07050046 | ||
274 | 0x07060047 | ||
275 | 0x07070048 | ||
276 | 0x07080049 | ||
277 | 0x0800004a | ||
278 | 0x0801004b | ||
279 | 0x0802004c | ||
280 | 0x0803004d | ||
281 | 0x0804004e | ||
282 | 0x0805004f | ||
283 | 0x08060050 | ||
284 | 0x08070051 | ||
285 | 0x08080052 >; | ||
286 | autorepeat; | ||
287 | st,mode = <0>; | ||
288 | status = "okay"; | ||
289 | }; | ||
290 | |||
291 | rtc@e0580000 { | ||
292 | status = "okay"; | ||
293 | }; | ||
294 | |||
295 | serial@e0000000 { | ||
296 | status = "okay"; | ||
297 | }; | ||
298 | |||
299 | serial@b4100000 { | ||
300 | status = "okay"; | ||
301 | }; | ||
302 | |||
303 | wdt@ec800620 { | ||
304 | status = "okay"; | ||
305 | }; | ||
306 | }; | ||
307 | }; | ||
308 | }; | ||
diff --git a/arch/arm/boot/dts/spear1340.dtsi b/arch/arm/boot/dts/spear1340.dtsi new file mode 100644 index 000000000000..a26fc47a55e8 --- /dev/null +++ b/arch/arm/boot/dts/spear1340.dtsi | |||
@@ -0,0 +1,56 @@ | |||
1 | /* | ||
2 | * DTS file for all SPEAr1340 SoCs | ||
3 | * | ||
4 | * Copyright 2012 Viresh Kumar <viresh.kumar@st.com> | ||
5 | * | ||
6 | * The code contained herein is licensed under the GNU General Public | ||
7 | * License. You may obtain a copy of the GNU General Public License | ||
8 | * Version 2 or later at the following locations: | ||
9 | * | ||
10 | * http://www.opensource.org/licenses/gpl-license.html | ||
11 | * http://www.gnu.org/copyleft/gpl.html | ||
12 | */ | ||
13 | |||
14 | /include/ "spear13xx.dtsi" | ||
15 | |||
16 | / { | ||
17 | compatible = "st,spear1340"; | ||
18 | |||
19 | ahb { | ||
20 | ahci@b1000000 { | ||
21 | compatible = "snps,spear-ahci"; | ||
22 | reg = <0xb1000000 0x10000>; | ||
23 | interrupts = <0 72 0x4>; | ||
24 | status = "disabled"; | ||
25 | }; | ||
26 | |||
27 | spi1: spi@5d400000 { | ||
28 | compatible = "arm,pl022", "arm,primecell"; | ||
29 | reg = <0x5d400000 0x1000>; | ||
30 | interrupts = <0 99 0x4>; | ||
31 | status = "disabled"; | ||
32 | }; | ||
33 | |||
34 | apb { | ||
35 | i2c1: i2c@b4000000 { | ||
36 | #address-cells = <1>; | ||
37 | #size-cells = <0>; | ||
38 | compatible = "snps,designware-i2c"; | ||
39 | reg = <0xb4000000 0x1000>; | ||
40 | interrupts = <0 104 0x4>; | ||
41 | status = "disabled"; | ||
42 | }; | ||
43 | |||
44 | serial@b4100000 { | ||
45 | compatible = "arm,pl011", "arm,primecell"; | ||
46 | reg = <0xb4100000 0x1000>; | ||
47 | interrupts = <0 105 0x4>; | ||
48 | status = "disabled"; | ||
49 | }; | ||
50 | |||
51 | thermal@e07008c4 { | ||
52 | st,thermal-flags = <0x2a00>; | ||
53 | }; | ||
54 | }; | ||
55 | }; | ||
56 | }; | ||
diff --git a/arch/arm/boot/dts/spear13xx.dtsi b/arch/arm/boot/dts/spear13xx.dtsi new file mode 100644 index 000000000000..1f8e1e1481df --- /dev/null +++ b/arch/arm/boot/dts/spear13xx.dtsi | |||
@@ -0,0 +1,262 @@ | |||
1 | /* | ||
2 | * DTS file for all SPEAr13xx SoCs | ||
3 | * | ||
4 | * Copyright 2012 Viresh Kumar <viresh.kumar@st.com> | ||
5 | * | ||
6 | * The code contained herein is licensed under the GNU General Public | ||
7 | * License. You may obtain a copy of the GNU General Public License | ||
8 | * Version 2 or later at the following locations: | ||
9 | * | ||
10 | * http://www.opensource.org/licenses/gpl-license.html | ||
11 | * http://www.gnu.org/copyleft/gpl.html | ||
12 | */ | ||
13 | |||
14 | /include/ "skeleton.dtsi" | ||
15 | |||
16 | / { | ||
17 | interrupt-parent = <&gic>; | ||
18 | |||
19 | cpus { | ||
20 | #address-cells = <1>; | ||
21 | #size-cells = <0>; | ||
22 | |||
23 | cpu@0 { | ||
24 | compatible = "arm,cortex-a9"; | ||
25 | reg = <0>; | ||
26 | next-level-cache = <&L2>; | ||
27 | }; | ||
28 | |||
29 | cpu@1 { | ||
30 | compatible = "arm,cortex-a9"; | ||
31 | reg = <1>; | ||
32 | next-level-cache = <&L2>; | ||
33 | }; | ||
34 | }; | ||
35 | |||
36 | gic: interrupt-controller@ec801000 { | ||
37 | compatible = "arm,cortex-a9-gic"; | ||
38 | interrupt-controller; | ||
39 | #interrupt-cells = <3>; | ||
40 | reg = < 0xec801000 0x1000 >, | ||
41 | < 0xec800100 0x0100 >; | ||
42 | }; | ||
43 | |||
44 | pmu { | ||
45 | compatible = "arm,cortex-a9-pmu"; | ||
46 | interrupts = <0 8 0x04 | ||
47 | 0 9 0x04>; | ||
48 | }; | ||
49 | |||
50 | L2: l2-cache { | ||
51 | compatible = "arm,pl310-cache"; | ||
52 | reg = <0xed000000 0x1000>; | ||
53 | cache-unified; | ||
54 | cache-level = <2>; | ||
55 | }; | ||
56 | |||
57 | memory { | ||
58 | name = "memory"; | ||
59 | device_type = "memory"; | ||
60 | reg = <0 0x40000000>; | ||
61 | }; | ||
62 | |||
63 | chosen { | ||
64 | bootargs = "console=ttyAMA0,115200"; | ||
65 | }; | ||
66 | |||
67 | ahb { | ||
68 | #address-cells = <1>; | ||
69 | #size-cells = <1>; | ||
70 | compatible = "simple-bus"; | ||
71 | ranges = <0x50000000 0x50000000 0x10000000 | ||
72 | 0xb0000000 0xb0000000 0x10000000 | ||
73 | 0xe0000000 0xe0000000 0x10000000>; | ||
74 | |||
75 | sdhci@b3000000 { | ||
76 | compatible = "st,sdhci-spear"; | ||
77 | reg = <0xb3000000 0x100>; | ||
78 | interrupts = <0 28 0x4>; | ||
79 | status = "disabled"; | ||
80 | }; | ||
81 | |||
82 | cf@b2800000 { | ||
83 | compatible = "arasan,cf-spear1340"; | ||
84 | reg = <0xb2800000 0x100>; | ||
85 | interrupts = <0 29 0x4>; | ||
86 | status = "disabled"; | ||
87 | }; | ||
88 | |||
89 | dma@ea800000 { | ||
90 | compatible = "snps,dma-spear1340"; | ||
91 | reg = <0xea800000 0x1000>; | ||
92 | interrupts = <0 19 0x4>; | ||
93 | status = "disabled"; | ||
94 | }; | ||
95 | |||
96 | dma@eb000000 { | ||
97 | compatible = "snps,dma-spear1340"; | ||
98 | reg = <0xeb000000 0x1000>; | ||
99 | interrupts = <0 59 0x4>; | ||
100 | status = "disabled"; | ||
101 | }; | ||
102 | |||
103 | fsmc: flash@b0000000 { | ||
104 | compatible = "st,spear600-fsmc-nand"; | ||
105 | #address-cells = <1>; | ||
106 | #size-cells = <1>; | ||
107 | reg = <0xb0000000 0x1000 /* FSMC Register */ | ||
108 | 0xb0800000 0x0010>; /* NAND Base */ | ||
109 | reg-names = "fsmc_regs", "nand_data"; | ||
110 | interrupts = <0 20 0x4 | ||
111 | 0 21 0x4 | ||
112 | 0 22 0x4 | ||
113 | 0 23 0x4>; | ||
114 | st,ale-off = <0x20000>; | ||
115 | st,cle-off = <0x10000>; | ||
116 | status = "disabled"; | ||
117 | }; | ||
118 | |||
119 | gmac0: eth@e2000000 { | ||
120 | compatible = "st,spear600-gmac"; | ||
121 | reg = <0xe2000000 0x8000>; | ||
122 | interrupts = <0 23 0x4 | ||
123 | 0 24 0x4>; | ||
124 | interrupt-names = "macirq", "eth_wake_irq"; | ||
125 | status = "disabled"; | ||
126 | }; | ||
127 | |||
128 | smi: flash@ea000000 { | ||
129 | compatible = "st,spear600-smi"; | ||
130 | #address-cells = <1>; | ||
131 | #size-cells = <1>; | ||
132 | reg = <0xea000000 0x1000>; | ||
133 | interrupts = <0 30 0x4>; | ||
134 | status = "disabled"; | ||
135 | }; | ||
136 | |||
137 | spi0: spi@e0100000 { | ||
138 | compatible = "arm,pl022", "arm,primecell"; | ||
139 | reg = <0xe0100000 0x1000>; | ||
140 | interrupts = <0 31 0x4>; | ||
141 | status = "disabled"; | ||
142 | }; | ||
143 | |||
144 | ehci@e4800000 { | ||
145 | compatible = "st,spear600-ehci", "usb-ehci"; | ||
146 | reg = <0xe4800000 0x1000>; | ||
147 | interrupts = <0 64 0x4>; | ||
148 | status = "disabled"; | ||
149 | }; | ||
150 | |||
151 | ehci@e5800000 { | ||
152 | compatible = "st,spear600-ehci", "usb-ehci"; | ||
153 | reg = <0xe5800000 0x1000>; | ||
154 | interrupts = <0 66 0x4>; | ||
155 | status = "disabled"; | ||
156 | }; | ||
157 | |||
158 | ohci@e4000000 { | ||
159 | compatible = "st,spear600-ohci", "usb-ohci"; | ||
160 | reg = <0xe4000000 0x1000>; | ||
161 | interrupts = <0 65 0x4>; | ||
162 | status = "disabled"; | ||
163 | }; | ||
164 | |||
165 | ohci@e5000000 { | ||
166 | compatible = "st,spear600-ohci", "usb-ohci"; | ||
167 | reg = <0xe5000000 0x1000>; | ||
168 | interrupts = <0 67 0x4>; | ||
169 | status = "disabled"; | ||
170 | }; | ||
171 | |||
172 | apb { | ||
173 | #address-cells = <1>; | ||
174 | #size-cells = <1>; | ||
175 | compatible = "simple-bus"; | ||
176 | ranges = <0x50000000 0x50000000 0x10000000 | ||
177 | 0xb0000000 0xb0000000 0x10000000 | ||
178 | 0xe0000000 0xe0000000 0x10000000>; | ||
179 | |||
180 | gpio0: gpio@e0600000 { | ||
181 | compatible = "arm,pl061", "arm,primecell"; | ||
182 | reg = <0xe0600000 0x1000>; | ||
183 | interrupts = <0 24 0x4>; | ||
184 | gpio-controller; | ||
185 | #gpio-cells = <2>; | ||
186 | interrupt-controller; | ||
187 | #interrupt-cells = <2>; | ||
188 | status = "disabled"; | ||
189 | }; | ||
190 | |||
191 | gpio1: gpio@e0680000 { | ||
192 | compatible = "arm,pl061", "arm,primecell"; | ||
193 | reg = <0xe0680000 0x1000>; | ||
194 | interrupts = <0 25 0x4>; | ||
195 | gpio-controller; | ||
196 | #gpio-cells = <2>; | ||
197 | interrupt-controller; | ||
198 | #interrupt-cells = <2>; | ||
199 | status = "disabled"; | ||
200 | }; | ||
201 | |||
202 | kbd@e0300000 { | ||
203 | compatible = "st,spear300-kbd"; | ||
204 | reg = <0xe0300000 0x1000>; | ||
205 | status = "disabled"; | ||
206 | }; | ||
207 | |||
208 | i2c0: i2c@e0280000 { | ||
209 | #address-cells = <1>; | ||
210 | #size-cells = <0>; | ||
211 | compatible = "snps,designware-i2c"; | ||
212 | reg = <0xe0280000 0x1000>; | ||
213 | interrupts = <0 41 0x4>; | ||
214 | status = "disabled"; | ||
215 | }; | ||
216 | |||
217 | rtc@e0580000 { | ||
218 | compatible = "st,spear-rtc"; | ||
219 | reg = <0xe0580000 0x1000>; | ||
220 | interrupts = <0 36 0x4>; | ||
221 | status = "disabled"; | ||
222 | }; | ||
223 | |||
224 | serial@e0000000 { | ||
225 | compatible = "arm,pl011", "arm,primecell"; | ||
226 | reg = <0xe0000000 0x1000>; | ||
227 | interrupts = <0 36 0x4>; | ||
228 | status = "disabled"; | ||
229 | }; | ||
230 | |||
231 | adc@e0080000 { | ||
232 | compatible = "st,spear600-adc"; | ||
233 | reg = <0xe0080000 0x1000>; | ||
234 | interrupts = <0 44 0x4>; | ||
235 | status = "disabled"; | ||
236 | }; | ||
237 | |||
238 | timer@e0380000 { | ||
239 | compatible = "st,spear-timer"; | ||
240 | reg = <0xe0380000 0x400>; | ||
241 | interrupts = <0 37 0x4>; | ||
242 | }; | ||
243 | |||
244 | timer@ec800600 { | ||
245 | compatible = "arm,cortex-a9-twd-timer"; | ||
246 | reg = <0xec800600 0x20>; | ||
247 | interrupts = <1 13 0x301>; | ||
248 | }; | ||
249 | |||
250 | wdt@ec800620 { | ||
251 | compatible = "arm,cortex-a9-twd-wdt"; | ||
252 | reg = <0xec800620 0x20>; | ||
253 | status = "disabled"; | ||
254 | }; | ||
255 | |||
256 | thermal@e07008c4 { | ||
257 | compatible = "st,thermal-spear1340"; | ||
258 | reg = <0xe07008c4 0x4>; | ||
259 | }; | ||
260 | }; | ||
261 | }; | ||
262 | }; | ||
diff --git a/arch/arm/boot/dts/spear300-evb.dts b/arch/arm/boot/dts/spear300-evb.dts index 910e264b87c0..fc82b1a26458 100644 --- a/arch/arm/boot/dts/spear300-evb.dts +++ b/arch/arm/boot/dts/spear300-evb.dts | |||
@@ -87,6 +87,31 @@ | |||
87 | 87 | ||
88 | smi: flash@fc000000 { | 88 | smi: flash@fc000000 { |
89 | status = "okay"; | 89 | status = "okay"; |
90 | clock-rate=<50000000>; | ||
91 | |||
92 | flash@f8000000 { | ||
93 | #address-cells = <1>; | ||
94 | #size-cells = <1>; | ||
95 | reg = <0xf8000000 0x800000>; | ||
96 | st,smi-fast-mode; | ||
97 | |||
98 | partition@0 { | ||
99 | label = "xloader"; | ||
100 | reg = <0x0 0x10000>; | ||
101 | }; | ||
102 | partition@10000 { | ||
103 | label = "u-boot"; | ||
104 | reg = <0x10000 0x40000>; | ||
105 | }; | ||
106 | partition@50000 { | ||
107 | label = "linux"; | ||
108 | reg = <0x50000 0x2c0000>; | ||
109 | }; | ||
110 | partition@310000 { | ||
111 | label = "rootfs"; | ||
112 | reg = <0x310000 0x4f0000>; | ||
113 | }; | ||
114 | }; | ||
90 | }; | 115 | }; |
91 | 116 | ||
92 | spi0: spi@d0100000 { | 117 | spi0: spi@d0100000 { |
diff --git a/arch/arm/boot/dts/spear310-evb.dts b/arch/arm/boot/dts/spear310-evb.dts index 6d95317100ad..dc5e2d445a93 100644 --- a/arch/arm/boot/dts/spear310-evb.dts +++ b/arch/arm/boot/dts/spear310-evb.dts | |||
@@ -103,11 +103,27 @@ | |||
103 | clock-rate=<50000000>; | 103 | clock-rate=<50000000>; |
104 | 104 | ||
105 | flash@f8000000 { | 105 | flash@f8000000 { |
106 | label = "m25p64"; | ||
107 | reg = <0xf8000000 0x800000>; | ||
108 | #address-cells = <1>; | 106 | #address-cells = <1>; |
109 | #size-cells = <1>; | 107 | #size-cells = <1>; |
108 | reg = <0xf8000000 0x800000>; | ||
110 | st,smi-fast-mode; | 109 | st,smi-fast-mode; |
110 | |||
111 | partition@0 { | ||
112 | label = "xloader"; | ||
113 | reg = <0x0 0x10000>; | ||
114 | }; | ||
115 | partition@10000 { | ||
116 | label = "u-boot"; | ||
117 | reg = <0x10000 0x40000>; | ||
118 | }; | ||
119 | partition@50000 { | ||
120 | label = "linux"; | ||
121 | reg = <0x50000 0x2c0000>; | ||
122 | }; | ||
123 | partition@310000 { | ||
124 | label = "rootfs"; | ||
125 | reg = <0x310000 0x4f0000>; | ||
126 | }; | ||
111 | }; | 127 | }; |
112 | }; | 128 | }; |
113 | 129 | ||
diff --git a/arch/arm/boot/dts/spear320-evb.dts b/arch/arm/boot/dts/spear320-evb.dts index 0c6463b71a37..6308fa3bec1e 100644 --- a/arch/arm/boot/dts/spear320-evb.dts +++ b/arch/arm/boot/dts/spear320-evb.dts | |||
@@ -110,6 +110,31 @@ | |||
110 | 110 | ||
111 | smi: flash@fc000000 { | 111 | smi: flash@fc000000 { |
112 | status = "okay"; | 112 | status = "okay"; |
113 | clock-rate=<50000000>; | ||
114 | |||
115 | flash@f8000000 { | ||
116 | #address-cells = <1>; | ||
117 | #size-cells = <1>; | ||
118 | reg = <0xf8000000 0x800000>; | ||
119 | st,smi-fast-mode; | ||
120 | |||
121 | partition@0 { | ||
122 | label = "xloader"; | ||
123 | reg = <0x0 0x10000>; | ||
124 | }; | ||
125 | partition@10000 { | ||
126 | label = "u-boot"; | ||
127 | reg = <0x10000 0x40000>; | ||
128 | }; | ||
129 | partition@50000 { | ||
130 | label = "linux"; | ||
131 | reg = <0x50000 0x2c0000>; | ||
132 | }; | ||
133 | partition@310000 { | ||
134 | label = "rootfs"; | ||
135 | reg = <0x310000 0x4f0000>; | ||
136 | }; | ||
137 | }; | ||
113 | }; | 138 | }; |
114 | 139 | ||
115 | spi0: spi@d0100000 { | 140 | spi0: spi@d0100000 { |
diff --git a/arch/arm/boot/dts/spear3xx.dtsi b/arch/arm/boot/dts/spear3xx.dtsi index 0ae7c8e86311..91072553963f 100644 --- a/arch/arm/boot/dts/spear3xx.dtsi +++ b/arch/arm/boot/dts/spear3xx.dtsi | |||
@@ -139,6 +139,12 @@ | |||
139 | interrupts = <12>; | 139 | interrupts = <12>; |
140 | status = "disabled"; | 140 | status = "disabled"; |
141 | }; | 141 | }; |
142 | |||
143 | timer@f0000000 { | ||
144 | compatible = "st,spear-timer"; | ||
145 | reg = <0xf0000000 0x400>; | ||
146 | interrupts = <2>; | ||
147 | }; | ||
142 | }; | 148 | }; |
143 | }; | 149 | }; |
144 | }; | 150 | }; |
diff --git a/arch/arm/boot/dts/spear600-evb.dts b/arch/arm/boot/dts/spear600-evb.dts index 790a7a8a5ccd..1119c22c9a82 100644 --- a/arch/arm/boot/dts/spear600-evb.dts +++ b/arch/arm/boot/dts/spear600-evb.dts | |||
@@ -33,6 +33,35 @@ | |||
33 | status = "okay"; | 33 | status = "okay"; |
34 | }; | 34 | }; |
35 | 35 | ||
36 | smi: flash@fc000000 { | ||
37 | status = "okay"; | ||
38 | clock-rate=<50000000>; | ||
39 | |||
40 | flash@f8000000 { | ||
41 | #address-cells = <1>; | ||
42 | #size-cells = <1>; | ||
43 | reg = <0xf8000000 0x800000>; | ||
44 | st,smi-fast-mode; | ||
45 | |||
46 | partition@0 { | ||
47 | label = "xloader"; | ||
48 | reg = <0x0 0x10000>; | ||
49 | }; | ||
50 | partition@10000 { | ||
51 | label = "u-boot"; | ||
52 | reg = <0x10000 0x40000>; | ||
53 | }; | ||
54 | partition@50000 { | ||
55 | label = "linux"; | ||
56 | reg = <0x50000 0x2c0000>; | ||
57 | }; | ||
58 | partition@310000 { | ||
59 | label = "rootfs"; | ||
60 | reg = <0x310000 0x4f0000>; | ||
61 | }; | ||
62 | }; | ||
63 | }; | ||
64 | |||
36 | apb { | 65 | apb { |
37 | serial@d0000000 { | 66 | serial@d0000000 { |
38 | status = "okay"; | 67 | status = "okay"; |
diff --git a/arch/arm/boot/dts/spear600.dtsi b/arch/arm/boot/dts/spear600.dtsi index d777e3a6f178..089f0a42c50e 100644 --- a/arch/arm/boot/dts/spear600.dtsi +++ b/arch/arm/boot/dts/spear600.dtsi | |||
@@ -177,6 +177,12 @@ | |||
177 | interrupts = <28>; | 177 | interrupts = <28>; |
178 | status = "disabled"; | 178 | status = "disabled"; |
179 | }; | 179 | }; |
180 | |||
181 | timer@f0000000 { | ||
182 | compatible = "st,spear-timer"; | ||
183 | reg = <0xf0000000 0x400>; | ||
184 | interrupts = <16>; | ||
185 | }; | ||
180 | }; | 186 | }; |
181 | }; | 187 | }; |
182 | }; | 188 | }; |
diff --git a/arch/arm/boot/dts/tegra-cardhu.dts b/arch/arm/boot/dts/tegra-cardhu.dts index 0a9f34a2c3aa..36321bceec46 100644 --- a/arch/arm/boot/dts/tegra-cardhu.dts +++ b/arch/arm/boot/dts/tegra-cardhu.dts | |||
@@ -7,10 +7,10 @@ | |||
7 | compatible = "nvidia,cardhu", "nvidia,tegra30"; | 7 | compatible = "nvidia,cardhu", "nvidia,tegra30"; |
8 | 8 | ||
9 | memory { | 9 | memory { |
10 | reg = < 0x80000000 0x40000000 >; | 10 | reg = <0x80000000 0x40000000>; |
11 | }; | 11 | }; |
12 | 12 | ||
13 | pinmux@70000000 { | 13 | pinmux { |
14 | pinctrl-names = "default"; | 14 | pinctrl-names = "default"; |
15 | pinctrl-0 = <&state_default>; | 15 | pinctrl-0 = <&state_default>; |
16 | 16 | ||
@@ -51,64 +51,122 @@ | |||
51 | nvidia,pull = <2>; | 51 | nvidia,pull = <2>; |
52 | nvidia,tristate = <0>; | 52 | nvidia,tristate = <0>; |
53 | }; | 53 | }; |
54 | dap2_fs_pa2 { | ||
55 | nvidia,pins = "dap2_fs_pa2", | ||
56 | "dap2_sclk_pa3", | ||
57 | "dap2_din_pa4", | ||
58 | "dap2_dout_pa5"; | ||
59 | nvidia,function = "i2s1"; | ||
60 | nvidia,pull = <0>; | ||
61 | nvidia,tristate = <0>; | ||
62 | }; | ||
54 | }; | 63 | }; |
55 | }; | 64 | }; |
56 | 65 | ||
57 | serial@70006000 { | 66 | serial@70006000 { |
58 | clock-frequency = < 408000000 >; | 67 | status = "okay"; |
59 | }; | 68 | clock-frequency = <408000000>; |
60 | |||
61 | serial@70006040 { | ||
62 | status = "disable"; | ||
63 | }; | ||
64 | |||
65 | serial@70006200 { | ||
66 | status = "disable"; | ||
67 | }; | ||
68 | |||
69 | serial@70006300 { | ||
70 | status = "disable"; | ||
71 | }; | ||
72 | |||
73 | serial@70006400 { | ||
74 | status = "disable"; | ||
75 | }; | 69 | }; |
76 | 70 | ||
77 | i2c@7000c000 { | 71 | i2c@7000c000 { |
72 | status = "okay"; | ||
78 | clock-frequency = <100000>; | 73 | clock-frequency = <100000>; |
79 | }; | 74 | }; |
80 | 75 | ||
81 | i2c@7000c400 { | 76 | i2c@7000c400 { |
77 | status = "okay"; | ||
82 | clock-frequency = <100000>; | 78 | clock-frequency = <100000>; |
83 | }; | 79 | }; |
84 | 80 | ||
85 | i2c@7000c500 { | 81 | i2c@7000c500 { |
82 | status = "okay"; | ||
86 | clock-frequency = <100000>; | 83 | clock-frequency = <100000>; |
84 | |||
85 | /* ALS and Proximity sensor */ | ||
86 | isl29028@44 { | ||
87 | compatible = "isil,isl29028"; | ||
88 | reg = <0x44>; | ||
89 | interrupt-parent = <&gpio>; | ||
90 | interrupts = <88 0x04>; /*gpio PL0 */ | ||
91 | }; | ||
87 | }; | 92 | }; |
88 | 93 | ||
89 | i2c@7000c700 { | 94 | i2c@7000c700 { |
95 | status = "okay"; | ||
90 | clock-frequency = <100000>; | 96 | clock-frequency = <100000>; |
91 | }; | 97 | }; |
92 | 98 | ||
93 | i2c@7000d000 { | 99 | i2c@7000d000 { |
100 | status = "okay"; | ||
94 | clock-frequency = <100000>; | 101 | clock-frequency = <100000>; |
102 | |||
103 | wm8903: wm8903@1a { | ||
104 | compatible = "wlf,wm8903"; | ||
105 | reg = <0x1a>; | ||
106 | interrupt-parent = <&gpio>; | ||
107 | interrupts = <179 0x04>; /* gpio PW3 */ | ||
108 | |||
109 | gpio-controller; | ||
110 | #gpio-cells = <2>; | ||
111 | |||
112 | micdet-cfg = <0>; | ||
113 | micdet-delay = <100>; | ||
114 | gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>; | ||
115 | }; | ||
116 | |||
117 | tps62361 { | ||
118 | compatible = "ti,tps62361"; | ||
119 | reg = <0x60>; | ||
120 | |||
121 | regulator-name = "tps62361-vout"; | ||
122 | regulator-min-microvolt = <500000>; | ||
123 | regulator-max-microvolt = <1500000>; | ||
124 | regulator-boot-on; | ||
125 | regulator-always-on; | ||
126 | ti,vsel0-state-high; | ||
127 | ti,vsel1-state-high; | ||
128 | }; | ||
129 | }; | ||
130 | |||
131 | ahub { | ||
132 | i2s@70080400 { | ||
133 | status = "okay"; | ||
134 | }; | ||
95 | }; | 135 | }; |
96 | 136 | ||
97 | sdhci@78000000 { | 137 | sdhci@78000000 { |
138 | status = "okay"; | ||
98 | cd-gpios = <&gpio 69 0>; /* gpio PI5 */ | 139 | cd-gpios = <&gpio 69 0>; /* gpio PI5 */ |
99 | wp-gpios = <&gpio 155 0>; /* gpio PT3 */ | 140 | wp-gpios = <&gpio 155 0>; /* gpio PT3 */ |
100 | power-gpios = <&gpio 31 0>; /* gpio PD7 */ | 141 | power-gpios = <&gpio 31 0>; /* gpio PD7 */ |
142 | bus-width = <4>; | ||
101 | }; | 143 | }; |
102 | 144 | ||
103 | sdhci@78000200 { | 145 | sdhci@78000600 { |
104 | status = "disable"; | 146 | status = "okay"; |
147 | support-8bit; | ||
148 | bus-width = <8>; | ||
105 | }; | 149 | }; |
106 | 150 | ||
107 | sdhci@78000400 { | 151 | sound { |
108 | status = "disable"; | 152 | compatible = "nvidia,tegra-audio-wm8903-cardhu", |
109 | }; | 153 | "nvidia,tegra-audio-wm8903"; |
154 | nvidia,model = "NVIDIA Tegra Cardhu"; | ||
110 | 155 | ||
111 | sdhci@78000400 { | 156 | nvidia,audio-routing = |
112 | support-8bit; | 157 | "Headphone Jack", "HPOUTR", |
158 | "Headphone Jack", "HPOUTL", | ||
159 | "Int Spk", "ROP", | ||
160 | "Int Spk", "RON", | ||
161 | "Int Spk", "LOP", | ||
162 | "Int Spk", "LON", | ||
163 | "Mic Jack", "MICBIAS", | ||
164 | "IN1L", "Mic Jack"; | ||
165 | |||
166 | nvidia,i2s-controller = <&tegra_i2s1>; | ||
167 | nvidia,audio-codec = <&wm8903>; | ||
168 | |||
169 | nvidia,spkr-en-gpios = <&wm8903 2 0>; | ||
170 | nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */ | ||
113 | }; | 171 | }; |
114 | }; | 172 | }; |
diff --git a/arch/arm/boot/dts/tegra-harmony.dts b/arch/arm/boot/dts/tegra-harmony.dts index 1a0b1f182944..7de701365fce 100644 --- a/arch/arm/boot/dts/tegra-harmony.dts +++ b/arch/arm/boot/dts/tegra-harmony.dts | |||
@@ -6,11 +6,11 @@ | |||
6 | model = "NVIDIA Tegra2 Harmony evaluation board"; | 6 | model = "NVIDIA Tegra2 Harmony evaluation board"; |
7 | compatible = "nvidia,harmony", "nvidia,tegra20"; | 7 | compatible = "nvidia,harmony", "nvidia,tegra20"; |
8 | 8 | ||
9 | memory@0 { | 9 | memory { |
10 | reg = < 0x00000000 0x40000000 >; | 10 | reg = <0x00000000 0x40000000>; |
11 | }; | 11 | }; |
12 | 12 | ||
13 | pinmux@70000000 { | 13 | pinmux { |
14 | pinctrl-names = "default"; | 14 | pinctrl-names = "default"; |
15 | pinctrl-0 = <&state_default>; | 15 | pinctrl-0 = <&state_default>; |
16 | 16 | ||
@@ -167,28 +167,28 @@ | |||
167 | }; | 167 | }; |
168 | conf_ata { | 168 | conf_ata { |
169 | nvidia,pins = "ata", "atb", "atc", "atd", "ate", | 169 | nvidia,pins = "ata", "atb", "atc", "atd", "ate", |
170 | "cdev1", "dap1", "dtb", "gma", "gmb", | 170 | "cdev1", "cdev2", "dap1", "dtb", "gma", |
171 | "gmc", "gmd", "gme", "gpu7", "gpv", | 171 | "gmb", "gmc", "gmd", "gme", "gpu7", |
172 | "i2cp", "pta", "rm", "slxa", "slxk", | 172 | "gpv", "i2cp", "pta", "rm", "slxa", |
173 | "spia", "spib"; | 173 | "slxk", "spia", "spib", "uac"; |
174 | nvidia,pull = <0>; | 174 | nvidia,pull = <0>; |
175 | nvidia,tristate = <0>; | 175 | nvidia,tristate = <0>; |
176 | }; | 176 | }; |
177 | conf_cdev2 { | ||
178 | nvidia,pins = "cdev2", "csus", "spid", "spif"; | ||
179 | nvidia,pull = <1>; | ||
180 | nvidia,tristate = <1>; | ||
181 | }; | ||
182 | conf_ck32 { | 177 | conf_ck32 { |
183 | nvidia,pins = "ck32", "ddrc", "pmca", "pmcb", | 178 | nvidia,pins = "ck32", "ddrc", "pmca", "pmcb", |
184 | "pmcc", "pmcd", "pmce", "xm2c", "xm2d"; | 179 | "pmcc", "pmcd", "pmce", "xm2c", "xm2d"; |
185 | nvidia,pull = <0>; | 180 | nvidia,pull = <0>; |
186 | }; | 181 | }; |
182 | conf_csus { | ||
183 | nvidia,pins = "csus", "spid", "spif"; | ||
184 | nvidia,pull = <1>; | ||
185 | nvidia,tristate = <1>; | ||
186 | }; | ||
187 | conf_crtp { | 187 | conf_crtp { |
188 | nvidia,pins = "crtp", "dap2", "dap3", "dap4", | 188 | nvidia,pins = "crtp", "dap2", "dap3", "dap4", |
189 | "dtc", "dte", "dtf", "gpu", "sdio1", | 189 | "dtc", "dte", "dtf", "gpu", "sdio1", |
190 | "slxc", "slxd", "spdi", "spdo", "spig", | 190 | "slxc", "slxd", "spdi", "spdo", "spig", |
191 | "uac", "uda"; | 191 | "uda"; |
192 | nvidia,pull = <0>; | 192 | nvidia,pull = <0>; |
193 | nvidia,tristate = <1>; | 193 | nvidia,tristate = <1>; |
194 | }; | 194 | }; |
@@ -234,42 +234,81 @@ | |||
234 | }; | 234 | }; |
235 | }; | 235 | }; |
236 | 236 | ||
237 | pmc@7000f400 { | 237 | i2s@70002800 { |
238 | nvidia,invert-interrupt; | 238 | status = "okay"; |
239 | }; | ||
240 | |||
241 | serial@70006300 { | ||
242 | status = "okay"; | ||
243 | clock-frequency = <216000000>; | ||
239 | }; | 244 | }; |
240 | 245 | ||
241 | i2c@7000c000 { | 246 | i2c@7000c000 { |
247 | status = "okay"; | ||
242 | clock-frequency = <400000>; | 248 | clock-frequency = <400000>; |
243 | 249 | ||
244 | wm8903: wm8903@1a { | 250 | wm8903: wm8903@1a { |
245 | compatible = "wlf,wm8903"; | 251 | compatible = "wlf,wm8903"; |
246 | reg = <0x1a>; | 252 | reg = <0x1a>; |
247 | interrupt-parent = <&gpio>; | 253 | interrupt-parent = <&gpio>; |
248 | interrupts = < 187 0x04 >; | 254 | interrupts = <187 0x04>; |
249 | 255 | ||
250 | gpio-controller; | 256 | gpio-controller; |
251 | #gpio-cells = <2>; | 257 | #gpio-cells = <2>; |
252 | 258 | ||
253 | micdet-cfg = <0>; | 259 | micdet-cfg = <0>; |
254 | micdet-delay = <100>; | 260 | micdet-delay = <100>; |
255 | gpio-cfg = < 0xffffffff 0xffffffff 0 0xffffffff 0xffffffff >; | 261 | gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>; |
256 | }; | 262 | }; |
257 | }; | 263 | }; |
258 | 264 | ||
259 | i2c@7000c400 { | 265 | i2c@7000c400 { |
266 | status = "okay"; | ||
260 | clock-frequency = <400000>; | 267 | clock-frequency = <400000>; |
261 | }; | 268 | }; |
262 | 269 | ||
263 | i2c@7000c500 { | 270 | i2c@7000c500 { |
271 | status = "okay"; | ||
264 | clock-frequency = <400000>; | 272 | clock-frequency = <400000>; |
265 | }; | 273 | }; |
266 | 274 | ||
267 | i2c@7000d000 { | 275 | i2c@7000d000 { |
276 | status = "okay"; | ||
268 | clock-frequency = <400000>; | 277 | clock-frequency = <400000>; |
269 | }; | 278 | }; |
270 | 279 | ||
271 | i2s@70002a00 { | 280 | pmc { |
272 | status = "disable"; | 281 | nvidia,invert-interrupt; |
282 | }; | ||
283 | |||
284 | usb@c5000000 { | ||
285 | status = "okay"; | ||
286 | }; | ||
287 | |||
288 | usb@c5004000 { | ||
289 | status = "okay"; | ||
290 | nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */ | ||
291 | }; | ||
292 | |||
293 | usb@c5008000 { | ||
294 | status = "okay"; | ||
295 | }; | ||
296 | |||
297 | sdhci@c8000200 { | ||
298 | status = "okay"; | ||
299 | cd-gpios = <&gpio 69 0>; /* gpio PI5 */ | ||
300 | wp-gpios = <&gpio 57 0>; /* gpio PH1 */ | ||
301 | power-gpios = <&gpio 155 0>; /* gpio PT3 */ | ||
302 | bus-width = <4>; | ||
303 | }; | ||
304 | |||
305 | sdhci@c8000600 { | ||
306 | status = "okay"; | ||
307 | cd-gpios = <&gpio 58 0>; /* gpio PH2 */ | ||
308 | wp-gpios = <&gpio 59 0>; /* gpio PH3 */ | ||
309 | power-gpios = <&gpio 70 0>; /* gpio PI6 */ | ||
310 | support-8bit; | ||
311 | bus-width = <8>; | ||
273 | }; | 312 | }; |
274 | 313 | ||
275 | sound { | 314 | sound { |
@@ -295,45 +334,4 @@ | |||
295 | nvidia,int-mic-en-gpios = <&gpio 184 0>; /*gpio PX0 */ | 334 | nvidia,int-mic-en-gpios = <&gpio 184 0>; /*gpio PX0 */ |
296 | nvidia,ext-mic-en-gpios = <&gpio 185 0>; /* gpio PX1 */ | 335 | nvidia,ext-mic-en-gpios = <&gpio 185 0>; /* gpio PX1 */ |
297 | }; | 336 | }; |
298 | |||
299 | serial@70006000 { | ||
300 | status = "disable"; | ||
301 | }; | ||
302 | |||
303 | serial@70006040 { | ||
304 | status = "disable"; | ||
305 | }; | ||
306 | |||
307 | serial@70006200 { | ||
308 | status = "disable"; | ||
309 | }; | ||
310 | |||
311 | serial@70006300 { | ||
312 | clock-frequency = < 216000000 >; | ||
313 | }; | ||
314 | |||
315 | serial@70006400 { | ||
316 | status = "disable"; | ||
317 | }; | ||
318 | |||
319 | sdhci@c8000000 { | ||
320 | status = "disable"; | ||
321 | }; | ||
322 | |||
323 | sdhci@c8000200 { | ||
324 | cd-gpios = <&gpio 69 0>; /* gpio PI5 */ | ||
325 | wp-gpios = <&gpio 57 0>; /* gpio PH1 */ | ||
326 | power-gpios = <&gpio 155 0>; /* gpio PT3 */ | ||
327 | }; | ||
328 | |||
329 | sdhci@c8000400 { | ||
330 | status = "disable"; | ||
331 | }; | ||
332 | |||
333 | sdhci@c8000600 { | ||
334 | cd-gpios = <&gpio 58 0>; /* gpio PH2 */ | ||
335 | wp-gpios = <&gpio 59 0>; /* gpio PH3 */ | ||
336 | power-gpios = <&gpio 70 0>; /* gpio PI6 */ | ||
337 | support-8bit; | ||
338 | }; | ||
339 | }; | 337 | }; |
diff --git a/arch/arm/boot/dts/tegra-paz00.dts b/arch/arm/boot/dts/tegra-paz00.dts index 10943fb2561c..bfeb117d5aea 100644 --- a/arch/arm/boot/dts/tegra-paz00.dts +++ b/arch/arm/boot/dts/tegra-paz00.dts | |||
@@ -6,11 +6,11 @@ | |||
6 | model = "Toshiba AC100 / Dynabook AZ"; | 6 | model = "Toshiba AC100 / Dynabook AZ"; |
7 | compatible = "compal,paz00", "nvidia,tegra20"; | 7 | compatible = "compal,paz00", "nvidia,tegra20"; |
8 | 8 | ||
9 | memory@0 { | 9 | memory { |
10 | reg = <0x00000000 0x20000000>; | 10 | reg = <0x00000000 0x20000000>; |
11 | }; | 11 | }; |
12 | 12 | ||
13 | pinmux@70000000 { | 13 | pinmux { |
14 | pinctrl-names = "default"; | 14 | pinctrl-names = "default"; |
15 | pinctrl-0 = <&state_default>; | 15 | pinctrl-0 = <&state_default>; |
16 | 16 | ||
@@ -159,18 +159,14 @@ | |||
159 | }; | 159 | }; |
160 | conf_ata { | 160 | conf_ata { |
161 | nvidia,pins = "ata", "atb", "atc", "atd", "ate", | 161 | nvidia,pins = "ata", "atb", "atc", "atd", "ate", |
162 | "cdev1", "dap1", "dap2", "dtf", "gma", | 162 | "cdev1", "cdev2", "dap1", "dap2", "dtf", |
163 | "gmb", "gmc", "gmd", "gme", "gpu", | 163 | "gma", "gmb", "gmc", "gmd", "gme", |
164 | "gpu7", "gpv", "i2cp", "pta", "rm", | 164 | "gpu", "gpu7", "gpv", "i2cp", "pta", |
165 | "sdio1", "slxk", "spdo", "uac", "uda"; | 165 | "rm", "sdio1", "slxk", "spdo", "uac", |
166 | "uda"; | ||
166 | nvidia,pull = <0>; | 167 | nvidia,pull = <0>; |
167 | nvidia,tristate = <0>; | 168 | nvidia,tristate = <0>; |
168 | }; | 169 | }; |
169 | conf_cdev2 { | ||
170 | nvidia,pins = "cdev2"; | ||
171 | nvidia,pull = <1>; | ||
172 | nvidia,tristate = <0>; | ||
173 | }; | ||
174 | conf_ck32 { | 170 | conf_ck32 { |
175 | nvidia,pins = "ck32", "ddrc", "pmca", "pmcb", | 171 | nvidia,pins = "ck32", "ddrc", "pmca", "pmcb", |
176 | "pmcc", "pmcd", "pmce", "xm2c", "xm2d"; | 172 | "pmcc", "pmcd", "pmce", "xm2c", "xm2d"; |
@@ -230,7 +226,22 @@ | |||
230 | }; | 226 | }; |
231 | }; | 227 | }; |
232 | 228 | ||
229 | i2s@70002800 { | ||
230 | status = "okay"; | ||
231 | }; | ||
232 | |||
233 | serial@70006000 { | ||
234 | status = "okay"; | ||
235 | clock-frequency = <216000000>; | ||
236 | }; | ||
237 | |||
238 | serial@70006200 { | ||
239 | status = "okay"; | ||
240 | clock-frequency = <216000000>; | ||
241 | }; | ||
242 | |||
233 | i2c@7000c000 { | 243 | i2c@7000c000 { |
244 | status = "okay"; | ||
234 | clock-frequency = <400000>; | 245 | clock-frequency = <400000>; |
235 | 246 | ||
236 | alc5632: alc5632@1e { | 247 | alc5632: alc5632@1e { |
@@ -242,25 +253,23 @@ | |||
242 | }; | 253 | }; |
243 | 254 | ||
244 | i2c@7000c400 { | 255 | i2c@7000c400 { |
256 | status = "okay"; | ||
245 | clock-frequency = <400000>; | 257 | clock-frequency = <400000>; |
246 | }; | 258 | }; |
247 | 259 | ||
248 | i2c@7000c500 { | 260 | nvec { |
249 | status = "disable"; | ||
250 | }; | ||
251 | |||
252 | nvec@7000c500 { | ||
253 | #address-cells = <1>; | ||
254 | #size-cells = <0>; | ||
255 | compatible = "nvidia,nvec"; | 261 | compatible = "nvidia,nvec"; |
256 | reg = <0x7000C500 0x100>; | 262 | reg = <0x7000c500 0x100>; |
257 | interrupts = <0 92 0x04>; | 263 | interrupts = <0 92 0x04>; |
264 | #address-cells = <1>; | ||
265 | #size-cells = <0>; | ||
258 | clock-frequency = <80000>; | 266 | clock-frequency = <80000>; |
259 | request-gpios = <&gpio 170 0>; | 267 | request-gpios = <&gpio 170 0>; /* gpio PV2 */ |
260 | slave-addr = <138>; | 268 | slave-addr = <138>; |
261 | }; | 269 | }; |
262 | 270 | ||
263 | i2c@7000d000 { | 271 | i2c@7000d000 { |
272 | status = "okay"; | ||
264 | clock-frequency = <400000>; | 273 | clock-frequency = <400000>; |
265 | 274 | ||
266 | adt7461@4c { | 275 | adt7461@4c { |
@@ -269,66 +278,31 @@ | |||
269 | }; | 278 | }; |
270 | }; | 279 | }; |
271 | 280 | ||
272 | i2s@70002a00 { | 281 | usb@c5000000 { |
273 | status = "disable"; | 282 | status = "okay"; |
274 | }; | ||
275 | |||
276 | sound { | ||
277 | compatible = "nvidia,tegra-audio-alc5632-paz00", | ||
278 | "nvidia,tegra-audio-alc5632"; | ||
279 | |||
280 | nvidia,model = "Compal PAZ00"; | ||
281 | |||
282 | nvidia,audio-routing = | ||
283 | "Int Spk", "SPKOUT", | ||
284 | "Int Spk", "SPKOUTN", | ||
285 | "Headset Mic", "MICBIAS1", | ||
286 | "MIC1", "Headset Mic", | ||
287 | "Headset Stereophone", "HPR", | ||
288 | "Headset Stereophone", "HPL", | ||
289 | "DMICDAT", "Digital Mic"; | ||
290 | |||
291 | nvidia,audio-codec = <&alc5632>; | ||
292 | nvidia,i2s-controller = <&tegra_i2s1>; | ||
293 | nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */ | ||
294 | }; | ||
295 | |||
296 | serial@70006000 { | ||
297 | clock-frequency = <216000000>; | ||
298 | }; | 283 | }; |
299 | 284 | ||
300 | serial@70006040 { | 285 | usb@c5004000 { |
301 | status = "disable"; | 286 | status = "okay"; |
287 | nvidia,phy-reset-gpio = <&gpio 168 0>; /* gpio PV0 */ | ||
302 | }; | 288 | }; |
303 | 289 | ||
304 | serial@70006200 { | 290 | usb@c5008000 { |
305 | clock-frequency = <216000000>; | 291 | status = "okay"; |
306 | }; | ||
307 | |||
308 | serial@70006300 { | ||
309 | status = "disable"; | ||
310 | }; | ||
311 | |||
312 | serial@70006400 { | ||
313 | status = "disable"; | ||
314 | }; | 292 | }; |
315 | 293 | ||
316 | sdhci@c8000000 { | 294 | sdhci@c8000000 { |
295 | status = "okay"; | ||
317 | cd-gpios = <&gpio 173 0>; /* gpio PV5 */ | 296 | cd-gpios = <&gpio 173 0>; /* gpio PV5 */ |
318 | wp-gpios = <&gpio 57 0>; /* gpio PH1 */ | 297 | wp-gpios = <&gpio 57 0>; /* gpio PH1 */ |
319 | power-gpios = <&gpio 169 0>; /* gpio PV1 */ | 298 | power-gpios = <&gpio 169 0>; /* gpio PV1 */ |
320 | }; | 299 | bus-width = <4>; |
321 | |||
322 | sdhci@c8000200 { | ||
323 | status = "disable"; | ||
324 | }; | ||
325 | |||
326 | sdhci@c8000400 { | ||
327 | status = "disable"; | ||
328 | }; | 300 | }; |
329 | 301 | ||
330 | sdhci@c8000600 { | 302 | sdhci@c8000600 { |
303 | status = "okay"; | ||
331 | support-8bit; | 304 | support-8bit; |
305 | bus-width = <8>; | ||
332 | }; | 306 | }; |
333 | 307 | ||
334 | gpio-keys { | 308 | gpio-keys { |
@@ -347,8 +321,28 @@ | |||
347 | 321 | ||
348 | wifi { | 322 | wifi { |
349 | label = "wifi-led"; | 323 | label = "wifi-led"; |
350 | gpios = <&gpio 24 0>; | 324 | gpios = <&gpio 24 0>; /* gpio PD0 */ |
351 | linux,default-trigger = "rfkill0"; | 325 | linux,default-trigger = "rfkill0"; |
352 | }; | 326 | }; |
353 | }; | 327 | }; |
328 | |||
329 | sound { | ||
330 | compatible = "nvidia,tegra-audio-alc5632-paz00", | ||
331 | "nvidia,tegra-audio-alc5632"; | ||
332 | |||
333 | nvidia,model = "Compal PAZ00"; | ||
334 | |||
335 | nvidia,audio-routing = | ||
336 | "Int Spk", "SPKOUT", | ||
337 | "Int Spk", "SPKOUTN", | ||
338 | "Headset Mic", "MICBIAS1", | ||
339 | "MIC1", "Headset Mic", | ||
340 | "Headset Stereophone", "HPR", | ||
341 | "Headset Stereophone", "HPL", | ||
342 | "DMICDAT", "Digital Mic"; | ||
343 | |||
344 | nvidia,audio-codec = <&alc5632>; | ||
345 | nvidia,i2s-controller = <&tegra_i2s1>; | ||
346 | nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */ | ||
347 | }; | ||
354 | }; | 348 | }; |
diff --git a/arch/arm/boot/dts/tegra-seaboard.dts b/arch/arm/boot/dts/tegra-seaboard.dts index ec33116f5df9..89cb7f2acd92 100644 --- a/arch/arm/boot/dts/tegra-seaboard.dts +++ b/arch/arm/boot/dts/tegra-seaboard.dts | |||
@@ -7,11 +7,10 @@ | |||
7 | compatible = "nvidia,seaboard", "nvidia,tegra20"; | 7 | compatible = "nvidia,seaboard", "nvidia,tegra20"; |
8 | 8 | ||
9 | memory { | 9 | memory { |
10 | device_type = "memory"; | 10 | reg = <0x00000000 0x40000000>; |
11 | reg = < 0x00000000 0x40000000 >; | ||
12 | }; | 11 | }; |
13 | 12 | ||
14 | pinmux@70000000 { | 13 | pinmux { |
15 | pinctrl-names = "default"; | 14 | pinctrl-names = "default"; |
16 | pinctrl-0 = <&state_default>; | 15 | pinctrl-0 = <&state_default>; |
17 | 16 | ||
@@ -100,7 +99,7 @@ | |||
100 | }; | 99 | }; |
101 | hdint { | 100 | hdint { |
102 | nvidia,pins = "hdint", "lpw0", "lpw2", "lsc1", | 101 | nvidia,pins = "hdint", "lpw0", "lpw2", "lsc1", |
103 | "lsck", "lsda", "pta"; | 102 | "lsck", "lsda"; |
104 | nvidia,function = "hdmi"; | 103 | nvidia,function = "hdmi"; |
105 | }; | 104 | }; |
106 | i2cp { | 105 | i2cp { |
@@ -134,6 +133,10 @@ | |||
134 | nvidia,pins = "pmc"; | 133 | nvidia,pins = "pmc"; |
135 | nvidia,function = "pwr_on"; | 134 | nvidia,function = "pwr_on"; |
136 | }; | 135 | }; |
136 | pta { | ||
137 | nvidia,pins = "pta"; | ||
138 | nvidia,function = "i2c2"; | ||
139 | }; | ||
137 | rm { | 140 | rm { |
138 | nvidia,pins = "rm"; | 141 | nvidia,pins = "rm"; |
139 | nvidia,function = "i2c1"; | 142 | nvidia,function = "i2c1"; |
@@ -254,108 +257,148 @@ | |||
254 | }; | 257 | }; |
255 | }; | 258 | }; |
256 | 259 | ||
260 | i2s@70002800 { | ||
261 | status = "okay"; | ||
262 | }; | ||
263 | |||
264 | serial@70006300 { | ||
265 | status = "okay"; | ||
266 | clock-frequency = <216000000>; | ||
267 | }; | ||
268 | |||
257 | i2c@7000c000 { | 269 | i2c@7000c000 { |
270 | status = "okay"; | ||
258 | clock-frequency = <400000>; | 271 | clock-frequency = <400000>; |
259 | 272 | ||
260 | wm8903: wm8903@1a { | 273 | wm8903: wm8903@1a { |
261 | compatible = "wlf,wm8903"; | 274 | compatible = "wlf,wm8903"; |
262 | reg = <0x1a>; | 275 | reg = <0x1a>; |
263 | interrupt-parent = <&gpio>; | 276 | interrupt-parent = <&gpio>; |
264 | interrupts = < 187 0x04 >; | 277 | interrupts = <187 0x04>; |
265 | 278 | ||
266 | gpio-controller; | 279 | gpio-controller; |
267 | #gpio-cells = <2>; | 280 | #gpio-cells = <2>; |
268 | 281 | ||
269 | micdet-cfg = <0>; | 282 | micdet-cfg = <0>; |
270 | micdet-delay = <100>; | 283 | micdet-delay = <100>; |
271 | gpio-cfg = < 0xffffffff 0xffffffff 0 0xffffffff 0xffffffff >; | 284 | gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>; |
285 | }; | ||
286 | |||
287 | /* ALS and proximity sensor */ | ||
288 | isl29018@44 { | ||
289 | compatible = "isil,isl29018"; | ||
290 | reg = <0x44>; | ||
291 | interrupt-parent = <&gpio>; | ||
292 | interrupts = <202 0x04>; /* GPIO PZ2 */ | ||
293 | }; | ||
294 | |||
295 | gyrometer@68 { | ||
296 | compatible = "invn,mpu3050"; | ||
297 | reg = <0x68>; | ||
298 | interrupt-parent = <&gpio>; | ||
299 | interrupts = <204 0x04>; /* gpio PZ4 */ | ||
272 | }; | 300 | }; |
273 | }; | 301 | }; |
274 | 302 | ||
275 | i2c@7000c400 { | 303 | i2c@7000c400 { |
276 | clock-frequency = <400000>; | 304 | status = "okay"; |
305 | clock-frequency = <100000>; | ||
306 | |||
307 | smart-battery@b { | ||
308 | compatible = "ti,bq20z75", "smart-battery-1.1"; | ||
309 | reg = <0xb>; | ||
310 | ti,i2c-retry-count = <2>; | ||
311 | ti,poll-retry-count = <10>; | ||
312 | }; | ||
277 | }; | 313 | }; |
278 | 314 | ||
279 | i2c@7000c500 { | 315 | i2c@7000c500 { |
316 | status = "okay"; | ||
280 | clock-frequency = <400000>; | 317 | clock-frequency = <400000>; |
281 | }; | 318 | }; |
282 | 319 | ||
283 | i2c@7000d000 { | 320 | i2c@7000d000 { |
321 | status = "okay"; | ||
284 | clock-frequency = <400000>; | 322 | clock-frequency = <400000>; |
285 | 323 | ||
286 | adt7461@4c { | 324 | temperature-sensor@4c { |
287 | compatible = "adt7461"; | 325 | compatible = "nct1008"; |
288 | reg = <0x4c>; | 326 | reg = <0x4c>; |
289 | }; | 327 | }; |
290 | }; | ||
291 | |||
292 | i2s@70002a00 { | ||
293 | status = "disable"; | ||
294 | }; | ||
295 | |||
296 | sound { | ||
297 | compatible = "nvidia,tegra-audio-wm8903-seaboard", | ||
298 | "nvidia,tegra-audio-wm8903"; | ||
299 | nvidia,model = "NVIDIA Tegra Seaboard"; | ||
300 | |||
301 | nvidia,audio-routing = | ||
302 | "Headphone Jack", "HPOUTR", | ||
303 | "Headphone Jack", "HPOUTL", | ||
304 | "Int Spk", "ROP", | ||
305 | "Int Spk", "RON", | ||
306 | "Int Spk", "LOP", | ||
307 | "Int Spk", "LON", | ||
308 | "Mic Jack", "MICBIAS", | ||
309 | "IN1R", "Mic Jack"; | ||
310 | |||
311 | nvidia,i2s-controller = <&tegra_i2s1>; | ||
312 | nvidia,audio-codec = <&wm8903>; | ||
313 | |||
314 | nvidia,spkr-en-gpios = <&wm8903 2 0>; | ||
315 | nvidia,hp-det-gpios = <&gpio 185 0>; /* gpio PX1 */ | ||
316 | }; | ||
317 | 328 | ||
318 | serial@70006000 { | 329 | magnetometer@c { |
319 | status = "disable"; | 330 | compatible = "ak8975"; |
320 | }; | 331 | reg = <0xc>; |
321 | 332 | interrupt-parent = <&gpio>; | |
322 | serial@70006040 { | 333 | interrupts = <109 0x04>; /* gpio PN5 */ |
323 | status = "disable"; | 334 | }; |
324 | }; | 335 | }; |
325 | 336 | ||
326 | serial@70006200 { | 337 | emc { |
327 | status = "disable"; | 338 | emc-table@190000 { |
328 | }; | 339 | reg = <190000>; |
340 | compatible = "nvidia,tegra20-emc-table"; | ||
341 | clock-frequency = <190000>; | ||
342 | nvidia,emc-registers = <0x0000000c 0x00000026 | ||
343 | 0x00000009 0x00000003 0x00000004 0x00000004 | ||
344 | 0x00000002 0x0000000c 0x00000003 0x00000003 | ||
345 | 0x00000002 0x00000001 0x00000004 0x00000005 | ||
346 | 0x00000004 0x00000009 0x0000000d 0x0000059f | ||
347 | 0x00000000 0x00000003 0x00000003 0x00000003 | ||
348 | 0x00000003 0x00000001 0x0000000b 0x000000c8 | ||
349 | 0x00000003 0x00000007 0x00000004 0x0000000f | ||
350 | 0x00000002 0x00000000 0x00000000 0x00000002 | ||
351 | 0x00000000 0x00000000 0x00000083 0xa06204ae | ||
352 | 0x007dc010 0x00000000 0x00000000 0x00000000 | ||
353 | 0x00000000 0x00000000 0x00000000 0x00000000>; | ||
354 | }; | ||
329 | 355 | ||
330 | serial@70006300 { | 356 | emc-table@380000 { |
331 | clock-frequency = < 216000000 >; | 357 | reg = <380000>; |
358 | compatible = "nvidia,tegra20-emc-table"; | ||
359 | clock-frequency = <380000>; | ||
360 | nvidia,emc-registers = <0x00000017 0x0000004b | ||
361 | 0x00000012 0x00000006 0x00000004 0x00000005 | ||
362 | 0x00000003 0x0000000c 0x00000006 0x00000006 | ||
363 | 0x00000003 0x00000001 0x00000004 0x00000005 | ||
364 | 0x00000004 0x00000009 0x0000000d 0x00000b5f | ||
365 | 0x00000000 0x00000003 0x00000003 0x00000006 | ||
366 | 0x00000006 0x00000001 0x00000011 0x000000c8 | ||
367 | 0x00000003 0x0000000e 0x00000007 0x0000000f | ||
368 | 0x00000002 0x00000000 0x00000000 0x00000002 | ||
369 | 0x00000000 0x00000000 0x00000083 0xe044048b | ||
370 | 0x007d8010 0x00000000 0x00000000 0x00000000 | ||
371 | 0x00000000 0x00000000 0x00000000 0x00000000>; | ||
372 | }; | ||
332 | }; | 373 | }; |
333 | 374 | ||
334 | serial@70006400 { | 375 | usb@c5000000 { |
335 | status = "disable"; | 376 | status = "okay"; |
377 | nvidia,vbus-gpio = <&gpio 24 0>; /* PD0 */ | ||
378 | dr_mode = "otg"; | ||
336 | }; | 379 | }; |
337 | 380 | ||
338 | sdhci@c8000000 { | 381 | usb@c5004000 { |
339 | status = "disable"; | 382 | status = "okay"; |
383 | nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */ | ||
340 | }; | 384 | }; |
341 | 385 | ||
342 | sdhci@c8000200 { | 386 | usb@c5008000 { |
343 | status = "disable"; | 387 | status = "okay"; |
344 | }; | 388 | }; |
345 | 389 | ||
346 | sdhci@c8000400 { | 390 | sdhci@c8000400 { |
391 | status = "okay"; | ||
347 | cd-gpios = <&gpio 69 0>; /* gpio PI5 */ | 392 | cd-gpios = <&gpio 69 0>; /* gpio PI5 */ |
348 | wp-gpios = <&gpio 57 0>; /* gpio PH1 */ | 393 | wp-gpios = <&gpio 57 0>; /* gpio PH1 */ |
349 | power-gpios = <&gpio 70 0>; /* gpio PI6 */ | 394 | power-gpios = <&gpio 70 0>; /* gpio PI6 */ |
395 | bus-width = <4>; | ||
350 | }; | 396 | }; |
351 | 397 | ||
352 | sdhci@c8000600 { | 398 | sdhci@c8000600 { |
399 | status = "okay"; | ||
353 | support-8bit; | 400 | support-8bit; |
354 | }; | 401 | bus-width = <8>; |
355 | |||
356 | usb@c5000000 { | ||
357 | nvidia,vbus-gpio = <&gpio 24 0>; /* PD0 */ | ||
358 | dr_mode = "otg"; | ||
359 | }; | 402 | }; |
360 | 403 | ||
361 | gpio-keys { | 404 | gpio-keys { |
@@ -378,41 +421,25 @@ | |||
378 | }; | 421 | }; |
379 | }; | 422 | }; |
380 | 423 | ||
381 | emc@7000f400 { | 424 | sound { |
382 | emc-table@190000 { | 425 | compatible = "nvidia,tegra-audio-wm8903-seaboard", |
383 | reg = < 190000 >; | 426 | "nvidia,tegra-audio-wm8903"; |
384 | compatible = "nvidia,tegra20-emc-table"; | 427 | nvidia,model = "NVIDIA Tegra Seaboard"; |
385 | clock-frequency = < 190000 >; | ||
386 | nvidia,emc-registers = < 0x0000000c 0x00000026 | ||
387 | 0x00000009 0x00000003 0x00000004 0x00000004 | ||
388 | 0x00000002 0x0000000c 0x00000003 0x00000003 | ||
389 | 0x00000002 0x00000001 0x00000004 0x00000005 | ||
390 | 0x00000004 0x00000009 0x0000000d 0x0000059f | ||
391 | 0x00000000 0x00000003 0x00000003 0x00000003 | ||
392 | 0x00000003 0x00000001 0x0000000b 0x000000c8 | ||
393 | 0x00000003 0x00000007 0x00000004 0x0000000f | ||
394 | 0x00000002 0x00000000 0x00000000 0x00000002 | ||
395 | 0x00000000 0x00000000 0x00000083 0xa06204ae | ||
396 | 0x007dc010 0x00000000 0x00000000 0x00000000 | ||
397 | 0x00000000 0x00000000 0x00000000 0x00000000 >; | ||
398 | }; | ||
399 | 428 | ||
400 | emc-table@380000 { | 429 | nvidia,audio-routing = |
401 | reg = < 380000 >; | 430 | "Headphone Jack", "HPOUTR", |
402 | compatible = "nvidia,tegra20-emc-table"; | 431 | "Headphone Jack", "HPOUTL", |
403 | clock-frequency = < 380000 >; | 432 | "Int Spk", "ROP", |
404 | nvidia,emc-registers = < 0x00000017 0x0000004b | 433 | "Int Spk", "RON", |
405 | 0x00000012 0x00000006 0x00000004 0x00000005 | 434 | "Int Spk", "LOP", |
406 | 0x00000003 0x0000000c 0x00000006 0x00000006 | 435 | "Int Spk", "LON", |
407 | 0x00000003 0x00000001 0x00000004 0x00000005 | 436 | "Mic Jack", "MICBIAS", |
408 | 0x00000004 0x00000009 0x0000000d 0x00000b5f | 437 | "IN1R", "Mic Jack"; |
409 | 0x00000000 0x00000003 0x00000003 0x00000006 | 438 | |
410 | 0x00000006 0x00000001 0x00000011 0x000000c8 | 439 | nvidia,i2s-controller = <&tegra_i2s1>; |
411 | 0x00000003 0x0000000e 0x00000007 0x0000000f | 440 | nvidia,audio-codec = <&wm8903>; |
412 | 0x00000002 0x00000000 0x00000000 0x00000002 | 441 | |
413 | 0x00000000 0x00000000 0x00000083 0xe044048b | 442 | nvidia,spkr-en-gpios = <&wm8903 2 0>; |
414 | 0x007d8010 0x00000000 0x00000000 0x00000000 | 443 | nvidia,hp-det-gpios = <&gpio 185 0>; /* gpio PX1 */ |
415 | 0x00000000 0x00000000 0x00000000 0x00000000 >; | ||
416 | }; | ||
417 | }; | 444 | }; |
418 | }; | 445 | }; |
diff --git a/arch/arm/boot/dts/tegra-trimslice.dts b/arch/arm/boot/dts/tegra-trimslice.dts index 98efd5b0d7f9..9de5636023f6 100644 --- a/arch/arm/boot/dts/tegra-trimslice.dts +++ b/arch/arm/boot/dts/tegra-trimslice.dts | |||
@@ -6,11 +6,11 @@ | |||
6 | model = "Compulab TrimSlice board"; | 6 | model = "Compulab TrimSlice board"; |
7 | compatible = "compulab,trimslice", "nvidia,tegra20"; | 7 | compatible = "compulab,trimslice", "nvidia,tegra20"; |
8 | 8 | ||
9 | memory@0 { | 9 | memory { |
10 | reg = < 0x00000000 0x40000000 >; | 10 | reg = <0x00000000 0x40000000>; |
11 | }; | 11 | }; |
12 | 12 | ||
13 | pinmux@70000000 { | 13 | pinmux { |
14 | pinctrl-names = "default"; | 14 | pinctrl-names = "default"; |
15 | pinctrl-0 = <&state_default>; | 15 | pinctrl-0 = <&state_default>; |
16 | 16 | ||
@@ -182,23 +182,23 @@ | |||
182 | nvidia,tristate = <1>; | 182 | nvidia,tristate = <1>; |
183 | }; | 183 | }; |
184 | conf_atb { | 184 | conf_atb { |
185 | nvidia,pins = "atb", "cdev1", "dap1", "gma", | 185 | nvidia,pins = "atb", "cdev1", "cdev2", "dap1", |
186 | "gmc", "gmd", "gpu", "gpu7", "gpv", | 186 | "gma", "gmc", "gmd", "gpu", "gpu7", |
187 | "sdio1", "slxa", "slxk", "uac"; | 187 | "gpv", "sdio1", "slxa", "slxk", "uac"; |
188 | nvidia,pull = <0>; | 188 | nvidia,pull = <0>; |
189 | nvidia,tristate = <0>; | 189 | nvidia,tristate = <0>; |
190 | }; | 190 | }; |
191 | conf_cdev2 { | ||
192 | nvidia,pins = "cdev2", "csus", "spia", "spib", | ||
193 | "spid", "spif"; | ||
194 | nvidia,pull = <1>; | ||
195 | nvidia,tristate = <1>; | ||
196 | }; | ||
197 | conf_ck32 { | 191 | conf_ck32 { |
198 | nvidia,pins = "ck32", "ddrc", "pmca", "pmcb", | 192 | nvidia,pins = "ck32", "ddrc", "pmca", "pmcb", |
199 | "pmcc", "pmcd", "pmce", "xm2c", "xm2d"; | 193 | "pmcc", "pmcd", "pmce", "xm2c", "xm2d"; |
200 | nvidia,pull = <0>; | 194 | nvidia,pull = <0>; |
201 | }; | 195 | }; |
196 | conf_csus { | ||
197 | nvidia,pins = "csus", "spia", "spib", | ||
198 | "spid", "spif"; | ||
199 | nvidia,pull = <1>; | ||
200 | nvidia,tristate = <1>; | ||
201 | }; | ||
202 | conf_ddc { | 202 | conf_ddc { |
203 | nvidia,pins = "ddc", "dtf", "rm", "sdc", "sdd"; | 203 | nvidia,pins = "ddc", "dtf", "rm", "sdc", "sdd"; |
204 | nvidia,pull = <2>; | 204 | nvidia,pull = <2>; |
@@ -240,68 +240,67 @@ | |||
240 | }; | 240 | }; |
241 | }; | 241 | }; |
242 | 242 | ||
243 | i2s@70002800 { | ||
244 | status = "okay"; | ||
245 | }; | ||
246 | |||
247 | serial@70006000 { | ||
248 | status = "okay"; | ||
249 | clock-frequency = <216000000>; | ||
250 | }; | ||
251 | |||
243 | i2c@7000c000 { | 252 | i2c@7000c000 { |
253 | status = "okay"; | ||
244 | clock-frequency = <400000>; | 254 | clock-frequency = <400000>; |
245 | }; | 255 | }; |
246 | 256 | ||
247 | i2c@7000c400 { | 257 | i2c@7000c400 { |
258 | status = "okay"; | ||
248 | clock-frequency = <400000>; | 259 | clock-frequency = <400000>; |
249 | }; | 260 | }; |
250 | 261 | ||
251 | i2c@7000c500 { | 262 | i2c@7000c500 { |
263 | status = "okay"; | ||
252 | clock-frequency = <400000>; | 264 | clock-frequency = <400000>; |
253 | }; | ||
254 | |||
255 | i2c@7000d000 { | ||
256 | status = "disable"; | ||
257 | }; | ||
258 | |||
259 | i2s@70002800 { | ||
260 | status = "disable"; | ||
261 | }; | ||
262 | |||
263 | i2s@70002a00 { | ||
264 | status = "disable"; | ||
265 | }; | ||
266 | |||
267 | das@70000c00 { | ||
268 | status = "disable"; | ||
269 | }; | ||
270 | 265 | ||
271 | serial@70006000 { | 266 | codec: codec@1a { |
272 | clock-frequency = < 216000000 >; | 267 | compatible = "ti,tlv320aic23"; |
273 | }; | 268 | reg = <0x1a>; |
269 | }; | ||
274 | 270 | ||
275 | serial@70006040 { | 271 | rtc@56 { |
276 | status = "disable"; | 272 | compatible = "emmicro,em3027"; |
273 | reg = <0x56>; | ||
274 | }; | ||
277 | }; | 275 | }; |
278 | 276 | ||
279 | serial@70006200 { | 277 | usb@c5000000 { |
280 | status = "disable"; | 278 | status = "okay"; |
281 | }; | 279 | }; |
282 | 280 | ||
283 | serial@70006300 { | 281 | usb@c5004000 { |
284 | status = "disable"; | 282 | nvidia,phy-reset-gpio = <&gpio 168 0>; /* gpio PV0 */ |
285 | }; | 283 | }; |
286 | 284 | ||
287 | serial@70006400 { | 285 | usb@c5008000 { |
288 | status = "disable"; | 286 | status = "okay"; |
289 | }; | 287 | }; |
290 | 288 | ||
291 | sdhci@c8000000 { | 289 | sdhci@c8000000 { |
292 | status = "disable"; | 290 | status = "okay"; |
291 | bus-width = <4>; | ||
293 | }; | 292 | }; |
294 | 293 | ||
295 | sdhci@c8000200 { | 294 | sdhci@c8000600 { |
296 | status = "disable"; | 295 | status = "okay"; |
297 | }; | 296 | cd-gpios = <&gpio 121 0>; /* gpio PP1 */ |
298 | 297 | wp-gpios = <&gpio 122 0>; /* gpio PP2 */ | |
299 | sdhci@c8000400 { | 298 | bus-width = <4>; |
300 | status = "disable"; | ||
301 | }; | 299 | }; |
302 | 300 | ||
303 | sdhci@c8000600 { | 301 | sound { |
304 | cd-gpios = <&gpio 121 0>; | 302 | compatible = "nvidia,tegra-audio-trimslice"; |
305 | wp-gpios = <&gpio 122 0>; | 303 | nvidia,i2s-controller = <&tegra_i2s1>; |
304 | nvidia,audio-codec = <&codec>; | ||
306 | }; | 305 | }; |
307 | }; | 306 | }; |
diff --git a/arch/arm/boot/dts/tegra-ventana.dts b/arch/arm/boot/dts/tegra-ventana.dts index 71eb2e50a668..445343b0fbdd 100644 --- a/arch/arm/boot/dts/tegra-ventana.dts +++ b/arch/arm/boot/dts/tegra-ventana.dts | |||
@@ -7,10 +7,10 @@ | |||
7 | compatible = "nvidia,ventana", "nvidia,tegra20"; | 7 | compatible = "nvidia,ventana", "nvidia,tegra20"; |
8 | 8 | ||
9 | memory { | 9 | memory { |
10 | reg = < 0x00000000 0x40000000 >; | 10 | reg = <0x00000000 0x40000000>; |
11 | }; | 11 | }; |
12 | 12 | ||
13 | pinmux@70000000 { | 13 | pinmux { |
14 | pinctrl-names = "default"; | 14 | pinctrl-names = "default"; |
15 | pinctrl-0 = <&state_default>; | 15 | pinctrl-0 = <&state_default>; |
16 | 16 | ||
@@ -240,38 +240,82 @@ | |||
240 | }; | 240 | }; |
241 | }; | 241 | }; |
242 | 242 | ||
243 | i2s@70002800 { | ||
244 | status = "okay"; | ||
245 | }; | ||
246 | |||
247 | serial@70006300 { | ||
248 | status = "okay"; | ||
249 | clock-frequency = <216000000>; | ||
250 | }; | ||
251 | |||
243 | i2c@7000c000 { | 252 | i2c@7000c000 { |
253 | status = "okay"; | ||
244 | clock-frequency = <400000>; | 254 | clock-frequency = <400000>; |
245 | 255 | ||
246 | wm8903: wm8903@1a { | 256 | wm8903: wm8903@1a { |
247 | compatible = "wlf,wm8903"; | 257 | compatible = "wlf,wm8903"; |
248 | reg = <0x1a>; | 258 | reg = <0x1a>; |
249 | interrupt-parent = <&gpio>; | 259 | interrupt-parent = <&gpio>; |
250 | interrupts = < 187 0x04 >; | 260 | interrupts = <187 0x04>; |
251 | 261 | ||
252 | gpio-controller; | 262 | gpio-controller; |
253 | #gpio-cells = <2>; | 263 | #gpio-cells = <2>; |
254 | 264 | ||
255 | micdet-cfg = <0>; | 265 | micdet-cfg = <0>; |
256 | micdet-delay = <100>; | 266 | micdet-delay = <100>; |
257 | gpio-cfg = < 0xffffffff 0xffffffff 0 0xffffffff 0xffffffff >; | 267 | gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>; |
268 | }; | ||
269 | |||
270 | /* ALS and proximity sensor */ | ||
271 | isl29018@44 { | ||
272 | compatible = "isil,isl29018"; | ||
273 | reg = <0x44>; | ||
274 | interrupt-parent = <&gpio>; | ||
275 | interrupts = <202 0x04>; /*gpio PZ2 */ | ||
258 | }; | 276 | }; |
259 | }; | 277 | }; |
260 | 278 | ||
261 | i2c@7000c400 { | 279 | i2c@7000c400 { |
280 | status = "okay"; | ||
262 | clock-frequency = <400000>; | 281 | clock-frequency = <400000>; |
263 | }; | 282 | }; |
264 | 283 | ||
265 | i2c@7000c500 { | 284 | i2c@7000c500 { |
285 | status = "okay"; | ||
266 | clock-frequency = <400000>; | 286 | clock-frequency = <400000>; |
267 | }; | 287 | }; |
268 | 288 | ||
269 | i2c@7000d000 { | 289 | i2c@7000d000 { |
290 | status = "okay"; | ||
270 | clock-frequency = <400000>; | 291 | clock-frequency = <400000>; |
271 | }; | 292 | }; |
272 | 293 | ||
273 | i2s@70002a00 { | 294 | usb@c5000000 { |
274 | status = "disable"; | 295 | status = "okay"; |
296 | }; | ||
297 | |||
298 | usb@c5004000 { | ||
299 | status = "okay"; | ||
300 | nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */ | ||
301 | }; | ||
302 | |||
303 | usb@c5008000 { | ||
304 | status = "okay"; | ||
305 | }; | ||
306 | |||
307 | sdhci@c8000400 { | ||
308 | status = "okay"; | ||
309 | cd-gpios = <&gpio 69 0>; /* gpio PI5 */ | ||
310 | wp-gpios = <&gpio 57 0>; /* gpio PH1 */ | ||
311 | power-gpios = <&gpio 70 0>; /* gpio PI6 */ | ||
312 | bus-width = <4>; | ||
313 | }; | ||
314 | |||
315 | sdhci@c8000600 { | ||
316 | status = "okay"; | ||
317 | support-8bit; | ||
318 | bus-width = <8>; | ||
275 | }; | 319 | }; |
276 | 320 | ||
277 | sound { | 321 | sound { |
@@ -294,45 +338,7 @@ | |||
294 | 338 | ||
295 | nvidia,spkr-en-gpios = <&wm8903 2 0>; | 339 | nvidia,spkr-en-gpios = <&wm8903 2 0>; |
296 | nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */ | 340 | nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */ |
297 | nvidia,int-mic-en-gpios = <&gpio 184 0>; /*gpio PX0 */ | 341 | nvidia,int-mic-en-gpios = <&gpio 184 0>; /* gpio PX0 */ |
298 | nvidia,ext-mic-en-gpios = <&gpio 185 0>; /* gpio PX1 */ | 342 | nvidia,ext-mic-en-gpios = <&gpio 185 0>; /* gpio PX1 */ |
299 | }; | 343 | }; |
300 | |||
301 | serial@70006000 { | ||
302 | status = "disable"; | ||
303 | }; | ||
304 | |||
305 | serial@70006040 { | ||
306 | status = "disable"; | ||
307 | }; | ||
308 | |||
309 | serial@70006200 { | ||
310 | status = "disable"; | ||
311 | }; | ||
312 | |||
313 | serial@70006300 { | ||
314 | clock-frequency = < 216000000 >; | ||
315 | }; | ||
316 | |||
317 | serial@70006400 { | ||
318 | status = "disable"; | ||
319 | }; | ||
320 | |||
321 | sdhci@c8000000 { | ||
322 | status = "disable"; | ||
323 | }; | ||
324 | |||
325 | sdhci@c8000200 { | ||
326 | status = "disable"; | ||
327 | }; | ||
328 | |||
329 | sdhci@c8000400 { | ||
330 | cd-gpios = <&gpio 69 0>; /* gpio PI5 */ | ||
331 | wp-gpios = <&gpio 57 0>; /* gpio PH1 */ | ||
332 | power-gpios = <&gpio 70 0>; /* gpio PI6 */ | ||
333 | }; | ||
334 | |||
335 | sdhci@c8000600 { | ||
336 | support-8bit; | ||
337 | }; | ||
338 | }; | 344 | }; |
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index 108e894a8926..c417d67e9027 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi | |||
@@ -4,207 +4,242 @@ | |||
4 | compatible = "nvidia,tegra20"; | 4 | compatible = "nvidia,tegra20"; |
5 | interrupt-parent = <&intc>; | 5 | interrupt-parent = <&intc>; |
6 | 6 | ||
7 | pmc@7000f400 { | 7 | intc: interrupt-controller { |
8 | compatible = "nvidia,tegra20-pmc"; | ||
9 | reg = <0x7000e400 0x400>; | ||
10 | }; | ||
11 | |||
12 | intc: interrupt-controller@50041000 { | ||
13 | compatible = "arm,cortex-a9-gic"; | 8 | compatible = "arm,cortex-a9-gic"; |
9 | reg = <0x50041000 0x1000 | ||
10 | 0x50040100 0x0100>; | ||
14 | interrupt-controller; | 11 | interrupt-controller; |
15 | #interrupt-cells = <3>; | 12 | #interrupt-cells = <3>; |
16 | reg = < 0x50041000 0x1000 >, | ||
17 | < 0x50040100 0x0100 >; | ||
18 | }; | 13 | }; |
19 | 14 | ||
20 | pmu { | 15 | apbdma: dma { |
21 | compatible = "arm,cortex-a9-pmu"; | ||
22 | interrupts = <0 56 0x04 | ||
23 | 0 57 0x04>; | ||
24 | }; | ||
25 | |||
26 | apbdma: dma@6000a000 { | ||
27 | compatible = "nvidia,tegra20-apbdma"; | 16 | compatible = "nvidia,tegra20-apbdma"; |
28 | reg = <0x6000a000 0x1200>; | 17 | reg = <0x6000a000 0x1200>; |
29 | interrupts = < 0 104 0x04 | 18 | interrupts = <0 104 0x04 |
30 | 0 105 0x04 | 19 | 0 105 0x04 |
31 | 0 106 0x04 | 20 | 0 106 0x04 |
32 | 0 107 0x04 | 21 | 0 107 0x04 |
33 | 0 108 0x04 | 22 | 0 108 0x04 |
34 | 0 109 0x04 | 23 | 0 109 0x04 |
35 | 0 110 0x04 | 24 | 0 110 0x04 |
36 | 0 111 0x04 | 25 | 0 111 0x04 |
37 | 0 112 0x04 | 26 | 0 112 0x04 |
38 | 0 113 0x04 | 27 | 0 113 0x04 |
39 | 0 114 0x04 | 28 | 0 114 0x04 |
40 | 0 115 0x04 | 29 | 0 115 0x04 |
41 | 0 116 0x04 | 30 | 0 116 0x04 |
42 | 0 117 0x04 | 31 | 0 117 0x04 |
43 | 0 118 0x04 | 32 | 0 118 0x04 |
44 | 0 119 0x04 >; | 33 | 0 119 0x04>; |
45 | }; | 34 | }; |
46 | 35 | ||
47 | i2c@7000c000 { | 36 | ahb { |
48 | #address-cells = <1>; | 37 | compatible = "nvidia,tegra20-ahb"; |
49 | #size-cells = <0>; | 38 | reg = <0x6000c004 0x10c>; /* AHB Arbitration + Gizmo Controller */ |
50 | compatible = "nvidia,tegra20-i2c"; | 39 | }; |
51 | reg = <0x7000C000 0x100>; | 40 | |
52 | interrupts = < 0 38 0x04 >; | 41 | gpio: gpio { |
53 | }; | 42 | compatible = "nvidia,tegra20-gpio"; |
54 | 43 | reg = <0x6000d000 0x1000>; | |
55 | i2c@7000c400 { | 44 | interrupts = <0 32 0x04 |
56 | #address-cells = <1>; | 45 | 0 33 0x04 |
57 | #size-cells = <0>; | 46 | 0 34 0x04 |
58 | compatible = "nvidia,tegra20-i2c"; | 47 | 0 35 0x04 |
59 | reg = <0x7000C400 0x100>; | 48 | 0 55 0x04 |
60 | interrupts = < 0 84 0x04 >; | 49 | 0 87 0x04 |
50 | 0 89 0x04>; | ||
51 | #gpio-cells = <2>; | ||
52 | gpio-controller; | ||
53 | #interrupt-cells = <2>; | ||
54 | interrupt-controller; | ||
61 | }; | 55 | }; |
62 | 56 | ||
63 | i2c@7000c500 { | 57 | pinmux: pinmux { |
64 | #address-cells = <1>; | 58 | compatible = "nvidia,tegra20-pinmux"; |
65 | #size-cells = <0>; | 59 | reg = <0x70000014 0x10 /* Tri-state registers */ |
66 | compatible = "nvidia,tegra20-i2c"; | 60 | 0x70000080 0x20 /* Mux registers */ |
67 | reg = <0x7000C500 0x100>; | 61 | 0x700000a0 0x14 /* Pull-up/down registers */ |
68 | interrupts = < 0 92 0x04 >; | 62 | 0x70000868 0xa8>; /* Pad control registers */ |
69 | }; | 63 | }; |
70 | 64 | ||
71 | i2c@7000d000 { | 65 | das { |
72 | #address-cells = <1>; | 66 | compatible = "nvidia,tegra20-das"; |
73 | #size-cells = <0>; | 67 | reg = <0x70000c00 0x80>; |
74 | compatible = "nvidia,tegra20-i2c-dvc"; | ||
75 | reg = <0x7000D000 0x200>; | ||
76 | interrupts = < 0 53 0x04 >; | ||
77 | }; | 68 | }; |
78 | 69 | ||
79 | tegra_i2s1: i2s@70002800 { | 70 | tegra_i2s1: i2s@70002800 { |
80 | compatible = "nvidia,tegra20-i2s"; | 71 | compatible = "nvidia,tegra20-i2s"; |
81 | reg = <0x70002800 0x200>; | 72 | reg = <0x70002800 0x200>; |
82 | interrupts = < 0 13 0x04 >; | 73 | interrupts = <0 13 0x04>; |
83 | nvidia,dma-request-selector = < &apbdma 2 >; | 74 | nvidia,dma-request-selector = <&apbdma 2>; |
75 | status = "disable"; | ||
84 | }; | 76 | }; |
85 | 77 | ||
86 | tegra_i2s2: i2s@70002a00 { | 78 | tegra_i2s2: i2s@70002a00 { |
87 | compatible = "nvidia,tegra20-i2s"; | 79 | compatible = "nvidia,tegra20-i2s"; |
88 | reg = <0x70002a00 0x200>; | 80 | reg = <0x70002a00 0x200>; |
89 | interrupts = < 0 3 0x04 >; | 81 | interrupts = <0 3 0x04>; |
90 | nvidia,dma-request-selector = < &apbdma 1 >; | 82 | nvidia,dma-request-selector = <&apbdma 1>; |
91 | }; | 83 | status = "disable"; |
92 | |||
93 | das@70000c00 { | ||
94 | compatible = "nvidia,tegra20-das"; | ||
95 | reg = <0x70000c00 0x80>; | ||
96 | }; | ||
97 | |||
98 | gpio: gpio@6000d000 { | ||
99 | compatible = "nvidia,tegra20-gpio"; | ||
100 | reg = < 0x6000d000 0x1000 >; | ||
101 | interrupts = < 0 32 0x04 | ||
102 | 0 33 0x04 | ||
103 | 0 34 0x04 | ||
104 | 0 35 0x04 | ||
105 | 0 55 0x04 | ||
106 | 0 87 0x04 | ||
107 | 0 89 0x04 >; | ||
108 | #gpio-cells = <2>; | ||
109 | gpio-controller; | ||
110 | #interrupt-cells = <2>; | ||
111 | interrupt-controller; | ||
112 | }; | ||
113 | |||
114 | pinmux: pinmux@70000000 { | ||
115 | compatible = "nvidia,tegra20-pinmux"; | ||
116 | reg = < 0x70000014 0x10 /* Tri-state registers */ | ||
117 | 0x70000080 0x20 /* Mux registers */ | ||
118 | 0x700000a0 0x14 /* Pull-up/down registers */ | ||
119 | 0x70000868 0xa8 >; /* Pad control registers */ | ||
120 | }; | 84 | }; |
121 | 85 | ||
122 | serial@70006000 { | 86 | serial@70006000 { |
123 | compatible = "nvidia,tegra20-uart"; | 87 | compatible = "nvidia,tegra20-uart"; |
124 | reg = <0x70006000 0x40>; | 88 | reg = <0x70006000 0x40>; |
125 | reg-shift = <2>; | 89 | reg-shift = <2>; |
126 | interrupts = < 0 36 0x04 >; | 90 | interrupts = <0 36 0x04>; |
91 | status = "disable"; | ||
127 | }; | 92 | }; |
128 | 93 | ||
129 | serial@70006040 { | 94 | serial@70006040 { |
130 | compatible = "nvidia,tegra20-uart"; | 95 | compatible = "nvidia,tegra20-uart"; |
131 | reg = <0x70006040 0x40>; | 96 | reg = <0x70006040 0x40>; |
132 | reg-shift = <2>; | 97 | reg-shift = <2>; |
133 | interrupts = < 0 37 0x04 >; | 98 | interrupts = <0 37 0x04>; |
99 | status = "disable"; | ||
134 | }; | 100 | }; |
135 | 101 | ||
136 | serial@70006200 { | 102 | serial@70006200 { |
137 | compatible = "nvidia,tegra20-uart"; | 103 | compatible = "nvidia,tegra20-uart"; |
138 | reg = <0x70006200 0x100>; | 104 | reg = <0x70006200 0x100>; |
139 | reg-shift = <2>; | 105 | reg-shift = <2>; |
140 | interrupts = < 0 46 0x04 >; | 106 | interrupts = <0 46 0x04>; |
107 | status = "disable"; | ||
141 | }; | 108 | }; |
142 | 109 | ||
143 | serial@70006300 { | 110 | serial@70006300 { |
144 | compatible = "nvidia,tegra20-uart"; | 111 | compatible = "nvidia,tegra20-uart"; |
145 | reg = <0x70006300 0x100>; | 112 | reg = <0x70006300 0x100>; |
146 | reg-shift = <2>; | 113 | reg-shift = <2>; |
147 | interrupts = < 0 90 0x04 >; | 114 | interrupts = <0 90 0x04>; |
115 | status = "disable"; | ||
148 | }; | 116 | }; |
149 | 117 | ||
150 | serial@70006400 { | 118 | serial@70006400 { |
151 | compatible = "nvidia,tegra20-uart"; | 119 | compatible = "nvidia,tegra20-uart"; |
152 | reg = <0x70006400 0x100>; | 120 | reg = <0x70006400 0x100>; |
153 | reg-shift = <2>; | 121 | reg-shift = <2>; |
154 | interrupts = < 0 91 0x04 >; | 122 | interrupts = <0 91 0x04>; |
123 | status = "disable"; | ||
155 | }; | 124 | }; |
156 | 125 | ||
157 | emc@7000f400 { | 126 | i2c@7000c000 { |
127 | compatible = "nvidia,tegra20-i2c"; | ||
128 | reg = <0x7000c000 0x100>; | ||
129 | interrupts = <0 38 0x04>; | ||
158 | #address-cells = <1>; | 130 | #address-cells = <1>; |
159 | #size-cells = <0>; | 131 | #size-cells = <0>; |
160 | compatible = "nvidia,tegra20-emc"; | 132 | status = "disable"; |
161 | reg = <0x7000f400 0x200>; | ||
162 | }; | 133 | }; |
163 | 134 | ||
164 | sdhci@c8000000 { | 135 | i2c@7000c400 { |
165 | compatible = "nvidia,tegra20-sdhci"; | 136 | compatible = "nvidia,tegra20-i2c"; |
166 | reg = <0xc8000000 0x200>; | 137 | reg = <0x7000c400 0x100>; |
167 | interrupts = < 0 14 0x04 >; | 138 | interrupts = <0 84 0x04>; |
139 | #address-cells = <1>; | ||
140 | #size-cells = <0>; | ||
141 | status = "disable"; | ||
168 | }; | 142 | }; |
169 | 143 | ||
170 | sdhci@c8000200 { | 144 | i2c@7000c500 { |
171 | compatible = "nvidia,tegra20-sdhci"; | 145 | compatible = "nvidia,tegra20-i2c"; |
172 | reg = <0xc8000200 0x200>; | 146 | reg = <0x7000c500 0x100>; |
173 | interrupts = < 0 15 0x04 >; | 147 | interrupts = <0 92 0x04>; |
148 | #address-cells = <1>; | ||
149 | #size-cells = <0>; | ||
150 | status = "disable"; | ||
174 | }; | 151 | }; |
175 | 152 | ||
176 | sdhci@c8000400 { | 153 | i2c@7000d000 { |
177 | compatible = "nvidia,tegra20-sdhci"; | 154 | compatible = "nvidia,tegra20-i2c-dvc"; |
178 | reg = <0xc8000400 0x200>; | 155 | reg = <0x7000d000 0x200>; |
179 | interrupts = < 0 19 0x04 >; | 156 | interrupts = <0 53 0x04>; |
157 | #address-cells = <1>; | ||
158 | #size-cells = <0>; | ||
159 | status = "disable"; | ||
180 | }; | 160 | }; |
181 | 161 | ||
182 | sdhci@c8000600 { | 162 | pmc { |
183 | compatible = "nvidia,tegra20-sdhci"; | 163 | compatible = "nvidia,tegra20-pmc"; |
184 | reg = <0xc8000600 0x200>; | 164 | reg = <0x7000e400 0x400>; |
185 | interrupts = < 0 31 0x04 >; | 165 | }; |
166 | |||
167 | mc { | ||
168 | compatible = "nvidia,tegra20-mc"; | ||
169 | reg = <0x7000f000 0x024 | ||
170 | 0x7000f03c 0x3c4>; | ||
171 | interrupts = <0 77 0x04>; | ||
172 | }; | ||
173 | |||
174 | gart { | ||
175 | compatible = "nvidia,tegra20-gart"; | ||
176 | reg = <0x7000f024 0x00000018 /* controller registers */ | ||
177 | 0x58000000 0x02000000>; /* GART aperture */ | ||
178 | }; | ||
179 | |||
180 | emc { | ||
181 | compatible = "nvidia,tegra20-emc"; | ||
182 | reg = <0x7000f400 0x200>; | ||
183 | #address-cells = <1>; | ||
184 | #size-cells = <0>; | ||
186 | }; | 185 | }; |
187 | 186 | ||
188 | usb@c5000000 { | 187 | usb@c5000000 { |
189 | compatible = "nvidia,tegra20-ehci", "usb-ehci"; | 188 | compatible = "nvidia,tegra20-ehci", "usb-ehci"; |
190 | reg = <0xc5000000 0x4000>; | 189 | reg = <0xc5000000 0x4000>; |
191 | interrupts = < 0 20 0x04 >; | 190 | interrupts = <0 20 0x04>; |
192 | phy_type = "utmi"; | 191 | phy_type = "utmi"; |
193 | nvidia,has-legacy-mode; | 192 | nvidia,has-legacy-mode; |
193 | status = "disable"; | ||
194 | }; | 194 | }; |
195 | 195 | ||
196 | usb@c5004000 { | 196 | usb@c5004000 { |
197 | compatible = "nvidia,tegra20-ehci", "usb-ehci"; | 197 | compatible = "nvidia,tegra20-ehci", "usb-ehci"; |
198 | reg = <0xc5004000 0x4000>; | 198 | reg = <0xc5004000 0x4000>; |
199 | interrupts = < 0 21 0x04 >; | 199 | interrupts = <0 21 0x04>; |
200 | phy_type = "ulpi"; | 200 | phy_type = "ulpi"; |
201 | status = "disable"; | ||
201 | }; | 202 | }; |
202 | 203 | ||
203 | usb@c5008000 { | 204 | usb@c5008000 { |
204 | compatible = "nvidia,tegra20-ehci", "usb-ehci"; | 205 | compatible = "nvidia,tegra20-ehci", "usb-ehci"; |
205 | reg = <0xc5008000 0x4000>; | 206 | reg = <0xc5008000 0x4000>; |
206 | interrupts = < 0 97 0x04 >; | 207 | interrupts = <0 97 0x04>; |
207 | phy_type = "utmi"; | 208 | phy_type = "utmi"; |
209 | status = "disable"; | ||
210 | }; | ||
211 | |||
212 | sdhci@c8000000 { | ||
213 | compatible = "nvidia,tegra20-sdhci"; | ||
214 | reg = <0xc8000000 0x200>; | ||
215 | interrupts = <0 14 0x04>; | ||
216 | status = "disable"; | ||
208 | }; | 217 | }; |
209 | }; | ||
210 | 218 | ||
219 | sdhci@c8000200 { | ||
220 | compatible = "nvidia,tegra20-sdhci"; | ||
221 | reg = <0xc8000200 0x200>; | ||
222 | interrupts = <0 15 0x04>; | ||
223 | status = "disable"; | ||
224 | }; | ||
225 | |||
226 | sdhci@c8000400 { | ||
227 | compatible = "nvidia,tegra20-sdhci"; | ||
228 | reg = <0xc8000400 0x200>; | ||
229 | interrupts = <0 19 0x04>; | ||
230 | status = "disable"; | ||
231 | }; | ||
232 | |||
233 | sdhci@c8000600 { | ||
234 | compatible = "nvidia,tegra20-sdhci"; | ||
235 | reg = <0xc8000600 0x200>; | ||
236 | interrupts = <0 31 0x04>; | ||
237 | status = "disable"; | ||
238 | }; | ||
239 | |||
240 | pmu { | ||
241 | compatible = "arm,cortex-a9-pmu"; | ||
242 | interrupts = <0 56 0x04 | ||
243 | 0 57 0x04>; | ||
244 | }; | ||
245 | }; | ||
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index 62a7b39f1c9a..2dcc09e784b5 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm/boot/dts/tegra30.dtsi | |||
@@ -4,183 +4,268 @@ | |||
4 | compatible = "nvidia,tegra30"; | 4 | compatible = "nvidia,tegra30"; |
5 | interrupt-parent = <&intc>; | 5 | interrupt-parent = <&intc>; |
6 | 6 | ||
7 | pmc@7000f400 { | 7 | intc: interrupt-controller { |
8 | compatible = "nvidia,tegra20-pmc", "nvidia,tegra30-pmc"; | ||
9 | reg = <0x7000e400 0x400>; | ||
10 | }; | ||
11 | |||
12 | intc: interrupt-controller@50041000 { | ||
13 | compatible = "arm,cortex-a9-gic"; | 8 | compatible = "arm,cortex-a9-gic"; |
9 | reg = <0x50041000 0x1000 | ||
10 | 0x50040100 0x0100>; | ||
14 | interrupt-controller; | 11 | interrupt-controller; |
15 | #interrupt-cells = <3>; | 12 | #interrupt-cells = <3>; |
16 | reg = < 0x50041000 0x1000 >, | ||
17 | < 0x50040100 0x0100 >; | ||
18 | }; | 13 | }; |
19 | 14 | ||
20 | pmu { | 15 | apbdma: dma { |
21 | compatible = "arm,cortex-a9-pmu"; | ||
22 | interrupts = <0 144 0x04 | ||
23 | 0 145 0x04 | ||
24 | 0 146 0x04 | ||
25 | 0 147 0x04>; | ||
26 | }; | ||
27 | |||
28 | apbdma: dma@6000a000 { | ||
29 | compatible = "nvidia,tegra30-apbdma", "nvidia,tegra20-apbdma"; | 16 | compatible = "nvidia,tegra30-apbdma", "nvidia,tegra20-apbdma"; |
30 | reg = <0x6000a000 0x1400>; | 17 | reg = <0x6000a000 0x1400>; |
31 | interrupts = < 0 104 0x04 | 18 | interrupts = <0 104 0x04 |
32 | 0 105 0x04 | 19 | 0 105 0x04 |
33 | 0 106 0x04 | 20 | 0 106 0x04 |
34 | 0 107 0x04 | 21 | 0 107 0x04 |
35 | 0 108 0x04 | 22 | 0 108 0x04 |
36 | 0 109 0x04 | 23 | 0 109 0x04 |
37 | 0 110 0x04 | 24 | 0 110 0x04 |
38 | 0 111 0x04 | 25 | 0 111 0x04 |
39 | 0 112 0x04 | 26 | 0 112 0x04 |
40 | 0 113 0x04 | 27 | 0 113 0x04 |
41 | 0 114 0x04 | 28 | 0 114 0x04 |
42 | 0 115 0x04 | 29 | 0 115 0x04 |
43 | 0 116 0x04 | 30 | 0 116 0x04 |
44 | 0 117 0x04 | 31 | 0 117 0x04 |
45 | 0 118 0x04 | 32 | 0 118 0x04 |
46 | 0 119 0x04 | 33 | 0 119 0x04 |
47 | 0 128 0x04 | 34 | 0 128 0x04 |
48 | 0 129 0x04 | 35 | 0 129 0x04 |
49 | 0 130 0x04 | 36 | 0 130 0x04 |
50 | 0 131 0x04 | 37 | 0 131 0x04 |
51 | 0 132 0x04 | 38 | 0 132 0x04 |
52 | 0 133 0x04 | 39 | 0 133 0x04 |
53 | 0 134 0x04 | 40 | 0 134 0x04 |
54 | 0 135 0x04 | 41 | 0 135 0x04 |
55 | 0 136 0x04 | 42 | 0 136 0x04 |
56 | 0 137 0x04 | 43 | 0 137 0x04 |
57 | 0 138 0x04 | 44 | 0 138 0x04 |
58 | 0 139 0x04 | 45 | 0 139 0x04 |
59 | 0 140 0x04 | 46 | 0 140 0x04 |
60 | 0 141 0x04 | 47 | 0 141 0x04 |
61 | 0 142 0x04 | 48 | 0 142 0x04 |
62 | 0 143 0x04 >; | 49 | 0 143 0x04>; |
63 | }; | ||
64 | |||
65 | i2c@7000c000 { | ||
66 | #address-cells = <1>; | ||
67 | #size-cells = <0>; | ||
68 | compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c"; | ||
69 | reg = <0x7000C000 0x100>; | ||
70 | interrupts = < 0 38 0x04 >; | ||
71 | }; | ||
72 | |||
73 | i2c@7000c400 { | ||
74 | #address-cells = <1>; | ||
75 | #size-cells = <0>; | ||
76 | compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c"; | ||
77 | reg = <0x7000C400 0x100>; | ||
78 | interrupts = < 0 84 0x04 >; | ||
79 | }; | ||
80 | |||
81 | i2c@7000c500 { | ||
82 | #address-cells = <1>; | ||
83 | #size-cells = <0>; | ||
84 | compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c"; | ||
85 | reg = <0x7000C500 0x100>; | ||
86 | interrupts = < 0 92 0x04 >; | ||
87 | }; | 50 | }; |
88 | 51 | ||
89 | i2c@7000c700 { | 52 | ahb: ahb { |
90 | #address-cells = <1>; | 53 | compatible = "nvidia,tegra30-ahb"; |
91 | #size-cells = <0>; | 54 | reg = <0x6000c004 0x14c>; /* AHB Arbitration + Gizmo Controller */ |
92 | compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c"; | ||
93 | reg = <0x7000c700 0x100>; | ||
94 | interrupts = < 0 120 0x04 >; | ||
95 | }; | 55 | }; |
96 | 56 | ||
97 | i2c@7000d000 { | 57 | gpio: gpio { |
98 | #address-cells = <1>; | ||
99 | #size-cells = <0>; | ||
100 | compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c"; | ||
101 | reg = <0x7000D000 0x100>; | ||
102 | interrupts = < 0 53 0x04 >; | ||
103 | }; | ||
104 | |||
105 | gpio: gpio@6000d000 { | ||
106 | compatible = "nvidia,tegra30-gpio", "nvidia,tegra20-gpio"; | 58 | compatible = "nvidia,tegra30-gpio", "nvidia,tegra20-gpio"; |
107 | reg = < 0x6000d000 0x1000 >; | 59 | reg = <0x6000d000 0x1000>; |
108 | interrupts = < 0 32 0x04 | 60 | interrupts = <0 32 0x04 |
109 | 0 33 0x04 | 61 | 0 33 0x04 |
110 | 0 34 0x04 | 62 | 0 34 0x04 |
111 | 0 35 0x04 | 63 | 0 35 0x04 |
112 | 0 55 0x04 | 64 | 0 55 0x04 |
113 | 0 87 0x04 | 65 | 0 87 0x04 |
114 | 0 89 0x04 | 66 | 0 89 0x04 |
115 | 0 125 0x04 >; | 67 | 0 125 0x04>; |
116 | #gpio-cells = <2>; | 68 | #gpio-cells = <2>; |
117 | gpio-controller; | 69 | gpio-controller; |
118 | #interrupt-cells = <2>; | 70 | #interrupt-cells = <2>; |
119 | interrupt-controller; | 71 | interrupt-controller; |
120 | }; | 72 | }; |
121 | 73 | ||
74 | pinmux: pinmux { | ||
75 | compatible = "nvidia,tegra30-pinmux"; | ||
76 | reg = <0x70000868 0xd0 /* Pad control registers */ | ||
77 | 0x70003000 0x3e0>; /* Mux registers */ | ||
78 | }; | ||
79 | |||
122 | serial@70006000 { | 80 | serial@70006000 { |
123 | compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart"; | 81 | compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart"; |
124 | reg = <0x70006000 0x40>; | 82 | reg = <0x70006000 0x40>; |
125 | reg-shift = <2>; | 83 | reg-shift = <2>; |
126 | interrupts = < 0 36 0x04 >; | 84 | interrupts = <0 36 0x04>; |
85 | status = "disable"; | ||
127 | }; | 86 | }; |
128 | 87 | ||
129 | serial@70006040 { | 88 | serial@70006040 { |
130 | compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart"; | 89 | compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart"; |
131 | reg = <0x70006040 0x40>; | 90 | reg = <0x70006040 0x40>; |
132 | reg-shift = <2>; | 91 | reg-shift = <2>; |
133 | interrupts = < 0 37 0x04 >; | 92 | interrupts = <0 37 0x04>; |
93 | status = "disable"; | ||
134 | }; | 94 | }; |
135 | 95 | ||
136 | serial@70006200 { | 96 | serial@70006200 { |
137 | compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart"; | 97 | compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart"; |
138 | reg = <0x70006200 0x100>; | 98 | reg = <0x70006200 0x100>; |
139 | reg-shift = <2>; | 99 | reg-shift = <2>; |
140 | interrupts = < 0 46 0x04 >; | 100 | interrupts = <0 46 0x04>; |
101 | status = "disable"; | ||
141 | }; | 102 | }; |
142 | 103 | ||
143 | serial@70006300 { | 104 | serial@70006300 { |
144 | compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart"; | 105 | compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart"; |
145 | reg = <0x70006300 0x100>; | 106 | reg = <0x70006300 0x100>; |
146 | reg-shift = <2>; | 107 | reg-shift = <2>; |
147 | interrupts = < 0 90 0x04 >; | 108 | interrupts = <0 90 0x04>; |
109 | status = "disable"; | ||
148 | }; | 110 | }; |
149 | 111 | ||
150 | serial@70006400 { | 112 | serial@70006400 { |
151 | compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart"; | 113 | compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart"; |
152 | reg = <0x70006400 0x100>; | 114 | reg = <0x70006400 0x100>; |
153 | reg-shift = <2>; | 115 | reg-shift = <2>; |
154 | interrupts = < 0 91 0x04 >; | 116 | interrupts = <0 91 0x04>; |
117 | status = "disable"; | ||
118 | }; | ||
119 | |||
120 | i2c@7000c000 { | ||
121 | compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c"; | ||
122 | reg = <0x7000c000 0x100>; | ||
123 | interrupts = <0 38 0x04>; | ||
124 | #address-cells = <1>; | ||
125 | #size-cells = <0>; | ||
126 | status = "disable"; | ||
127 | }; | ||
128 | |||
129 | i2c@7000c400 { | ||
130 | compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c"; | ||
131 | reg = <0x7000c400 0x100>; | ||
132 | interrupts = <0 84 0x04>; | ||
133 | #address-cells = <1>; | ||
134 | #size-cells = <0>; | ||
135 | status = "disable"; | ||
136 | }; | ||
137 | |||
138 | i2c@7000c500 { | ||
139 | compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c"; | ||
140 | reg = <0x7000c500 0x100>; | ||
141 | interrupts = <0 92 0x04>; | ||
142 | #address-cells = <1>; | ||
143 | #size-cells = <0>; | ||
144 | status = "disable"; | ||
145 | }; | ||
146 | |||
147 | i2c@7000c700 { | ||
148 | compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c"; | ||
149 | reg = <0x7000c700 0x100>; | ||
150 | interrupts = <0 120 0x04>; | ||
151 | #address-cells = <1>; | ||
152 | #size-cells = <0>; | ||
153 | status = "disable"; | ||
154 | }; | ||
155 | |||
156 | i2c@7000d000 { | ||
157 | compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c"; | ||
158 | reg = <0x7000d000 0x100>; | ||
159 | interrupts = <0 53 0x04>; | ||
160 | #address-cells = <1>; | ||
161 | #size-cells = <0>; | ||
162 | status = "disable"; | ||
163 | }; | ||
164 | |||
165 | pmc { | ||
166 | compatible = "nvidia,tegra20-pmc", "nvidia,tegra30-pmc"; | ||
167 | reg = <0x7000e400 0x400>; | ||
168 | }; | ||
169 | |||
170 | mc { | ||
171 | compatible = "nvidia,tegra30-mc"; | ||
172 | reg = <0x7000f000 0x010 | ||
173 | 0x7000f03c 0x1b4 | ||
174 | 0x7000f200 0x028 | ||
175 | 0x7000f284 0x17c>; | ||
176 | interrupts = <0 77 0x04>; | ||
177 | }; | ||
178 | |||
179 | smmu { | ||
180 | compatible = "nvidia,tegra30-smmu"; | ||
181 | reg = <0x7000f010 0x02c | ||
182 | 0x7000f1f0 0x010 | ||
183 | 0x7000f228 0x05c>; | ||
184 | nvidia,#asids = <4>; /* # of ASIDs */ | ||
185 | dma-window = <0 0x40000000>; /* IOVA start & length */ | ||
186 | nvidia,ahb = <&ahb>; | ||
187 | }; | ||
188 | |||
189 | ahub { | ||
190 | compatible = "nvidia,tegra30-ahub"; | ||
191 | reg = <0x70080000 0x200 | ||
192 | 0x70080200 0x100>; | ||
193 | interrupts = <0 103 0x04>; | ||
194 | nvidia,dma-request-selector = <&apbdma 1>; | ||
195 | |||
196 | ranges; | ||
197 | #address-cells = <1>; | ||
198 | #size-cells = <1>; | ||
199 | |||
200 | tegra_i2s0: i2s@70080300 { | ||
201 | compatible = "nvidia,tegra30-i2s"; | ||
202 | reg = <0x70080300 0x100>; | ||
203 | nvidia,ahub-cif-ids = <4 4>; | ||
204 | status = "disable"; | ||
205 | }; | ||
206 | |||
207 | tegra_i2s1: i2s@70080400 { | ||
208 | compatible = "nvidia,tegra30-i2s"; | ||
209 | reg = <0x70080400 0x100>; | ||
210 | nvidia,ahub-cif-ids = <5 5>; | ||
211 | status = "disable"; | ||
212 | }; | ||
213 | |||
214 | tegra_i2s2: i2s@70080500 { | ||
215 | compatible = "nvidia,tegra30-i2s"; | ||
216 | reg = <0x70080500 0x100>; | ||
217 | nvidia,ahub-cif-ids = <6 6>; | ||
218 | status = "disable"; | ||
219 | }; | ||
220 | |||
221 | tegra_i2s3: i2s@70080600 { | ||
222 | compatible = "nvidia,tegra30-i2s"; | ||
223 | reg = <0x70080600 0x100>; | ||
224 | nvidia,ahub-cif-ids = <7 7>; | ||
225 | status = "disable"; | ||
226 | }; | ||
227 | |||
228 | tegra_i2s4: i2s@70080700 { | ||
229 | compatible = "nvidia,tegra30-i2s"; | ||
230 | reg = <0x70080700 0x100>; | ||
231 | nvidia,ahub-cif-ids = <8 8>; | ||
232 | status = "disable"; | ||
233 | }; | ||
155 | }; | 234 | }; |
156 | 235 | ||
157 | sdhci@78000000 { | 236 | sdhci@78000000 { |
158 | compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; | 237 | compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; |
159 | reg = <0x78000000 0x200>; | 238 | reg = <0x78000000 0x200>; |
160 | interrupts = < 0 14 0x04 >; | 239 | interrupts = <0 14 0x04>; |
240 | status = "disable"; | ||
161 | }; | 241 | }; |
162 | 242 | ||
163 | sdhci@78000200 { | 243 | sdhci@78000200 { |
164 | compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; | 244 | compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; |
165 | reg = <0x78000200 0x200>; | 245 | reg = <0x78000200 0x200>; |
166 | interrupts = < 0 15 0x04 >; | 246 | interrupts = <0 15 0x04>; |
247 | status = "disable"; | ||
167 | }; | 248 | }; |
168 | 249 | ||
169 | sdhci@78000400 { | 250 | sdhci@78000400 { |
170 | compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; | 251 | compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; |
171 | reg = <0x78000400 0x200>; | 252 | reg = <0x78000400 0x200>; |
172 | interrupts = < 0 19 0x04 >; | 253 | interrupts = <0 19 0x04>; |
254 | status = "disable"; | ||
173 | }; | 255 | }; |
174 | 256 | ||
175 | sdhci@78000600 { | 257 | sdhci@78000600 { |
176 | compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; | 258 | compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; |
177 | reg = <0x78000600 0x200>; | 259 | reg = <0x78000600 0x200>; |
178 | interrupts = < 0 31 0x04 >; | 260 | interrupts = <0 31 0x04>; |
261 | status = "disable"; | ||
179 | }; | 262 | }; |
180 | 263 | ||
181 | pinmux: pinmux@70000000 { | 264 | pmu { |
182 | compatible = "nvidia,tegra30-pinmux"; | 265 | compatible = "arm,cortex-a9-pmu"; |
183 | reg = < 0x70000868 0xd0 /* Pad control registers */ | 266 | interrupts = <0 144 0x04 |
184 | 0x70003000 0x3e0 >; /* Mux registers */ | 267 | 0 145 0x04 |
268 | 0 146 0x04 | ||
269 | 0 147 0x04>; | ||
185 | }; | 270 | }; |
186 | }; | 271 | }; |