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-rw-r--r--arch/arm/boot/dts/exynos4210-trats.dts15
-rw-r--r--arch/arm/boot/dts/exynos4210.dtsi5
-rw-r--r--arch/arm/boot/dts/exynos4212.dtsi5
-rw-r--r--arch/arm/boot/dts/exynos4412-odroid-common.dtsi15
-rw-r--r--arch/arm/boot/dts/exynos4412-trats2.dts15
-rw-r--r--arch/arm/boot/dts/exynos4412.dtsi5
-rw-r--r--arch/arm/boot/dts/exynos5250.dtsi20
7 files changed, 76 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/exynos4210-trats.dts b/arch/arm/boot/dts/exynos4210-trats.dts
index fd7766fc9de1..32c5fd8f6269 100644
--- a/arch/arm/boot/dts/exynos4210-trats.dts
+++ b/arch/arm/boot/dts/exynos4210-trats.dts
@@ -430,6 +430,21 @@
430 status = "okay"; 430 status = "okay";
431 }; 431 };
432 432
433 thermal-zones {
434 cpu_thermal: cpu-thermal {
435 cooling-maps {
436 map0 {
437 /* Corresponds to 800MHz at freq_table */
438 cooling-device = <&cpu0 2 2>;
439 };
440 map1 {
441 /* Corresponds to 200MHz at freq_table */
442 cooling-device = <&cpu0 4 4>;
443 };
444 };
445 };
446 };
447
433 camera { 448 camera {
434 pinctrl-names = "default"; 449 pinctrl-names = "default";
435 pinctrl-0 = <>; 450 pinctrl-0 = <>;
diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
index 67c832c9dcf1..66f6f95e0ab1 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -35,10 +35,13 @@
35 #address-cells = <1>; 35 #address-cells = <1>;
36 #size-cells = <0>; 36 #size-cells = <0>;
37 37
38 cpu@900 { 38 cpu0: cpu@900 {
39 device_type = "cpu"; 39 device_type = "cpu";
40 compatible = "arm,cortex-a9"; 40 compatible = "arm,cortex-a9";
41 reg = <0x900>; 41 reg = <0x900>;
42 cooling-min-level = <4>;
43 cooling-max-level = <2>;
44 #cooling-cells = <2>; /* min followed by max */
42 }; 45 };
43 46
44 cpu@901 { 47 cpu@901 {
diff --git a/arch/arm/boot/dts/exynos4212.dtsi b/arch/arm/boot/dts/exynos4212.dtsi
index dd0a43ec56da..5be03288f1ee 100644
--- a/arch/arm/boot/dts/exynos4212.dtsi
+++ b/arch/arm/boot/dts/exynos4212.dtsi
@@ -26,10 +26,13 @@
26 #address-cells = <1>; 26 #address-cells = <1>;
27 #size-cells = <0>; 27 #size-cells = <0>;
28 28
29 cpu@A00 { 29 cpu0: cpu@A00 {
30 device_type = "cpu"; 30 device_type = "cpu";
31 compatible = "arm,cortex-a9"; 31 compatible = "arm,cortex-a9";
32 reg = <0xA00>; 32 reg = <0xA00>;
33 cooling-min-level = <13>;
34 cooling-max-level = <7>;
35 #cooling-cells = <2>; /* min followed by max */
33 }; 36 };
34 37
35 cpu@A01 { 38 cpu@A01 {
diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
index 416981b8b7ac..cf4bd9e59800 100644
--- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
+++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
@@ -423,6 +423,21 @@
423 vtmu-supply = <&ldo10_reg>; 423 vtmu-supply = <&ldo10_reg>;
424 status = "okay"; 424 status = "okay";
425 }; 425 };
426
427 thermal-zones {
428 cpu_thermal: cpu-thermal {
429 cooling-maps {
430 map0 {
431 /* Corresponds to 800MHz at freq_table */
432 cooling-device = <&cpu0 7 7>;
433 };
434 map1 {
435 /* Corresponds to 200MHz at freq_table */
436 cooling-device = <&cpu0 13 13>;
437 };
438 };
439 };
440 };
426}; 441};
427 442
428&pinctrl_1 { 443&pinctrl_1 {
diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts
index 21f748083586..173ffa479ad3 100644
--- a/arch/arm/boot/dts/exynos4412-trats2.dts
+++ b/arch/arm/boot/dts/exynos4412-trats2.dts
@@ -927,6 +927,21 @@
927 pulldown-ohm = <100000>; /* 100K */ 927 pulldown-ohm = <100000>; /* 100K */
928 io-channels = <&adc 2>; /* Battery temperature */ 928 io-channels = <&adc 2>; /* Battery temperature */
929 }; 929 };
930
931 thermal-zones {
932 cpu_thermal: cpu-thermal {
933 cooling-maps {
934 map0 {
935 /* Corresponds to 800MHz at freq_table */
936 cooling-device = <&cpu0 7 7>;
937 };
938 map1 {
939 /* Corresponds to 200MHz at freq_table */
940 cooling-device = <&cpu0 13 13>;
941 };
942 };
943 };
944 };
930}; 945};
931 946
932&pmu_system_controller { 947&pmu_system_controller {
diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi
index 0f6ec93bb1d8..68ad43b391ae 100644
--- a/arch/arm/boot/dts/exynos4412.dtsi
+++ b/arch/arm/boot/dts/exynos4412.dtsi
@@ -26,10 +26,13 @@
26 #address-cells = <1>; 26 #address-cells = <1>;
27 #size-cells = <0>; 27 #size-cells = <0>;
28 28
29 cpu@A00 { 29 cpu0: cpu@A00 {
30 device_type = "cpu"; 30 device_type = "cpu";
31 compatible = "arm,cortex-a9"; 31 compatible = "arm,cortex-a9";
32 reg = <0xA00>; 32 reg = <0xA00>;
33 cooling-min-level = <13>;
34 cooling-max-level = <7>;
35 #cooling-cells = <2>; /* min followed by max */
33 }; 36 };
34 37
35 cpu@A01 { 38 cpu@A01 {
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index 9bb1b0b738f5..8496d184fca0 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -58,11 +58,14 @@
58 #address-cells = <1>; 58 #address-cells = <1>;
59 #size-cells = <0>; 59 #size-cells = <0>;
60 60
61 cpu@0 { 61 cpu0: cpu@0 {
62 device_type = "cpu"; 62 device_type = "cpu";
63 compatible = "arm,cortex-a15"; 63 compatible = "arm,cortex-a15";
64 reg = <0>; 64 reg = <0>;
65 clock-frequency = <1700000000>; 65 clock-frequency = <1700000000>;
66 cooling-min-level = <15>;
67 cooling-max-level = <9>;
68 #cooling-cells = <2>; /* min followed by max */
66 }; 69 };
67 cpu@1 { 70 cpu@1 {
68 device_type = "cpu"; 71 device_type = "cpu";
@@ -243,6 +246,21 @@
243 clock-names = "tmu_apbif"; 246 clock-names = "tmu_apbif";
244 }; 247 };
245 248
249 thermal-zones {
250 cpu_thermal: cpu-thermal {
251 cooling-maps {
252 map0 {
253 /* Corresponds to 800MHz at freq_table */
254 cooling-device = <&cpu0 9 9>;
255 };
256 map1 {
257 /* Corresponds to 200MHz at freq_table */
258 cooling-device = <&cpu0 15 15>;
259 };
260 };
261 };
262 };
263
246 serial@12C00000 { 264 serial@12C00000 {
247 clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>; 265 clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
248 clock-names = "uart", "clk_uart_baud0"; 266 clock-names = "uart", "clk_uart_baud0";