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-rw-r--r--arch/arm/boot/dts/armada-370-db.dts24
-rw-r--r--arch/arm/boot/dts/at91sam9263.dtsi2
-rw-r--r--arch/arm/boot/dts/berlin2q-marvell-dmp.dts2
-rw-r--r--arch/arm/boot/dts/berlin2q.dtsi63
-rw-r--r--arch/arm/boot/dts/dra7-evm.dts10
-rw-r--r--arch/arm/boot/dts/dra7.dtsi6
-rw-r--r--arch/arm/boot/dts/exynos5250.dtsi2
-rw-r--r--arch/arm/boot/dts/exynos5420-arndale-octa.dts4
-rw-r--r--arch/arm/boot/dts/exynos5420.dtsi6
-rw-r--r--arch/arm/boot/dts/imx25.dtsi10
-rw-r--r--arch/arm/boot/dts/imx51-babbage.dts22
-rw-r--r--arch/arm/boot/dts/imx6qdl.dtsi4
-rw-r--r--arch/arm/boot/dts/imx6sx-sdb.dts15
-rw-r--r--arch/arm/boot/dts/ls1021a.dtsi1
-rw-r--r--arch/arm/boot/dts/omap3-n900.dts4
-rw-r--r--arch/arm/boot/dts/rk3288-evb.dtsi30
-rw-r--r--arch/arm/boot/dts/sama5d3xmb.dtsi2
-rw-r--r--arch/arm/boot/dts/sama5d4.dtsi2
-rw-r--r--arch/arm/boot/dts/ste-nomadik-nhk15.dts8
-rw-r--r--arch/arm/boot/dts/tegra20-seaboard.dts2
-rw-r--r--arch/arm/boot/dts/vf610-twr.dts15
21 files changed, 136 insertions, 98 deletions
diff --git a/arch/arm/boot/dts/armada-370-db.dts b/arch/arm/boot/dts/armada-370-db.dts
index 1466580be295..70b1943a86b1 100644
--- a/arch/arm/boot/dts/armada-370-db.dts
+++ b/arch/arm/boot/dts/armada-370-db.dts
@@ -203,27 +203,3 @@
203 compatible = "linux,spdif-dir"; 203 compatible = "linux,spdif-dir";
204 }; 204 };
205}; 205};
206
207&pinctrl {
208 /*
209 * These pins might be muxed as I2S by
210 * the bootloader, but it conflicts
211 * with the real I2S pins that are
212 * muxed using i2s_pins. We must mux
213 * those pins to a function other than
214 * I2S.
215 */
216 pinctrl-0 = <&hog_pins1 &hog_pins2>;
217 pinctrl-names = "default";
218
219 hog_pins1: hog-pins1 {
220 marvell,pins = "mpp6", "mpp8", "mpp10",
221 "mpp12", "mpp13";
222 marvell,function = "gpio";
223 };
224
225 hog_pins2: hog-pins2 {
226 marvell,pins = "mpp5", "mpp7", "mpp9";
227 marvell,function = "gpo";
228 };
229};
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
index 1467750e3377..e8c6c600a5b6 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -953,6 +953,8 @@
953 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 3>; 953 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 3>;
954 pinctrl-names = "default"; 954 pinctrl-names = "default";
955 pinctrl-0 = <&pinctrl_fb>; 955 pinctrl-0 = <&pinctrl_fb>;
956 clocks = <&lcd_clk>, <&lcd_clk>;
957 clock-names = "lcdc_clk", "hclk";
956 status = "disabled"; 958 status = "disabled";
957 }; 959 };
958 960
diff --git a/arch/arm/boot/dts/berlin2q-marvell-dmp.dts b/arch/arm/boot/dts/berlin2q-marvell-dmp.dts
index 28e7e2060c33..a98ac1bd8f65 100644
--- a/arch/arm/boot/dts/berlin2q-marvell-dmp.dts
+++ b/arch/arm/boot/dts/berlin2q-marvell-dmp.dts
@@ -65,6 +65,8 @@
65}; 65};
66 66
67&sdhci2 { 67&sdhci2 {
68 broken-cd;
69 bus-width = <8>;
68 non-removable; 70 non-removable;
69 status = "okay"; 71 status = "okay";
70}; 72};
diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi
index 35253c947a7c..e2f61f27944e 100644
--- a/arch/arm/boot/dts/berlin2q.dtsi
+++ b/arch/arm/boot/dts/berlin2q.dtsi
@@ -83,7 +83,8 @@
83 compatible = "mrvl,pxav3-mmc"; 83 compatible = "mrvl,pxav3-mmc";
84 reg = <0xab1000 0x200>; 84 reg = <0xab1000 0x200>;
85 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; 85 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
86 clocks = <&chip CLKID_SDIO1XIN>; 86 clocks = <&chip CLKID_NFC_ECC>, <&chip CLKID_NFC>;
87 clock-names = "io", "core";
87 status = "disabled"; 88 status = "disabled";
88 }; 89 };
89 90
@@ -348,36 +349,6 @@
348 interrupt-parent = <&gic>; 349 interrupt-parent = <&gic>;
349 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; 350 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
350 }; 351 };
351
352 gpio4: gpio@5000 {
353 compatible = "snps,dw-apb-gpio";
354 reg = <0x5000 0x400>;
355 #address-cells = <1>;
356 #size-cells = <0>;
357
358 porte: gpio-port@4 {
359 compatible = "snps,dw-apb-gpio-port";
360 gpio-controller;
361 #gpio-cells = <2>;
362 snps,nr-gpios = <32>;
363 reg = <0>;
364 };
365 };
366
367 gpio5: gpio@c000 {
368 compatible = "snps,dw-apb-gpio";
369 reg = <0xc000 0x400>;
370 #address-cells = <1>;
371 #size-cells = <0>;
372
373 portf: gpio-port@5 {
374 compatible = "snps,dw-apb-gpio-port";
375 gpio-controller;
376 #gpio-cells = <2>;
377 snps,nr-gpios = <32>;
378 reg = <0>;
379 };
380 };
381 }; 352 };
382 353
383 chip: chip-control@ea0000 { 354 chip: chip-control@ea0000 {
@@ -466,6 +437,21 @@
466 ranges = <0 0xfc0000 0x10000>; 437 ranges = <0 0xfc0000 0x10000>;
467 interrupt-parent = <&sic>; 438 interrupt-parent = <&sic>;
468 439
440 sm_gpio1: gpio@5000 {
441 compatible = "snps,dw-apb-gpio";
442 reg = <0x5000 0x400>;
443 #address-cells = <1>;
444 #size-cells = <0>;
445
446 portf: gpio-port@5 {
447 compatible = "snps,dw-apb-gpio-port";
448 gpio-controller;
449 #gpio-cells = <2>;
450 snps,nr-gpios = <32>;
451 reg = <0>;
452 };
453 };
454
469 i2c2: i2c@7000 { 455 i2c2: i2c@7000 {
470 compatible = "snps,designware-i2c"; 456 compatible = "snps,designware-i2c";
471 #address-cells = <1>; 457 #address-cells = <1>;
@@ -516,6 +502,21 @@
516 status = "disabled"; 502 status = "disabled";
517 }; 503 };
518 504
505 sm_gpio0: gpio@c000 {
506 compatible = "snps,dw-apb-gpio";
507 reg = <0xc000 0x400>;
508 #address-cells = <1>;
509 #size-cells = <0>;
510
511 porte: gpio-port@4 {
512 compatible = "snps,dw-apb-gpio-port";
513 gpio-controller;
514 #gpio-cells = <2>;
515 snps,nr-gpios = <32>;
516 reg = <0>;
517 };
518 };
519
519 sysctrl: pin-controller@d000 { 520 sysctrl: pin-controller@d000 {
520 compatible = "marvell,berlin2q-system-ctrl"; 521 compatible = "marvell,berlin2q-system-ctrl";
521 reg = <0xd000 0x100>; 522 reg = <0xd000 0x100>;
diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts
index 10b725c7bfc0..ad4118f7e1a6 100644
--- a/arch/arm/boot/dts/dra7-evm.dts
+++ b/arch/arm/boot/dts/dra7-evm.dts
@@ -499,23 +499,23 @@
499 }; 499 };
500 partition@5 { 500 partition@5 {
501 label = "QSPI.u-boot-spl-os"; 501 label = "QSPI.u-boot-spl-os";
502 reg = <0x00140000 0x00010000>; 502 reg = <0x00140000 0x00080000>;
503 }; 503 };
504 partition@6 { 504 partition@6 {
505 label = "QSPI.u-boot-env"; 505 label = "QSPI.u-boot-env";
506 reg = <0x00150000 0x00010000>; 506 reg = <0x001c0000 0x00010000>;
507 }; 507 };
508 partition@7 { 508 partition@7 {
509 label = "QSPI.u-boot-env.backup1"; 509 label = "QSPI.u-boot-env.backup1";
510 reg = <0x00160000 0x0010000>; 510 reg = <0x001d0000 0x0010000>;
511 }; 511 };
512 partition@8 { 512 partition@8 {
513 label = "QSPI.kernel"; 513 label = "QSPI.kernel";
514 reg = <0x00170000 0x0800000>; 514 reg = <0x001e0000 0x0800000>;
515 }; 515 };
516 partition@9 { 516 partition@9 {
517 label = "QSPI.file-system"; 517 label = "QSPI.file-system";
518 reg = <0x00970000 0x01690000>; 518 reg = <0x009e0000 0x01620000>;
519 }; 519 };
520 }; 520 };
521}; 521};
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 22771bc1643a..63f8b007bdc5 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -1257,6 +1257,8 @@
1257 tx-fifo-resize; 1257 tx-fifo-resize;
1258 maximum-speed = "super-speed"; 1258 maximum-speed = "super-speed";
1259 dr_mode = "otg"; 1259 dr_mode = "otg";
1260 snps,dis_u3_susphy_quirk;
1261 snps,dis_u2_susphy_quirk;
1260 }; 1262 };
1261 }; 1263 };
1262 1264
@@ -1278,6 +1280,8 @@
1278 tx-fifo-resize; 1280 tx-fifo-resize;
1279 maximum-speed = "high-speed"; 1281 maximum-speed = "high-speed";
1280 dr_mode = "otg"; 1282 dr_mode = "otg";
1283 snps,dis_u3_susphy_quirk;
1284 snps,dis_u2_susphy_quirk;
1281 }; 1285 };
1282 }; 1286 };
1283 1287
@@ -1299,6 +1303,8 @@
1299 tx-fifo-resize; 1303 tx-fifo-resize;
1300 maximum-speed = "high-speed"; 1304 maximum-speed = "high-speed";
1301 dr_mode = "otg"; 1305 dr_mode = "otg";
1306 snps,dis_u3_susphy_quirk;
1307 snps,dis_u2_susphy_quirk;
1302 }; 1308 };
1303 }; 1309 };
1304 1310
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index 0a229fcd7acf..d75c89d7666a 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -736,7 +736,7 @@
736 736
737 dp_phy: video-phy@10040720 { 737 dp_phy: video-phy@10040720 {
738 compatible = "samsung,exynos5250-dp-video-phy"; 738 compatible = "samsung,exynos5250-dp-video-phy";
739 reg = <0x10040720 4>; 739 samsung,pmu-syscon = <&pmu_system_controller>;
740 #phy-cells = <0>; 740 #phy-cells = <0>;
741 }; 741 };
742 742
diff --git a/arch/arm/boot/dts/exynos5420-arndale-octa.dts b/arch/arm/boot/dts/exynos5420-arndale-octa.dts
index aa7a7d727a7e..db2c1c4cd900 100644
--- a/arch/arm/boot/dts/exynos5420-arndale-octa.dts
+++ b/arch/arm/boot/dts/exynos5420-arndale-octa.dts
@@ -372,3 +372,7 @@
372&usbdrd_dwc3_1 { 372&usbdrd_dwc3_1 {
373 dr_mode = "host"; 373 dr_mode = "host";
374}; 374};
375
376&cci {
377 status = "disabled";
378};
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index 517e50f6760b..6d38f8bfd0e6 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -120,7 +120,7 @@
120 }; 120 };
121 }; 121 };
122 122
123 cci@10d20000 { 123 cci: cci@10d20000 {
124 compatible = "arm,cci-400"; 124 compatible = "arm,cci-400";
125 #address-cells = <1>; 125 #address-cells = <1>;
126 #size-cells = <1>; 126 #size-cells = <1>;
@@ -503,8 +503,8 @@
503 }; 503 };
504 504
505 dp_phy: video-phy@10040728 { 505 dp_phy: video-phy@10040728 {
506 compatible = "samsung,exynos5250-dp-video-phy"; 506 compatible = "samsung,exynos5420-dp-video-phy";
507 reg = <0x10040728 4>; 507 samsung,pmu-syscon = <&pmu_system_controller>;
508 #phy-cells = <0>; 508 #phy-cells = <0>;
509 }; 509 };
510 510
diff --git a/arch/arm/boot/dts/imx25.dtsi b/arch/arm/boot/dts/imx25.dtsi
index 58d3c3cf2923..e4d3aecc4ed2 100644
--- a/arch/arm/boot/dts/imx25.dtsi
+++ b/arch/arm/boot/dts/imx25.dtsi
@@ -162,7 +162,7 @@
162 #size-cells = <0>; 162 #size-cells = <0>;
163 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi"; 163 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
164 reg = <0x43fa4000 0x4000>; 164 reg = <0x43fa4000 0x4000>;
165 clocks = <&clks 62>, <&clks 62>; 165 clocks = <&clks 78>, <&clks 78>;
166 clock-names = "ipg", "per"; 166 clock-names = "ipg", "per";
167 interrupts = <14>; 167 interrupts = <14>;
168 status = "disabled"; 168 status = "disabled";
@@ -369,7 +369,7 @@
369 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; 369 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
370 #pwm-cells = <2>; 370 #pwm-cells = <2>;
371 reg = <0x53fa0000 0x4000>; 371 reg = <0x53fa0000 0x4000>;
372 clocks = <&clks 106>, <&clks 36>; 372 clocks = <&clks 106>, <&clks 52>;
373 clock-names = "ipg", "per"; 373 clock-names = "ipg", "per";
374 interrupts = <36>; 374 interrupts = <36>;
375 }; 375 };
@@ -388,7 +388,7 @@
388 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; 388 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
389 #pwm-cells = <2>; 389 #pwm-cells = <2>;
390 reg = <0x53fa8000 0x4000>; 390 reg = <0x53fa8000 0x4000>;
391 clocks = <&clks 107>, <&clks 36>; 391 clocks = <&clks 107>, <&clks 52>;
392 clock-names = "ipg", "per"; 392 clock-names = "ipg", "per";
393 interrupts = <41>; 393 interrupts = <41>;
394 }; 394 };
@@ -429,7 +429,7 @@
429 pwm4: pwm@53fc8000 { 429 pwm4: pwm@53fc8000 {
430 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; 430 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
431 reg = <0x53fc8000 0x4000>; 431 reg = <0x53fc8000 0x4000>;
432 clocks = <&clks 108>, <&clks 36>; 432 clocks = <&clks 108>, <&clks 52>;
433 clock-names = "ipg", "per"; 433 clock-names = "ipg", "per";
434 interrupts = <42>; 434 interrupts = <42>;
435 }; 435 };
@@ -476,7 +476,7 @@
476 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; 476 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
477 #pwm-cells = <2>; 477 #pwm-cells = <2>;
478 reg = <0x53fe0000 0x4000>; 478 reg = <0x53fe0000 0x4000>;
479 clocks = <&clks 105>, <&clks 36>; 479 clocks = <&clks 105>, <&clks 52>;
480 clock-names = "ipg", "per"; 480 clock-names = "ipg", "per";
481 interrupts = <26>; 481 interrupts = <26>;
482 }; 482 };
diff --git a/arch/arm/boot/dts/imx51-babbage.dts b/arch/arm/boot/dts/imx51-babbage.dts
index 56569cecaa78..649befeb2cf9 100644
--- a/arch/arm/boot/dts/imx51-babbage.dts
+++ b/arch/arm/boot/dts/imx51-babbage.dts
@@ -127,24 +127,12 @@
127 #address-cells = <1>; 127 #address-cells = <1>;
128 #size-cells = <0>; 128 #size-cells = <0>;
129 129
130 reg_usbh1_vbus: regulator@0 { 130 reg_hub_reset: regulator@0 {
131 compatible = "regulator-fixed";
132 pinctrl-names = "default";
133 pinctrl-0 = <&pinctrl_usbh1reg>;
134 reg = <0>;
135 regulator-name = "usbh1_vbus";
136 regulator-min-microvolt = <5000000>;
137 regulator-max-microvolt = <5000000>;
138 gpio = <&gpio2 5 GPIO_ACTIVE_HIGH>;
139 enable-active-high;
140 };
141
142 reg_usbotg_vbus: regulator@1 {
143 compatible = "regulator-fixed"; 131 compatible = "regulator-fixed";
144 pinctrl-names = "default"; 132 pinctrl-names = "default";
145 pinctrl-0 = <&pinctrl_usbotgreg>; 133 pinctrl-0 = <&pinctrl_usbotgreg>;
146 reg = <1>; 134 reg = <0>;
147 regulator-name = "usbotg_vbus"; 135 regulator-name = "hub_reset";
148 regulator-min-microvolt = <5000000>; 136 regulator-min-microvolt = <5000000>;
149 regulator-max-microvolt = <5000000>; 137 regulator-max-microvolt = <5000000>;
150 gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>; 138 gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>;
@@ -176,6 +164,7 @@
176 reg = <0>; 164 reg = <0>;
177 clocks = <&clks IMX5_CLK_DUMMY>; 165 clocks = <&clks IMX5_CLK_DUMMY>;
178 clock-names = "main_clk"; 166 clock-names = "main_clk";
167 reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
179 }; 168 };
180 }; 169 };
181}; 170};
@@ -419,7 +408,7 @@
419&usbh1 { 408&usbh1 {
420 pinctrl-names = "default"; 409 pinctrl-names = "default";
421 pinctrl-0 = <&pinctrl_usbh1>; 410 pinctrl-0 = <&pinctrl_usbh1>;
422 vbus-supply = <&reg_usbh1_vbus>; 411 vbus-supply = <&reg_hub_reset>;
423 fsl,usbphy = <&usbh1phy>; 412 fsl,usbphy = <&usbh1phy>;
424 phy_type = "ulpi"; 413 phy_type = "ulpi";
425 status = "okay"; 414 status = "okay";
@@ -429,7 +418,6 @@
429 dr_mode = "otg"; 418 dr_mode = "otg";
430 disable-over-current; 419 disable-over-current;
431 phy_type = "utmi_wide"; 420 phy_type = "utmi_wide";
432 vbus-supply = <&reg_usbotg_vbus>;
433 status = "okay"; 421 status = "okay";
434}; 422};
435 423
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index 4fc03b7f1cee..2109d0763c1b 100644
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -335,8 +335,8 @@
335 vpu: vpu@02040000 { 335 vpu: vpu@02040000 {
336 compatible = "cnm,coda960"; 336 compatible = "cnm,coda960";
337 reg = <0x02040000 0x3c000>; 337 reg = <0x02040000 0x3c000>;
338 interrupts = <0 3 IRQ_TYPE_LEVEL_HIGH>, 338 interrupts = <0 12 IRQ_TYPE_LEVEL_HIGH>,
339 <0 12 IRQ_TYPE_LEVEL_HIGH>; 339 <0 3 IRQ_TYPE_LEVEL_HIGH>;
340 interrupt-names = "bit", "jpeg"; 340 interrupt-names = "bit", "jpeg";
341 clocks = <&clks IMX6QDL_CLK_VPU_AXI>, 341 clocks = <&clks IMX6QDL_CLK_VPU_AXI>,
342 <&clks IMX6QDL_CLK_MMDC_CH0_AXI>, 342 <&clks IMX6QDL_CLK_MMDC_CH0_AXI>,
diff --git a/arch/arm/boot/dts/imx6sx-sdb.dts b/arch/arm/boot/dts/imx6sx-sdb.dts
index 1e6e5cc1c14c..8c1febd7e3f2 100644
--- a/arch/arm/boot/dts/imx6sx-sdb.dts
+++ b/arch/arm/boot/dts/imx6sx-sdb.dts
@@ -159,13 +159,28 @@
159 pinctrl-0 = <&pinctrl_enet1>; 159 pinctrl-0 = <&pinctrl_enet1>;
160 phy-supply = <&reg_enet_3v3>; 160 phy-supply = <&reg_enet_3v3>;
161 phy-mode = "rgmii"; 161 phy-mode = "rgmii";
162 phy-handle = <&ethphy1>;
162 status = "okay"; 163 status = "okay";
164
165 mdio {
166 #address-cells = <1>;
167 #size-cells = <0>;
168
169 ethphy1: ethernet-phy@0 {
170 reg = <0>;
171 };
172
173 ethphy2: ethernet-phy@1 {
174 reg = <1>;
175 };
176 };
163}; 177};
164 178
165&fec2 { 179&fec2 {
166 pinctrl-names = "default"; 180 pinctrl-names = "default";
167 pinctrl-0 = <&pinctrl_enet2>; 181 pinctrl-0 = <&pinctrl_enet2>;
168 phy-mode = "rgmii"; 182 phy-mode = "rgmii";
183 phy-handle = <&ethphy2>;
169 status = "okay"; 184 status = "okay";
170}; 185};
171 186
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index 657da14cb4b5..c70bb27ac65a 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -142,6 +142,7 @@
142 scfg: scfg@1570000 { 142 scfg: scfg@1570000 {
143 compatible = "fsl,ls1021a-scfg", "syscon"; 143 compatible = "fsl,ls1021a-scfg", "syscon";
144 reg = <0x0 0x1570000 0x0 0x10000>; 144 reg = <0x0 0x1570000 0x0 0x10000>;
145 big-endian;
145 }; 146 };
146 147
147 clockgen: clocking@1ee1000 { 148 clockgen: clocking@1ee1000 {
diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts
index 53f3ca064140..b550c41b46f1 100644
--- a/arch/arm/boot/dts/omap3-n900.dts
+++ b/arch/arm/boot/dts/omap3-n900.dts
@@ -700,11 +700,9 @@
700 }; 700 };
701 }; 701 };
702 702
703 /* Ethernet is on some early development boards and qemu */
703 ethernet@gpmc { 704 ethernet@gpmc {
704 compatible = "smsc,lan91c94"; 705 compatible = "smsc,lan91c94";
705
706 status = "disabled";
707
708 interrupt-parent = <&gpio2>; 706 interrupt-parent = <&gpio2>;
709 interrupts = <22 IRQ_TYPE_LEVEL_HIGH>; /* gpio54 */ 707 interrupts = <22 IRQ_TYPE_LEVEL_HIGH>; /* gpio54 */
710 reg = <1 0x300 0xf>; /* 16 byte IO range at offset 0x300 */ 708 reg = <1 0x300 0xf>; /* 16 byte IO range at offset 0x300 */
diff --git a/arch/arm/boot/dts/rk3288-evb.dtsi b/arch/arm/boot/dts/rk3288-evb.dtsi
index 3e067dd65d0c..6194d673e80b 100644
--- a/arch/arm/boot/dts/rk3288-evb.dtsi
+++ b/arch/arm/boot/dts/rk3288-evb.dtsi
@@ -155,6 +155,15 @@
155}; 155};
156 156
157&pinctrl { 157&pinctrl {
158 pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma {
159 drive-strength = <8>;
160 };
161
162 pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma {
163 bias-pull-up;
164 drive-strength = <8>;
165 };
166
158 backlight { 167 backlight {
159 bl_en: bl-en { 168 bl_en: bl-en {
160 rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_pull_none>; 169 rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_pull_none>;
@@ -173,6 +182,27 @@
173 }; 182 };
174 }; 183 };
175 184
185 sdmmc {
186 /*
187 * Default drive strength isn't enough to achieve even
188 * high-speed mode on EVB board so bump up to 8ma.
189 */
190 sdmmc_bus4: sdmmc-bus4 {
191 rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
192 <6 17 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
193 <6 18 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
194 <6 19 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
195 };
196
197 sdmmc_clk: sdmmc-clk {
198 rockchip,pins = <6 20 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
199 };
200
201 sdmmc_cmd: sdmmc-cmd {
202 rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
203 };
204 };
205
176 usb { 206 usb {
177 host_vbus_drv: host-vbus-drv { 207 host_vbus_drv: host-vbus-drv {
178 rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>; 208 rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
diff --git a/arch/arm/boot/dts/sama5d3xmb.dtsi b/arch/arm/boot/dts/sama5d3xmb.dtsi
index 49c10d33df30..77e03655aca3 100644
--- a/arch/arm/boot/dts/sama5d3xmb.dtsi
+++ b/arch/arm/boot/dts/sama5d3xmb.dtsi
@@ -176,7 +176,7 @@
176 "Headphone Jack", "HPOUTR", 176 "Headphone Jack", "HPOUTR",
177 "IN2L", "Line In Jack", 177 "IN2L", "Line In Jack",
178 "IN2R", "Line In Jack", 178 "IN2R", "Line In Jack",
179 "MICBIAS", "IN1L", 179 "Mic", "MICBIAS",
180 "IN1L", "Mic"; 180 "IN1L", "Mic";
181 181
182 atmel,ssc-controller = <&ssc0>; 182 atmel,ssc-controller = <&ssc0>;
diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi
index 1b0f30c2c4a5..b94995d1889f 100644
--- a/arch/arm/boot/dts/sama5d4.dtsi
+++ b/arch/arm/boot/dts/sama5d4.dtsi
@@ -1008,7 +1008,7 @@
1008 1008
1009 pit: timer@fc068630 { 1009 pit: timer@fc068630 {
1010 compatible = "atmel,at91sam9260-pit"; 1010 compatible = "atmel,at91sam9260-pit";
1011 reg = <0xfc068630 0xf>; 1011 reg = <0xfc068630 0x10>;
1012 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>; 1012 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>;
1013 clocks = <&h32ck>; 1013 clocks = <&h32ck>;
1014 }; 1014 };
diff --git a/arch/arm/boot/dts/ste-nomadik-nhk15.dts b/arch/arm/boot/dts/ste-nomadik-nhk15.dts
index a8c00ee7522a..3d0b8755caee 100644
--- a/arch/arm/boot/dts/ste-nomadik-nhk15.dts
+++ b/arch/arm/boot/dts/ste-nomadik-nhk15.dts
@@ -25,11 +25,11 @@
25 stmpe2401_1 { 25 stmpe2401_1 {
26 stmpe2401_1_nhk_mode: stmpe2401_1_nhk { 26 stmpe2401_1_nhk_mode: stmpe2401_1_nhk {
27 nhk_cfg1 { 27 nhk_cfg1 {
28 ste,pins = "GPIO76_B20"; // IRQ line 28 pins = "GPIO76_B20"; // IRQ line
29 ste,input = <0>; 29 ste,input = <0>;
30 }; 30 };
31 nhk_cfg2 { 31 nhk_cfg2 {
32 ste,pins = "GPIO77_B8"; // reset line 32 pins = "GPIO77_B8"; // reset line
33 ste,output = <1>; 33 ste,output = <1>;
34 }; 34 };
35 }; 35 };
@@ -37,11 +37,11 @@
37 stmpe2401_2 { 37 stmpe2401_2 {
38 stmpe2401_2_nhk_mode: stmpe2401_2_nhk { 38 stmpe2401_2_nhk_mode: stmpe2401_2_nhk {
39 nhk_cfg1 { 39 nhk_cfg1 {
40 ste,pins = "GPIO78_A8"; // IRQ line 40 pins = "GPIO78_A8"; // IRQ line
41 ste,input = <0>; 41 ste,input = <0>;
42 }; 42 };
43 nhk_cfg2 { 43 nhk_cfg2 {
44 ste,pins = "GPIO79_C9"; // reset line 44 pins = "GPIO79_C9"; // reset line
45 ste,output = <1>; 45 ste,output = <1>;
46 }; 46 };
47 }; 47 };
diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts b/arch/arm/boot/dts/tegra20-seaboard.dts
index ea282c7c0ca5..e2fed2712249 100644
--- a/arch/arm/boot/dts/tegra20-seaboard.dts
+++ b/arch/arm/boot/dts/tegra20-seaboard.dts
@@ -406,7 +406,7 @@
406 clock-frequency = <400000>; 406 clock-frequency = <400000>;
407 407
408 magnetometer@c { 408 magnetometer@c {
409 compatible = "ak,ak8975"; 409 compatible = "asahi-kasei,ak8975";
410 reg = <0xc>; 410 reg = <0xc>;
411 interrupt-parent = <&gpio>; 411 interrupt-parent = <&gpio>;
412 interrupts = <TEGRA_GPIO(N, 5) IRQ_TYPE_LEVEL_HIGH>; 412 interrupts = <TEGRA_GPIO(N, 5) IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm/boot/dts/vf610-twr.dts b/arch/arm/boot/dts/vf610-twr.dts
index a0f762159cb2..f2b64b1b00fa 100644
--- a/arch/arm/boot/dts/vf610-twr.dts
+++ b/arch/arm/boot/dts/vf610-twr.dts
@@ -129,13 +129,28 @@
129 129
130&fec0 { 130&fec0 {
131 phy-mode = "rmii"; 131 phy-mode = "rmii";
132 phy-handle = <&ethphy0>;
132 pinctrl-names = "default"; 133 pinctrl-names = "default";
133 pinctrl-0 = <&pinctrl_fec0>; 134 pinctrl-0 = <&pinctrl_fec0>;
134 status = "okay"; 135 status = "okay";
136
137 mdio {
138 #address-cells = <1>;
139 #size-cells = <0>;
140
141 ethphy0: ethernet-phy@0 {
142 reg = <0>;
143 };
144
145 ethphy1: ethernet-phy@1 {
146 reg = <1>;
147 };
148 };
135}; 149};
136 150
137&fec1 { 151&fec1 {
138 phy-mode = "rmii"; 152 phy-mode = "rmii";
153 phy-handle = <&ethphy1>;
139 pinctrl-names = "default"; 154 pinctrl-names = "default";
140 pinctrl-0 = <&pinctrl_fec1>; 155 pinctrl-0 = <&pinctrl_fec1>;
141 status = "okay"; 156 status = "okay";
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-04 05:41:36 -0500