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-rw-r--r--arch/arm/boot/dts/Makefile8
-rw-r--r--arch/arm/boot/dts/am335x-evm.dts60
-rw-r--r--arch/arm/boot/dts/am335x-evmsk.dts56
-rw-r--r--arch/arm/boot/dts/am33xx.dtsi13
-rw-r--r--arch/arm/boot/dts/am3517-craneboard.dts174
-rw-r--r--arch/arm/boot/dts/am4372.dtsi46
-rw-r--r--arch/arm/boot/dts/am437x-gp-evm.dts127
-rw-r--r--arch/arm/boot/dts/am43x-epos-evm.dts183
-rw-r--r--arch/arm/boot/dts/dra7.dtsi151
-rw-r--r--arch/arm/boot/dts/omap2.dtsi31
-rw-r--r--arch/arm/boot/dts/omap2420.dtsi2
-rw-r--r--arch/arm/boot/dts/omap2430.dtsi5
-rw-r--r--arch/arm/boot/dts/omap3-beagle-xm.dts142
-rw-r--r--arch/arm/boot/dts/omap3-beagle.dts139
-rw-r--r--arch/arm/boot/dts/omap3-cm-t3517.dts136
-rw-r--r--arch/arm/boot/dts/omap3-cm-t3530.dts48
-rw-r--r--arch/arm/boot/dts/omap3-cm-t3730.dts57
-rw-r--r--arch/arm/boot/dts/omap3-cm-t3x.dtsi110
-rw-r--r--arch/arm/boot/dts/omap3-cm-t3x30.dtsi74
-rw-r--r--arch/arm/boot/dts/omap3-devkit8000.dts16
-rw-r--r--arch/arm/boot/dts/omap3-gta04.dts51
-rw-r--r--arch/arm/boot/dts/omap3-igep.dtsi1
-rw-r--r--arch/arm/boot/dts/omap3-igep0020.dts58
-rw-r--r--arch/arm/boot/dts/omap3-lilly-a83x.dtsi459
-rw-r--r--arch/arm/boot/dts/omap3-lilly-dbb056.dts170
-rw-r--r--arch/arm/boot/dts/omap3-n900.dts167
-rw-r--r--arch/arm/boot/dts/omap3-overo.dtsi4
-rw-r--r--arch/arm/boot/dts/omap3-sb-t35.dtsi29
-rw-r--r--arch/arm/boot/dts/omap3-sbc-t3517.dts43
-rw-r--r--arch/arm/boot/dts/omap3-sbc-t3530.dts36
-rw-r--r--arch/arm/boot/dts/omap3-sbc-t3730.dts23
-rw-r--r--arch/arm/boot/dts/omap3.dtsi81
-rw-r--r--arch/arm/boot/dts/omap3430-sdp.dts7
-rw-r--r--arch/arm/boot/dts/omap3430es1-clocks.dtsi16
-rw-r--r--arch/arm/boot/dts/omap36xx-am35xx-omap3430es2plus-clocks.dtsi6
-rw-r--r--arch/arm/boot/dts/omap36xx-clocks.dtsi20
-rw-r--r--arch/arm/boot/dts/omap36xx-omap3430es2plus-clocks.dtsi10
-rw-r--r--arch/arm/boot/dts/omap36xx.dtsi28
-rw-r--r--arch/arm/boot/dts/omap3xxx-clocks.dtsi8
-rw-r--r--arch/arm/boot/dts/omap4-duovero-parlor.dts146
-rw-r--r--arch/arm/boot/dts/omap4-duovero.dtsi252
-rw-r--r--arch/arm/boot/dts/omap4-panda-common.dtsi146
-rw-r--r--arch/arm/boot/dts/omap4-sdp.dts146
-rw-r--r--arch/arm/boot/dts/omap4.dtsi143
-rw-r--r--arch/arm/boot/dts/omap443x.dtsi26
-rw-r--r--arch/arm/boot/dts/omap4460.dtsi37
-rw-r--r--arch/arm/boot/dts/omap5-uevm.dts8
-rw-r--r--arch/arm/boot/dts/omap5.dtsi43
-rw-r--r--arch/arm/boot/dts/tps65910.dtsi5
-rw-r--r--arch/arm/boot/dts/twl4030.dtsi7
50 files changed, 3552 insertions, 202 deletions
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 032030361bef..d4d06e502c16 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -199,6 +199,10 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
199 omap2420-n810-wimax.dtb \ 199 omap2420-n810-wimax.dtb \
200 omap3430-sdp.dtb \ 200 omap3430-sdp.dtb \
201 omap3-beagle.dtb \ 201 omap3-beagle.dtb \
202 omap3-cm-t3517.dtb \
203 omap3-sbc-t3517.dtb \
204 omap3-cm-t3530.dtb \
205 omap3-sbc-t3530.dtb \
202 omap3-cm-t3730.dtb \ 206 omap3-cm-t3730.dtb \
203 omap3-sbc-t3730.dtb \ 207 omap3-sbc-t3730.dtb \
204 omap3-devkit8000.dtb \ 208 omap3-devkit8000.dtb \
@@ -214,7 +218,9 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
214 omap3-gta04.dtb \ 218 omap3-gta04.dtb \
215 omap3-igep0020.dtb \ 219 omap3-igep0020.dtb \
216 omap3-igep0030.dtb \ 220 omap3-igep0030.dtb \
221 omap3-lilly-dbb056.dtb \
217 omap3-zoom3.dtb \ 222 omap3-zoom3.dtb \
223 omap4-duovero-parlor.dtb \
218 omap4-panda.dtb \ 224 omap4-panda.dtb \
219 omap4-panda-a4.dtb \ 225 omap4-panda-a4.dtb \
220 omap4-panda-es.dtb \ 226 omap4-panda-es.dtb \
@@ -228,9 +234,11 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
228 am335x-boneblack.dtb \ 234 am335x-boneblack.dtb \
229 am335x-nano.dtb \ 235 am335x-nano.dtb \
230 am335x-base0033.dtb \ 236 am335x-base0033.dtb \
237 am3517-craneboard.dtb \
231 am3517-evm.dtb \ 238 am3517-evm.dtb \
232 am3517_mt_ventoux.dtb \ 239 am3517_mt_ventoux.dtb \
233 am43x-epos-evm.dtb \ 240 am43x-epos-evm.dtb \
241 am437x-gp-evm.dtb \
234 dra7-evm.dtb 242 dra7-evm.dtb
235dtb-$(CONFIG_ARCH_ORION5X) += orion5x-lacie-ethernet-disk-mini-v2.dtb 243dtb-$(CONFIG_ARCH_ORION5X) += orion5x-lacie-ethernet-disk-mini-v2.dtb
236dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb 244dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb
diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts
index 7e6c64ed966d..28ae040e7c3d 100644
--- a/arch/arm/boot/dts/am335x-evm.dts
+++ b/arch/arm/boot/dts/am335x-evm.dts
@@ -260,6 +260,12 @@
260 >; 260 >;
261 }; 261 };
262 262
263 mmc1_pins: pinmux_mmc1_pins {
264 pinctrl-single,pins = <
265 0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
266 >;
267 };
268
263 lcd_pins_s0: lcd_pins_s0 { 269 lcd_pins_s0: lcd_pins_s0 {
264 pinctrl-single,pins = < 270 pinctrl-single,pins = <
265 0x20 0x01 /* gpmc_ad8.lcd_data16, OUTPUT | MODE1 */ 271 0x20 0x01 /* gpmc_ad8.lcd_data16, OUTPUT | MODE1 */
@@ -434,9 +440,9 @@
434 ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */ 440 ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
435 nand@0,0 { 441 nand@0,0 {
436 reg = <0 0 0>; /* CS0, offset 0 */ 442 reg = <0 0 0>; /* CS0, offset 0 */
437 nand-bus-width = <8>;
438 ti,nand-ecc-opt = "bch8"; 443 ti,nand-ecc-opt = "bch8";
439 gpmc,device-nand = "true"; 444 ti,elm-id = <&elm>;
445 nand-bus-width = <8>;
440 gpmc,device-width = <1>; 446 gpmc,device-width = <1>;
441 gpmc,sync-clk-ps = <0>; 447 gpmc,sync-clk-ps = <0>;
442 gpmc,cs-on-ns = <0>; 448 gpmc,cs-on-ns = <0>;
@@ -460,50 +466,51 @@
460 gpmc,wait-monitoring-ns = <0>; 466 gpmc,wait-monitoring-ns = <0>;
461 gpmc,wr-access-ns = <40>; 467 gpmc,wr-access-ns = <40>;
462 gpmc,wr-data-mux-bus-ns = <0>; 468 gpmc,wr-data-mux-bus-ns = <0>;
463 469 /* MTD partition table */
470 /* All SPL-* partitions are sized to minimal length
471 * which can be independently programmable. For
472 * NAND flash this is equal to size of erase-block */
464 #address-cells = <1>; 473 #address-cells = <1>;
465 #size-cells = <1>; 474 #size-cells = <1>;
466 elm_id = <&elm>;
467
468 /* MTD partition table */
469 partition@0 { 475 partition@0 {
470 label = "SPL1"; 476 label = "NAND.SPL";
471 reg = <0x00000000 0x000020000>; 477 reg = <0x00000000 0x000020000>;
472 }; 478 };
473
474 partition@1 { 479 partition@1 {
475 label = "SPL2"; 480 label = "NAND.SPL.backup1";
476 reg = <0x00020000 0x00020000>; 481 reg = <0x00020000 0x00020000>;
477 }; 482 };
478
479 partition@2 { 483 partition@2 {
480 label = "SPL3"; 484 label = "NAND.SPL.backup2";
481 reg = <0x00040000 0x00020000>; 485 reg = <0x00040000 0x00020000>;
482 }; 486 };
483
484 partition@3 { 487 partition@3 {
485 label = "SPL4"; 488 label = "NAND.SPL.backup3";
486 reg = <0x00060000 0x00020000>; 489 reg = <0x00060000 0x00020000>;
487 }; 490 };
488
489 partition@4 { 491 partition@4 {
490 label = "U-boot"; 492 label = "NAND.u-boot-spl";
491 reg = <0x00080000 0x001e0000>; 493 reg = <0x00080000 0x00040000>;
492 }; 494 };
493
494 partition@5 { 495 partition@5 {
495 label = "environment"; 496 label = "NAND.u-boot";
496 reg = <0x00260000 0x00020000>; 497 reg = <0x000C0000 0x00100000>;
497 }; 498 };
498
499 partition@6 { 499 partition@6 {
500 label = "Kernel"; 500 label = "NAND.u-boot-env";
501 reg = <0x00280000 0x00500000>; 501 reg = <0x001C0000 0x00020000>;
502 }; 502 };
503
504 partition@7 { 503 partition@7 {
505 label = "File-System"; 504 label = "NAND.u-boot-env.backup1";
506 reg = <0x00780000 0x0F880000>; 505 reg = <0x001E0000 0x00020000>;
506 };
507 partition@8 {
508 label = "NAND.kernel";
509 reg = <0x00200000 0x00800000>;
510 };
511 partition@9 {
512 label = "NAND.file-system";
513 reg = <0x00A00000 0x0F600000>;
507 }; 514 };
508 }; 515 };
509}; 516};
@@ -643,6 +650,9 @@
643 status = "okay"; 650 status = "okay";
644 vmmc-supply = <&vmmc_reg>; 651 vmmc-supply = <&vmmc_reg>;
645 bus-width = <4>; 652 bus-width = <4>;
653 pinctrl-names = "default";
654 pinctrl-0 = <&mmc1_pins>;
655 cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
646}; 656};
647 657
648&sham { 658&sham {
diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts
index 486880b74831..ec08f6f677c3 100644
--- a/arch/arm/boot/dts/am335x-evmsk.dts
+++ b/arch/arm/boot/dts/am335x-evmsk.dts
@@ -45,6 +45,18 @@
45 regulator-boot-on; 45 regulator-boot-on;
46 }; 46 };
47 47
48 wl12xx_vmmc: fixedregulator@2 {
49 pinctrl-names = "default";
50 pinctrl-0 = <&wl12xx_gpio>;
51 compatible = "regulator-fixed";
52 regulator-name = "vwl1271";
53 regulator-min-microvolt = <1800000>;
54 regulator-max-microvolt = <1800000>;
55 gpio = <&gpio1 29 0>;
56 startup-delay-us = <70000>;
57 enable-active-high;
58 };
59
48 leds { 60 leds {
49 pinctrl-names = "default"; 61 pinctrl-names = "default";
50 pinctrl-0 = <&user_leds_s0>; 62 pinctrl-0 = <&user_leds_s0>;
@@ -270,6 +282,24 @@
270 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */ 282 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
271 >; 283 >;
272 }; 284 };
285
286 mmc2_pins: pinmux_mmc2_pins {
287 pinctrl-single,pins = <
288 0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_31 */
289 0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
290 0x84 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
291 0x00 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
292 0x04 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
293 0x08 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
294 0x0c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
295 >;
296 };
297
298 wl12xx_gpio: pinmux_wl12xx_gpio {
299 pinctrl-single,pins = <
300 0x7c (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_csn0.gpio1_29 */
301 >;
302 };
273}; 303};
274 304
275&uart0 { 305&uart0 {
@@ -342,9 +372,22 @@
342 status = "okay"; 372 status = "okay";
343 }; 373 };
344 374
375 usb-phy@47401b00 {
376 status = "okay";
377 };
378
345 usb@47401000 { 379 usb@47401000 {
346 status = "okay"; 380 status = "okay";
347 }; 381 };
382
383 usb@47401800 {
384 status = "okay";
385 dr_mode = "host";
386 };
387
388 dma-controller@07402000 {
389 status = "okay";
390 };
348}; 391};
349 392
350&epwmss2 { 393&epwmss2 {
@@ -440,6 +483,7 @@
440 pinctrl-names = "default", "sleep"; 483 pinctrl-names = "default", "sleep";
441 pinctrl-0 = <&cpsw_default>; 484 pinctrl-0 = <&cpsw_default>;
442 pinctrl-1 = <&cpsw_sleep>; 485 pinctrl-1 = <&cpsw_sleep>;
486 dual_emac = <1>;
443}; 487};
444 488
445&davinci_mdio { 489&davinci_mdio {
@@ -451,11 +495,13 @@
451&cpsw_emac0 { 495&cpsw_emac0 {
452 phy_id = <&davinci_mdio>, <0>; 496 phy_id = <&davinci_mdio>, <0>;
453 phy-mode = "rgmii-txid"; 497 phy-mode = "rgmii-txid";
498 dual_emac_res_vlan = <1>;
454}; 499};
455 500
456&cpsw_emac1 { 501&cpsw_emac1 {
457 phy_id = <&davinci_mdio>, <1>; 502 phy_id = <&davinci_mdio>, <1>;
458 phy-mode = "rgmii-txid"; 503 phy-mode = "rgmii-txid";
504 dual_emac_res_vlan = <2>;
459}; 505};
460 506
461&mmc1 { 507&mmc1 {
@@ -479,6 +525,16 @@
479 ti,no-reset-on-init; 525 ti,no-reset-on-init;
480}; 526};
481 527
528&mmc2 {
529 status = "okay";
530 vmmc-supply = <&wl12xx_vmmc>;
531 ti,non-removable;
532 bus-width = <4>;
533 cap-power-off-card;
534 pinctrl-names = "default";
535 pinctrl-0 = <&mmc2_pins>;
536};
537
482&mcasp1 { 538&mcasp1 {
483 pinctrl-names = "default"; 539 pinctrl-names = "default";
484 pinctrl-0 = <&mcasp1_pins>; 540 pinctrl-0 = <&mcasp1_pins>;
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 6d95d3df33c7..707342914a6f 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -58,6 +58,10 @@
58 275000 1125000 58 275000 1125000
59 >; 59 >;
60 voltage-tolerance = <2>; /* 2 percentage */ 60 voltage-tolerance = <2>; /* 2 percentage */
61
62 clocks = <&dpll_mpu_ck>;
63 clock-names = "cpu";
64
61 clock-latency = <300000>; /* From omap-cpufreq driver */ 65 clock-latency = <300000>; /* From omap-cpufreq driver */
62 }; 66 };
63 }; 67 };
@@ -318,6 +322,7 @@
318 compatible = "ti,omap4-hwspinlock"; 322 compatible = "ti,omap4-hwspinlock";
319 reg = <0x480ca000 0x1000>; 323 reg = <0x480ca000 0x1000>;
320 ti,hwmods = "spinlock"; 324 ti,hwmods = "spinlock";
325 #hwlock-cells = <1>;
321 }; 326 };
322 327
323 wdt2: wdt@44e35000 { 328 wdt2: wdt@44e35000 {
@@ -399,7 +404,7 @@
399 ti,timer-pwm; 404 ti,timer-pwm;
400 }; 405 };
401 406
402 rtc@44e3e000 { 407 rtc: rtc@44e3e000 {
403 compatible = "ti,da830-rtc"; 408 compatible = "ti,da830-rtc";
404 reg = <0x44e3e000 0x1000>; 409 reg = <0x44e3e000 0x1000>;
405 interrupts = <75 410 interrupts = <75
@@ -582,6 +587,8 @@
582 compatible = "ti,am33xx-ecap"; 587 compatible = "ti,am33xx-ecap";
583 #pwm-cells = <3>; 588 #pwm-cells = <3>;
584 reg = <0x48300100 0x80>; 589 reg = <0x48300100 0x80>;
590 interrupts = <31>;
591 interrupt-names = "ecap0";
585 ti,hwmods = "ecap0"; 592 ti,hwmods = "ecap0";
586 status = "disabled"; 593 status = "disabled";
587 }; 594 };
@@ -610,6 +617,8 @@
610 compatible = "ti,am33xx-ecap"; 617 compatible = "ti,am33xx-ecap";
611 #pwm-cells = <3>; 618 #pwm-cells = <3>;
612 reg = <0x48302100 0x80>; 619 reg = <0x48302100 0x80>;
620 interrupts = <47>;
621 interrupt-names = "ecap1";
613 ti,hwmods = "ecap1"; 622 ti,hwmods = "ecap1";
614 status = "disabled"; 623 status = "disabled";
615 }; 624 };
@@ -638,6 +647,8 @@
638 compatible = "ti,am33xx-ecap"; 647 compatible = "ti,am33xx-ecap";
639 #pwm-cells = <3>; 648 #pwm-cells = <3>;
640 reg = <0x48304100 0x80>; 649 reg = <0x48304100 0x80>;
650 interrupts = <61>;
651 interrupt-names = "ecap2";
641 ti,hwmods = "ecap2"; 652 ti,hwmods = "ecap2";
642 status = "disabled"; 653 status = "disabled";
643 }; 654 };
diff --git a/arch/arm/boot/dts/am3517-craneboard.dts b/arch/arm/boot/dts/am3517-craneboard.dts
new file mode 100644
index 000000000000..2d40b3f241cd
--- /dev/null
+++ b/arch/arm/boot/dts/am3517-craneboard.dts
@@ -0,0 +1,174 @@
1/*
2 * See craneboard.org for more details
3 *
4 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10/dts-v1/;
11
12#include "am3517.dtsi"
13
14/ {
15 model = "TI AM3517 CraneBoard (TMDSEVM3517)";
16 compatible = "ti,am3517-craneboard", "ti,am3517", "ti,omap3";
17
18 memory {
19 device_type = "memory";
20 reg = <0x80000000 0x10000000>; /* 256 MB */
21 };
22
23 vbat: fixedregulator@0 {
24 compatible = "regulator-fixed";
25 regulator-name = "vbat";
26 regulator-min-microvolt = <5000000>;
27 regulator-max-microvolt = <5000000>;
28 regulator-boot-on;
29 };
30};
31
32&davinci_emac {
33 status = "okay";
34};
35
36&davinci_mdio {
37 status = "okay";
38};
39
40&i2c1 {
41 clock-frequency = <2600000>;
42
43 tps: tps@2d {
44 reg = <0x2d>;
45 };
46};
47
48&i2c2 {
49 clock-frequency = <400000>;
50 /* goes to expansion connector */
51 status = "disabled";
52};
53
54&i2c3 {
55 clock-frequency = <400000>;
56 /* goes to expansion connector */
57 status = "disabled";
58};
59
60&mmc1 {
61 vmmc-supply = <&vdd2_reg>;
62 bus-width = <8>;
63};
64
65&mmc2 {
66 /* goes to expansion connector */
67 status = "disabled";
68};
69
70&mmc3 {
71 /* goes to expansion connector */
72 status = "disabled";
73};
74
75#include "tps65910.dtsi"
76
77&omap3_pmx_core {
78 tps_pins: pinmux_tps_pins {
79 pinctrl-single,pins = <
80 0x1b0 (PIN_INPUT_PULLUP | MUX_MODE0) /* sys_nirq.sys_nirq */
81 >;
82 };
83};
84
85&tps {
86 pinctrl-names = "default";
87 pinctrl-0 = <&tps_pins>;
88
89 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
90 interrupt-parent = <&intc>;
91
92 ti,en-ck32k-xtal;
93
94 vcc1-supply = <&vbat>;
95 vcc2-supply = <&vbat>;
96 vcc3-supply = <&vbat>;
97 vcc4-supply = <&vbat>;
98 vcc5-supply = <&vbat>;
99 vcc6-supply = <&vbat>;
100 vcc7-supply = <&vbat>;
101 vccio-supply = <&vbat>;
102
103 regulators {
104 vrtc_reg: regulator@0 {
105 regulator-always-on;
106 };
107
108 vio_reg: regulator@1 {
109 regulator-always-on;
110 };
111
112 /*
113 * Unused:
114 * VDIG1=2.7V,300mA max
115 * VDIG2=1.8V,300mA max
116 */
117
118 vpll_reg: regulator@7 {
119 /* VDDS_DPLL_1V8 */
120 regulator-min-microvolt = <1800000>;
121 regulator-max-microvolt = <1800000>;
122 regulator-always-on;
123 };
124
125 vaux1_reg: regulator@9 {
126 /* VDDS_SRAM_1V8 */
127 regulator-min-microvolt = <1800000>;
128 regulator-max-microvolt = <1800000>;
129 regulator-always-on;
130 };
131
132 vaux2_reg: regulator@10 {
133 /* VDDA1P8V_USBPHY */
134 regulator-min-microvolt = <1800000>;
135 regulator-max-microvolt = <1800000>;
136 regulator-always-on;
137 };
138
139 /* VAUX33 unused */
140
141 vdac_reg: regulator@8 {
142 /* VDDA_DAC_1V8 */
143 regulator-min-microvolt = <1800000>;
144 regulator-max-microvolt = <1800000>;
145 regulator-always-on;
146 };
147
148 vmmc_reg: regulator@12 {
149 /* VDDA3P3V_USBPHY */
150 regulator-min-microvolt = <3300000>;
151 regulator-max-microvolt = <3300000>;
152 regulator-always-on;
153 };
154
155 vdd1_reg: regulator@2 {
156 /* VDD_CORE */
157 regulator-name = "vdd_core";
158 regulator-min-microvolt = <1200000>;
159 regulator-max-microvolt = <1200000>;
160 regulator-boot-on;
161 regulator-always-on;
162 };
163
164 vdd2_reg: regulator@3 {
165 /* VDDSHV_3V3 */
166 regulator-name = "vdd_shv";
167 regulator-min-microvolt = <3300000>;
168 regulator-max-microvolt = <3300000>;
169 regulator-always-on;
170 };
171
172 /* VDD3 unused */
173 };
174};
diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index c6bd4d986c29..36d523a26831 100644
--- a/arch/arm/boot/dts/am4372.dtsi
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -8,6 +8,7 @@
8 * kind, whether express or implied. 8 * kind, whether express or implied.
9 */ 9 */
10 10
11#include <dt-bindings/gpio/gpio.h>
11#include <dt-bindings/interrupt-controller/arm-gic.h> 12#include <dt-bindings/interrupt-controller/arm-gic.h>
12 13
13#include "skeleton.dtsi" 14#include "skeleton.dtsi"
@@ -33,6 +34,11 @@
33 compatible = "arm,cortex-a9"; 34 compatible = "arm,cortex-a9";
34 device_type = "cpu"; 35 device_type = "cpu";
35 reg = <0>; 36 reg = <0>;
37
38 clocks = <&dpll_mpu_ck>;
39 clock-names = "cpu";
40
41 clock-latency = <300000>; /* From omap-cpufreq driver */
36 }; 42 };
37 }; 43 };
38 44
@@ -351,6 +357,13 @@
351 status = "disabled"; 357 status = "disabled";
352 }; 358 };
353 359
360 hwspinlock: spinlock@480ca000 {
361 compatible = "ti,omap4-hwspinlock";
362 reg = <0x480ca000 0x1000>;
363 ti,hwmods = "spinlock";
364 #hwlock-cells = <1>;
365 };
366
354 i2c0: i2c@44e0b000 { 367 i2c0: i2c@44e0b000 {
355 compatible = "ti,am4372-i2c","ti,omap4-i2c"; 368 compatible = "ti,am4372-i2c","ti,omap4-i2c";
356 reg = <0x44e0b000 0x1000>; 369 reg = <0x44e0b000 0x1000>;
@@ -521,6 +534,7 @@
521 534
522 ecap0: ecap@48300100 { 535 ecap0: ecap@48300100 {
523 compatible = "ti,am4372-ecap","ti,am33xx-ecap"; 536 compatible = "ti,am4372-ecap","ti,am33xx-ecap";
537 #pwm-cells = <3>;
524 reg = <0x48300100 0x80>; 538 reg = <0x48300100 0x80>;
525 ti,hwmods = "ecap0"; 539 ti,hwmods = "ecap0";
526 status = "disabled"; 540 status = "disabled";
@@ -528,6 +542,7 @@
528 542
529 ehrpwm0: ehrpwm@48300200 { 543 ehrpwm0: ehrpwm@48300200 {
530 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm"; 544 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
545 #pwm-cells = <3>;
531 reg = <0x48300200 0x80>; 546 reg = <0x48300200 0x80>;
532 ti,hwmods = "ehrpwm0"; 547 ti,hwmods = "ehrpwm0";
533 status = "disabled"; 548 status = "disabled";
@@ -545,6 +560,7 @@
545 560
546 ecap1: ecap@48302100 { 561 ecap1: ecap@48302100 {
547 compatible = "ti,am4372-ecap","ti,am33xx-ecap"; 562 compatible = "ti,am4372-ecap","ti,am33xx-ecap";
563 #pwm-cells = <3>;
548 reg = <0x48302100 0x80>; 564 reg = <0x48302100 0x80>;
549 ti,hwmods = "ecap1"; 565 ti,hwmods = "ecap1";
550 status = "disabled"; 566 status = "disabled";
@@ -552,6 +568,7 @@
552 568
553 ehrpwm1: ehrpwm@48302200 { 569 ehrpwm1: ehrpwm@48302200 {
554 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm"; 570 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
571 #pwm-cells = <3>;
555 reg = <0x48302200 0x80>; 572 reg = <0x48302200 0x80>;
556 ti,hwmods = "ehrpwm1"; 573 ti,hwmods = "ehrpwm1";
557 status = "disabled"; 574 status = "disabled";
@@ -569,6 +586,7 @@
569 586
570 ecap2: ecap@48304100 { 587 ecap2: ecap@48304100 {
571 compatible = "ti,am4372-ecap","ti,am33xx-ecap"; 588 compatible = "ti,am4372-ecap","ti,am33xx-ecap";
589 #pwm-cells = <3>;
572 reg = <0x48304100 0x80>; 590 reg = <0x48304100 0x80>;
573 ti,hwmods = "ecap2"; 591 ti,hwmods = "ecap2";
574 status = "disabled"; 592 status = "disabled";
@@ -576,6 +594,7 @@
576 594
577 ehrpwm2: ehrpwm@48304200 { 595 ehrpwm2: ehrpwm@48304200 {
578 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm"; 596 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
597 #pwm-cells = <3>;
579 reg = <0x48304200 0x80>; 598 reg = <0x48304200 0x80>;
580 ti,hwmods = "ehrpwm2"; 599 ti,hwmods = "ehrpwm2";
581 status = "disabled"; 600 status = "disabled";
@@ -593,6 +612,7 @@
593 612
594 ehrpwm3: ehrpwm@48306200 { 613 ehrpwm3: ehrpwm@48306200 {
595 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm"; 614 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
615 #pwm-cells = <3>;
596 reg = <0x48306200 0x80>; 616 reg = <0x48306200 0x80>;
597 ti,hwmods = "ehrpwm3"; 617 ti,hwmods = "ehrpwm3";
598 status = "disabled"; 618 status = "disabled";
@@ -610,6 +630,7 @@
610 630
611 ehrpwm4: ehrpwm@48308200 { 631 ehrpwm4: ehrpwm@48308200 {
612 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm"; 632 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
633 #pwm-cells = <3>;
613 reg = <0x48308200 0x80>; 634 reg = <0x48308200 0x80>;
614 ti,hwmods = "ehrpwm4"; 635 ti,hwmods = "ehrpwm4";
615 status = "disabled"; 636 status = "disabled";
@@ -627,6 +648,7 @@
627 648
628 ehrpwm5: ehrpwm@4830a200 { 649 ehrpwm5: ehrpwm@4830a200 {
629 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm"; 650 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
651 #pwm-cells = <3>;
630 reg = <0x4830a200 0x80>; 652 reg = <0x4830a200 0x80>;
631 ti,hwmods = "ehrpwm5"; 653 ti,hwmods = "ehrpwm5";
632 status = "disabled"; 654 status = "disabled";
@@ -689,6 +711,30 @@
689 <&edma 11>; 711 <&edma 11>;
690 dma-names = "tx", "rx"; 712 dma-names = "tx", "rx";
691 }; 713 };
714
715 elm: elm@48080000 {
716 compatible = "ti,am3352-elm";
717 reg = <0x48080000 0x2000>;
718 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
719 ti,hwmods = "elm";
720 clocks = <&l4ls_gclk>;
721 clock-names = "fck";
722 status = "disabled";
723 };
724
725 gpmc: gpmc@50000000 {
726 compatible = "ti,am3352-gpmc";
727 ti,hwmods = "gpmc";
728 clocks = <&l3s_gclk>;
729 clock-names = "fck";
730 reg = <0x50000000 0x2000>;
731 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
732 gpmc,num-cs = <7>;
733 gpmc,num-waitpins = <2>;
734 #address-cells = <2>;
735 #size-cells = <1>;
736 status = "disabled";
737 };
692 }; 738 };
693}; 739};
694 740
diff --git a/arch/arm/boot/dts/am437x-gp-evm.dts b/arch/arm/boot/dts/am437x-gp-evm.dts
new file mode 100644
index 000000000000..df8798e8bd25
--- /dev/null
+++ b/arch/arm/boot/dts/am437x-gp-evm.dts
@@ -0,0 +1,127 @@
1/*
2 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9/* AM437x GP EVM */
10
11/dts-v1/;
12
13#include "am4372.dtsi"
14#include <dt-bindings/pinctrl/am43xx.h>
15#include <dt-bindings/pwm/pwm.h>
16#include <dt-bindings/gpio/gpio.h>
17
18/ {
19 model = "TI AM437x GP EVM";
20 compatible = "ti,am437x-gp-evm","ti,am4372","ti,am43";
21
22 vmmcsd_fixed: fixedregulator-sd {
23 compatible = "regulator-fixed";
24 regulator-name = "vmmcsd_fixed";
25 regulator-min-microvolt = <3300000>;
26 regulator-max-microvolt = <3300000>;
27 enable-active-high;
28 };
29
30 backlight {
31 compatible = "pwm-backlight";
32 pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>;
33 brightness-levels = <0 51 53 56 62 75 101 152 255>;
34 default-brightness-level = <8>;
35 };
36
37 matrix_keypad: matrix_keypad@0 {
38 compatible = "gpio-matrix-keypad";
39 debounce-delay-ms = <5>;
40 col-scan-delay-us = <2>;
41
42 row-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH /* Bank3, pin21 */
43 &gpio4 3 GPIO_ACTIVE_HIGH /* Bank4, pin3 */
44 &gpio4 2 GPIO_ACTIVE_HIGH>; /* Bank4, pin2 */
45
46 col-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH /* Bank3, pin19 */
47 &gpio3 20 GPIO_ACTIVE_HIGH>; /* Bank3, pin20 */
48
49 linux,keymap = <0x00000201 /* P1 */
50 0x00010202 /* P2 */
51 0x01000067 /* UP */
52 0x0101006a /* RIGHT */
53 0x02000069 /* LEFT */
54 0x0201006c>; /* DOWN */
55 };
56};
57
58&am43xx_pinmux {
59 i2c0_pins: i2c0_pins {
60 pinctrl-single,pins = <
61 0x188 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */
62 0x18c (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
63 >;
64 };
65
66 i2c1_pins: i2c1_pins {
67 pinctrl-single,pins = <
68 0x15c (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2) /* spi0_cs0.i2c1_scl */
69 0x158 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2) /* spi0_d1.i2c1_sda */
70 >;
71 };
72
73 mmc1_pins: pinmux_mmc1_pins {
74 pinctrl-single,pins = <
75 0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
76 >;
77 };
78
79 ecap0_pins: backlight_pins {
80 pinctrl-single,pins = <
81 0x164 MUX_MODE0 /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
82 >;
83 };
84};
85
86&i2c0 {
87 status = "okay";
88 pinctrl-names = "default";
89 pinctrl-0 = <&i2c0_pins>;
90};
91
92&i2c1 {
93 status = "okay";
94 pinctrl-names = "default";
95 pinctrl-0 = <&i2c1_pins>;
96};
97
98&epwmss0 {
99 status = "okay";
100};
101
102&ecap0 {
103 status = "okay";
104 pinctrl-names = "default";
105 pinctrl-0 = <&ecap0_pins>;
106};
107
108&gpio0 {
109 status = "okay";
110};
111
112&gpio3 {
113 status = "okay";
114};
115
116&gpio4 {
117 status = "okay";
118};
119
120&mmc1 {
121 status = "okay";
122 vmmc-supply = <&vmmcsd_fixed>;
123 bus-width = <4>;
124 pinctrl-names = "default";
125 pinctrl-0 = <&mmc1_pins>;
126 cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
127};
diff --git a/arch/arm/boot/dts/am43x-epos-evm.dts b/arch/arm/boot/dts/am43x-epos-evm.dts
index fbf9c4c7a94f..167dbc8494de 100644
--- a/arch/arm/boot/dts/am43x-epos-evm.dts
+++ b/arch/arm/boot/dts/am43x-epos-evm.dts
@@ -13,6 +13,7 @@
13#include "am4372.dtsi" 13#include "am4372.dtsi"
14#include <dt-bindings/pinctrl/am43xx.h> 14#include <dt-bindings/pinctrl/am43xx.h>
15#include <dt-bindings/gpio/gpio.h> 15#include <dt-bindings/gpio/gpio.h>
16#include <dt-bindings/pwm/pwm.h>
16 17
17/ { 18/ {
18 model = "TI AM43x EPOS EVM"; 19 model = "TI AM43x EPOS EVM";
@@ -79,6 +80,64 @@
79 0x18c (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */ 80 0x18c (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
80 >; 81 >;
81 }; 82 };
83
84 nand_flash_x8: nand_flash_x8 {
85 pinctrl-single,pins = <
86 0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a0.SELQSPIorNAND/GPIO */
87 0x0 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
88 0x4 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
89 0x8 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
90 0xc (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
91 0x10 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
92 0x14 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
93 0x18 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
94 0x1c (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
95 0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
96 0x74 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpmc_wpn */
97 0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
98 0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
99 0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
100 0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
101 0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */
102 >;
103 };
104
105 ecap0_pins: backlight_pins {
106 pinctrl-single,pins = <
107 0x164 MUX_MODE0 /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
108 >;
109 };
110
111 i2c2_pins: pinmux_i2c2_pins {
112 pinctrl-single,pins = <
113 0x1c0 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE8) /* i2c2_sda.i2c2_sda */
114 0x1c4 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE8) /* i2c2_scl.i2c2_scl */
115 >;
116 };
117
118 spi0_pins: pinmux_spi0_pins {
119 pinctrl-single,pins = <
120 0x150 (PIN_INPUT | MUX_MODE0) /* spi0_clk.spi0_clk */
121 0x154 (PIN_OUTPUT | MUX_MODE0) /* spi0_d0.spi0_d0 */
122 0x158 (PIN_INPUT | MUX_MODE0) /* spi0_d1.spi0_d1 */
123 0x15c (PIN_OUTPUT | MUX_MODE0) /* spi0_cs0.spi0_cs0 */
124 >;
125 };
126
127 spi1_pins: pinmux_spi1_pins {
128 pinctrl-single,pins = <
129 0x190 (PIN_INPUT | MUX_MODE3) /* mcasp0_aclkx.spi1_clk */
130 0x194 (PIN_OUTPUT | MUX_MODE3) /* mcasp0_fsx.spi1_d0 */
131 0x198 (PIN_INPUT | MUX_MODE3) /* mcasp0_axr0.spi1_d1 */
132 0x19c (PIN_OUTPUT | MUX_MODE3) /* mcasp0_ahclkr.spi1_cs0 */
133 >;
134 };
135
136 mmc1_pins: pinmux_mmc1_pins {
137 pinctrl-single,pins = <
138 0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
139 >;
140 };
82 }; 141 };
83 142
84 matrix_keypad: matrix_keypad@0 { 143 matrix_keypad: matrix_keypad@0 {
@@ -113,12 +172,22 @@
113 0x0203006c /* DOWN */ 172 0x0203006c /* DOWN */
114 0x03030069>; /* LEFT */ 173 0x03030069>; /* LEFT */
115 }; 174 };
175
176 backlight {
177 compatible = "pwm-backlight";
178 pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>;
179 brightness-levels = <0 51 53 56 62 75 101 152 255>;
180 default-brightness-level = <8>;
181 };
116}; 182};
117 183
118&mmc1 { 184&mmc1 {
119 status = "okay"; 185 status = "okay";
120 vmmc-supply = <&vmmcsd_fixed>; 186 vmmc-supply = <&vmmcsd_fixed>;
121 bus-width = <4>; 187 bus-width = <4>;
188 pinctrl-names = "default";
189 pinctrl-0 = <&mmc1_pins>;
190 cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
122}; 191};
123 192
124&mac { 193&mac {
@@ -169,6 +238,12 @@
169 }; 238 };
170}; 239};
171 240
241&i2c2 {
242 pinctrl-names = "default";
243 pinctrl-0 = <&i2c2_pins>;
244 status = "okay";
245};
246
172&gpio0 { 247&gpio0 {
173 status = "okay"; 248 status = "okay";
174}; 249};
@@ -184,3 +259,111 @@
184&gpio3 { 259&gpio3 {
185 status = "okay"; 260 status = "okay";
186}; 261};
262
263&elm {
264 status = "okay";
265};
266
267&gpmc {
268 status = "okay";
269 pinctrl-names = "default";
270 pinctrl-0 = <&nand_flash_x8>;
271 ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
272 nand@0,0 {
273 reg = <0 0 0>; /* CS0, offset 0 */
274 ti,nand-ecc-opt = "bch8";
275 ti,elm-id = <&elm>;
276 nand-bus-width = <8>;
277 gpmc,device-width = <1>;
278 gpmc,sync-clk-ps = <0>;
279 gpmc,cs-on-ns = <0>;
280 gpmc,cs-rd-off-ns = <40>; /* tCEA + tCHZ + 1 */
281 gpmc,cs-wr-off-ns = <40>;
282 gpmc,adv-on-ns = <0>; /* cs-on-ns */
283 gpmc,adv-rd-off-ns = <25>; /* min( tALH + tALS + 1) */
284 gpmc,adv-wr-off-ns = <25>; /* min( tALH + tALS + 1) */
285 gpmc,we-on-ns = <0>; /* cs-on-ns */
286 gpmc,we-off-ns = <20>; /* we-on-time + tWP + 2 */
287 gpmc,oe-on-ns = <3>; /* cs-on-ns + tRR + 2 */
288 gpmc,oe-off-ns = <30>; /* oe-on-ns + tRP + 2 */
289 gpmc,access-ns = <30>; /* tCEA + 4*/
290 gpmc,rd-cycle-ns = <40>;
291 gpmc,wr-cycle-ns = <40>;
292 gpmc,wait-on-read = "true";
293 gpmc,wait-on-write = "true";
294 gpmc,bus-turnaround-ns = <0>;
295 gpmc,cycle2cycle-delay-ns = <0>;
296 gpmc,clk-activation-ns = <0>;
297 gpmc,wait-monitoring-ns = <0>;
298 gpmc,wr-access-ns = <40>;
299 gpmc,wr-data-mux-bus-ns = <0>;
300 /* MTD partition table */
301 /* All SPL-* partitions are sized to minimal length
302 * which can be independently programmable. For
303 * NAND flash this is equal to size of erase-block */
304 #address-cells = <1>;
305 #size-cells = <1>;
306 partition@0 {
307 label = "NAND.SPL";
308 reg = <0x00000000 0x00040000>;
309 };
310 partition@1 {
311 label = "NAND.SPL.backup1";
312 reg = <0x00040000 0x00040000>;
313 };
314 partition@2 {
315 label = "NAND.SPL.backup2";
316 reg = <0x00080000 0x00040000>;
317 };
318 partition@3 {
319 label = "NAND.SPL.backup3";
320 reg = <0x000C0000 0x00040000>;
321 };
322 partition@4 {
323 label = "NAND.u-boot-spl-os";
324 reg = <0x00100000 0x00080000>;
325 };
326 partition@5 {
327 label = "NAND.u-boot";
328 reg = <0x00180000 0x00100000>;
329 };
330 partition@6 {
331 label = "NAND.u-boot-env";
332 reg = <0x00280000 0x00040000>;
333 };
334 partition@7 {
335 label = "NAND.u-boot-env.backup1";
336 reg = <0x002C0000 0x00040000>;
337 };
338 partition@8 {
339 label = "NAND.kernel";
340 reg = <0x00300000 0x00700000>;
341 };
342 partition@9 {
343 label = "NAND.file-system";
344 reg = <0x00800000 0x1F600000>;
345 };
346 };
347};
348
349&epwmss0 {
350 status = "okay";
351};
352
353&ecap0 {
354 status = "okay";
355 pinctrl-names = "default";
356 pinctrl-0 = <&ecap0_pins>;
357};
358
359&spi0 {
360 pinctrl-names = "default";
361 pinctrl-0 = <&spi0_pins>;
362 status = "okay";
363};
364
365&spi1 {
366 pinctrl-names = "default";
367 pinctrl-0 = <&spi1_pins>;
368 status = "okay";
369};
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 1fd75aa4639d..9e3caf3d19fb 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -47,6 +47,11 @@
47 1000000 1060000 47 1000000 1060000
48 1176000 1160000 48 1176000 1160000
49 >; 49 >;
50
51 clocks = <&dpll_mpu_ck>;
52 clock-names = "cpu";
53
54 clock-latency = <300000>; /* From omap-cpufreq driver */
50 }; 55 };
51 cpu@1 { 56 cpu@1 {
52 device_type = "cpu"; 57 device_type = "cpu";
@@ -464,6 +469,20 @@
464 ti,hwmods = "wd_timer2"; 469 ti,hwmods = "wd_timer2";
465 }; 470 };
466 471
472 hwspinlock: spinlock@4a0f6000 {
473 compatible = "ti,omap4-hwspinlock";
474 reg = <0x4a0f6000 0x1000>;
475 ti,hwmods = "spinlock";
476 #hwlock-cells = <1>;
477 };
478
479 dmm@4e000000 {
480 compatible = "ti,omap5-dmm";
481 reg = <0x4e000000 0x800>;
482 interrupts = <0 113 0x4>;
483 ti,hwmods = "dmm";
484 };
485
467 i2c1: i2c@48070000 { 486 i2c1: i2c@48070000 {
468 compatible = "ti,omap4-i2c"; 487 compatible = "ti,omap4-i2c";
469 reg = <0x48070000 0x100>; 488 reg = <0x48070000 0x100>;
@@ -559,6 +578,138 @@
559 status = "disabled"; 578 status = "disabled";
560 }; 579 };
561 580
581 abb_mpu: regulator-abb-mpu {
582 compatible = "ti,abb-v3";
583 regulator-name = "abb_mpu";
584 #address-cells = <0>;
585 #size-cells = <0>;
586 clocks = <&sys_clkin1>;
587 ti,settling-time = <50>;
588 ti,clock-cycles = <16>;
589
590 reg = <0x4ae07ddc 0x4>, <0x4ae07de0 0x4>,
591 <0x4ae06014 0x4>, <0x4a003b20 0x8>,
592 <0x4ae0c158 0x4>;
593 reg-names = "setup-address", "control-address",
594 "int-address", "efuse-address",
595 "ldo-address";
596 ti,tranxdone-status-mask = <0x80>;
597 /* LDOVBBMPU_FBB_MUX_CTRL */
598 ti,ldovbb-override-mask = <0x400>;
599 /* LDOVBBMPU_FBB_VSET_OUT */
600 ti,ldovbb-vset-mask = <0x1F>;
601
602 /*
603 * NOTE: only FBB mode used but actual vset will
604 * determine final biasing
605 */
606 ti,abb_info = <
607 /*uV ABB efuse rbb_m fbb_m vset_m*/
608 1060000 0 0x0 0 0x02000000 0x01F00000
609 1160000 0 0x4 0 0x02000000 0x01F00000
610 1210000 0 0x8 0 0x02000000 0x01F00000
611 >;
612 };
613
614 abb_ivahd: regulator-abb-ivahd {
615 compatible = "ti,abb-v3";
616 regulator-name = "abb_ivahd";
617 #address-cells = <0>;
618 #size-cells = <0>;
619 clocks = <&sys_clkin1>;
620 ti,settling-time = <50>;
621 ti,clock-cycles = <16>;
622
623 reg = <0x4ae07e34 0x4>, <0x4ae07e24 0x4>,
624 <0x4ae06010 0x4>, <0x4a0025cc 0x8>,
625 <0x4a002470 0x4>;
626 reg-names = "setup-address", "control-address",
627 "int-address", "efuse-address",
628 "ldo-address";
629 ti,tranxdone-status-mask = <0x40000000>;
630 /* LDOVBBIVA_FBB_MUX_CTRL */
631 ti,ldovbb-override-mask = <0x400>;
632 /* LDOVBBIVA_FBB_VSET_OUT */
633 ti,ldovbb-vset-mask = <0x1F>;
634
635 /*
636 * NOTE: only FBB mode used but actual vset will
637 * determine final biasing
638 */
639 ti,abb_info = <
640 /*uV ABB efuse rbb_m fbb_m vset_m*/
641 1055000 0 0x0 0 0x02000000 0x01F00000
642 1150000 0 0x4 0 0x02000000 0x01F00000
643 1250000 0 0x8 0 0x02000000 0x01F00000
644 >;
645 };
646
647 abb_dspeve: regulator-abb-dspeve {
648 compatible = "ti,abb-v3";
649 regulator-name = "abb_dspeve";
650 #address-cells = <0>;
651 #size-cells = <0>;
652 clocks = <&sys_clkin1>;
653 ti,settling-time = <50>;
654 ti,clock-cycles = <16>;
655
656 reg = <0x4ae07e30 0x4>, <0x4ae07e20 0x4>,
657 <0x4ae06010 0x4>, <0x4a0025e0 0x8>,
658 <0x4a00246c 0x4>;
659 reg-names = "setup-address", "control-address",
660 "int-address", "efuse-address",
661 "ldo-address";
662 ti,tranxdone-status-mask = <0x20000000>;
663 /* LDOVBBDSPEVE_FBB_MUX_CTRL */
664 ti,ldovbb-override-mask = <0x400>;
665 /* LDOVBBDSPEVE_FBB_VSET_OUT */
666 ti,ldovbb-vset-mask = <0x1F>;
667
668 /*
669 * NOTE: only FBB mode used but actual vset will
670 * determine final biasing
671 */
672 ti,abb_info = <
673 /*uV ABB efuse rbb_m fbb_m vset_m*/
674 1055000 0 0x0 0 0x02000000 0x01F00000
675 1150000 0 0x4 0 0x02000000 0x01F00000
676 1250000 0 0x8 0 0x02000000 0x01F00000
677 >;
678 };
679
680 abb_gpu: regulator-abb-gpu {
681 compatible = "ti,abb-v3";
682 regulator-name = "abb_gpu";
683 #address-cells = <0>;
684 #size-cells = <0>;
685 clocks = <&sys_clkin1>;
686 ti,settling-time = <50>;
687 ti,clock-cycles = <16>;
688
689 reg = <0x4ae07de4 0x4>, <0x4ae07de8 0x4>,
690 <0x4ae06010 0x4>, <0x4a003b08 0x8>,
691 <0x4ae0c154 0x4>;
692 reg-names = "setup-address", "control-address",
693 "int-address", "efuse-address",
694 "ldo-address";
695 ti,tranxdone-status-mask = <0x10000000>;
696 /* LDOVBBGPU_FBB_MUX_CTRL */
697 ti,ldovbb-override-mask = <0x400>;
698 /* LDOVBBGPU_FBB_VSET_OUT */
699 ti,ldovbb-vset-mask = <0x1F>;
700
701 /*
702 * NOTE: only FBB mode used but actual vset will
703 * determine final biasing
704 */
705 ti,abb_info = <
706 /*uV ABB efuse rbb_m fbb_m vset_m*/
707 1090000 0 0x0 0 0x02000000 0x01F00000
708 1210000 0 0x4 0 0x02000000 0x01F00000
709 1280000 0 0x8 0 0x02000000 0x01F00000
710 >;
711 };
712
562 mcspi1: spi@48098000 { 713 mcspi1: spi@48098000 {
563 compatible = "ti,omap4-mcspi"; 714 compatible = "ti,omap4-mcspi";
564 reg = <0x48098000 0x200>; 715 reg = <0x48098000 0x200>;
diff --git a/arch/arm/boot/dts/omap2.dtsi b/arch/arm/boot/dts/omap2.dtsi
index 5377ddf83bf8..22f35ea142c1 100644
--- a/arch/arm/boot/dts/omap2.dtsi
+++ b/arch/arm/boot/dts/omap2.dtsi
@@ -271,5 +271,36 @@
271 ti,hwmods = "timer12"; 271 ti,hwmods = "timer12";
272 ti,timer-pwm; 272 ti,timer-pwm;
273 }; 273 };
274
275 dss: dss@48050000 {
276 compatible = "ti,omap2-dss";
277 reg = <0x48050000 0x400>;
278 status = "disabled";
279 ti,hwmods = "dss_core";
280 #address-cells = <1>;
281 #size-cells = <1>;
282 ranges;
283
284 dispc@48050400 {
285 compatible = "ti,omap2-dispc";
286 reg = <0x48050400 0x400>;
287 interrupts = <25>;
288 ti,hwmods = "dss_dispc";
289 };
290
291 rfbi: encoder@48050800 {
292 compatible = "ti,omap2-rfbi";
293 reg = <0x48050800 0x400>;
294 status = "disabled";
295 ti,hwmods = "dss_rfbi";
296 };
297
298 venc: encoder@48050c00 {
299 compatible = "ti,omap2-venc";
300 reg = <0x48050c00 0x400>;
301 status = "disabled";
302 ti,hwmods = "dss_venc";
303 };
304 };
274 }; 305 };
275}; 306};
diff --git a/arch/arm/boot/dts/omap2420.dtsi b/arch/arm/boot/dts/omap2420.dtsi
index 60c605de22dd..85b1fb014c43 100644
--- a/arch/arm/boot/dts/omap2420.dtsi
+++ b/arch/arm/boot/dts/omap2420.dtsi
@@ -99,6 +99,7 @@
99 dmas = <&sdma 31>, 99 dmas = <&sdma 31>,
100 <&sdma 32>; 100 <&sdma 32>;
101 dma-names = "tx", "rx"; 101 dma-names = "tx", "rx";
102 status = "disabled";
102 }; 103 };
103 104
104 mcbsp2: mcbsp@48076000 { 105 mcbsp2: mcbsp@48076000 {
@@ -112,6 +113,7 @@
112 dmas = <&sdma 33>, 113 dmas = <&sdma 33>,
113 <&sdma 34>; 114 <&sdma 34>;
114 dma-names = "tx", "rx"; 115 dma-names = "tx", "rx";
116 status = "disabled";
115 }; 117 };
116 118
117 msdi1: mmc@4809c000 { 119 msdi1: mmc@4809c000 {
diff --git a/arch/arm/boot/dts/omap2430.dtsi b/arch/arm/boot/dts/omap2430.dtsi
index d624345666f5..9d2f028fd687 100644
--- a/arch/arm/boot/dts/omap2430.dtsi
+++ b/arch/arm/boot/dts/omap2430.dtsi
@@ -113,6 +113,7 @@
113 dmas = <&sdma 31>, 113 dmas = <&sdma 31>,
114 <&sdma 32>; 114 <&sdma 32>;
115 dma-names = "tx", "rx"; 115 dma-names = "tx", "rx";
116 status = "disabled";
116 }; 117 };
117 118
118 mcbsp2: mcbsp@48076000 { 119 mcbsp2: mcbsp@48076000 {
@@ -128,6 +129,7 @@
128 dmas = <&sdma 33>, 129 dmas = <&sdma 33>,
129 <&sdma 34>; 130 <&sdma 34>;
130 dma-names = "tx", "rx"; 131 dma-names = "tx", "rx";
132 status = "disabled";
131 }; 133 };
132 134
133 mcbsp3: mcbsp@4808c000 { 135 mcbsp3: mcbsp@4808c000 {
@@ -143,6 +145,7 @@
143 dmas = <&sdma 17>, 145 dmas = <&sdma 17>,
144 <&sdma 18>; 146 <&sdma 18>;
145 dma-names = "tx", "rx"; 147 dma-names = "tx", "rx";
148 status = "disabled";
146 }; 149 };
147 150
148 mcbsp4: mcbsp@4808e000 { 151 mcbsp4: mcbsp@4808e000 {
@@ -158,6 +161,7 @@
158 dmas = <&sdma 19>, 161 dmas = <&sdma 19>,
159 <&sdma 20>; 162 <&sdma 20>;
160 dma-names = "tx", "rx"; 163 dma-names = "tx", "rx";
164 status = "disabled";
161 }; 165 };
162 166
163 mcbsp5: mcbsp@48096000 { 167 mcbsp5: mcbsp@48096000 {
@@ -173,6 +177,7 @@
173 dmas = <&sdma 21>, 177 dmas = <&sdma 21>,
174 <&sdma 22>; 178 <&sdma 22>;
175 dma-names = "tx", "rx"; 179 dma-names = "tx", "rx";
180 status = "disabled";
176 }; 181 };
177 182
178 mmc1: mmc@4809c000 { 183 mmc1: mmc@4809c000 {
diff --git a/arch/arm/boot/dts/omap3-beagle-xm.dts b/arch/arm/boot/dts/omap3-beagle-xm.dts
index 447e714d435b..cf0be662297e 100644
--- a/arch/arm/boot/dts/omap3-beagle-xm.dts
+++ b/arch/arm/boot/dts/omap3-beagle-xm.dts
@@ -24,6 +24,11 @@
24 reg = <0x80000000 0x20000000>; /* 512 MB */ 24 reg = <0x80000000 0x20000000>; /* 512 MB */
25 }; 25 };
26 26
27 aliases {
28 display0 = &dvi0;
29 display1 = &tv0;
30 };
31
27 leds { 32 leds {
28 compatible = "gpio-leds"; 33 compatible = "gpio-leds";
29 34
@@ -86,6 +91,60 @@
86 reset-gpios = <&gpio5 19 GPIO_ACTIVE_LOW>; /* gpio_147 */ 91 reset-gpios = <&gpio5 19 GPIO_ACTIVE_LOW>; /* gpio_147 */
87 vcc-supply = <&hsusb2_power>; 92 vcc-supply = <&hsusb2_power>;
88 }; 93 };
94
95 tfp410: encoder@0 {
96 compatible = "ti,tfp410";
97 powerdown-gpios = <&twl_gpio 2 GPIO_ACTIVE_LOW>;
98
99 /* XXX pinctrl from twl */
100
101 ports {
102 #address-cells = <1>;
103 #size-cells = <0>;
104
105 port@0 {
106 reg = <0>;
107
108 tfp410_in: endpoint@0 {
109 remote-endpoint = <&dpi_out>;
110 };
111 };
112
113 port@1 {
114 reg = <1>;
115
116 tfp410_out: endpoint@0 {
117 remote-endpoint = <&dvi_connector_in>;
118 };
119 };
120 };
121 };
122
123 dvi0: connector@0 {
124 compatible = "dvi-connector";
125 label = "dvi";
126
127 digital;
128
129 ddc-i2c-bus = <&i2c3>;
130
131 port {
132 dvi_connector_in: endpoint {
133 remote-endpoint = <&tfp410_out>;
134 };
135 };
136 };
137
138 tv0: connector@1 {
139 compatible = "svideo-connector";
140 label = "tv";
141
142 port {
143 tv_connector_in: endpoint {
144 remote-endpoint = <&venc_out>;
145 };
146 };
147 };
89}; 148};
90 149
91&omap3_pmx_wkup { 150&omap3_pmx_wkup {
@@ -94,6 +153,17 @@
94 0x0e (PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE4) /* sys_boot2.gpio_4 */ 153 0x0e (PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE4) /* sys_boot2.gpio_4 */
95 >; 154 >;
96 }; 155 };
156
157 dss_dpi_pins2: pinmux_dss_dpi_pins1 {
158 pinctrl-single,pins = <
159 0x0a (PIN_OUTPUT | MUX_MODE3) /* sys_boot0.dss_data18 */
160 0x0c (PIN_OUTPUT | MUX_MODE3) /* sys_boot1.dss_data19 */
161 0x10 (PIN_OUTPUT | MUX_MODE3) /* sys_boot3.dss_data20 */
162 0x12 (PIN_OUTPUT | MUX_MODE3) /* sys_boot4.dss_data21 */
163 0x14 (PIN_OUTPUT | MUX_MODE3) /* sys_boot5.dss_data22 */
164 0x16 (PIN_OUTPUT | MUX_MODE3) /* sys_boot6.dss_data23 */
165 >;
166 };
97}; 167};
98 168
99&omap3_pmx_core { 169&omap3_pmx_core {
@@ -119,6 +189,35 @@
119 OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs1.hsusb2_data3 */ 189 OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs1.hsusb2_data3 */
120 >; 190 >;
121 }; 191 };
192
193 dss_dpi_pins1: pinmux_dss_dpi_pins2 {
194 pinctrl-single,pins = <
195 OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
196 OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
197 OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */
198 OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */
199
200 OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */
201 OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */
202 OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */
203 OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */
204 OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */
205 OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */
206 OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */
207 OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */
208 OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */
209 OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */
210 OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0) /* dss_data16.dss_data16 */
211 OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0) /* dss_data17.dss_data17 */
212
213 OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE3) /* dss_data18.dss_data0 */
214 OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE3) /* dss_data19.dss_data1 */
215 OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE3) /* dss_data20.dss_data2 */
216 OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE3) /* dss_data21.dss_data3 */
217 OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE3) /* dss_data22.dss_data4 */
218 OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE3) /* dss_data23.dss_data5 */
219 >;
220 };
122}; 221};
123 222
124&omap3_pmx_core2 { 223&omap3_pmx_core2 {
@@ -164,15 +263,6 @@
164 263
165&i2c3 { 264&i2c3 {
166 clock-frequency = <100000>; 265 clock-frequency = <100000>;
167
168 /*
169 * Display monitor features are burnt in the EEPROM
170 * as EDID data.
171 */
172 eeprom@50 {
173 compatible = "ti,eeprom";
174 reg = <0x50>;
175 };
176}; 266};
177 267
178&mmc1 { 268&mmc1 {
@@ -234,3 +324,37 @@
234 regulator-max-microvolt = <1800000>; 324 regulator-max-microvolt = <1800000>;
235 regulator-always-on; 325 regulator-always-on;
236}; 326};
327
328&mcbsp2 {
329 status = "okay";
330};
331
332&dss {
333 status = "ok";
334
335 pinctrl-names = "default";
336 pinctrl-0 = <
337 &dss_dpi_pins1
338 &dss_dpi_pins2
339 >;
340
341 port {
342 dpi_out: endpoint {
343 remote-endpoint = <&tfp410_in>;
344 data-lines = <24>;
345 };
346 };
347};
348
349&venc {
350 status = "ok";
351
352 vdda-supply = <&vdac>;
353
354 port {
355 venc_out: endpoint {
356 remote-endpoint = <&tv_connector_in>;
357 ti,channels = <2>;
358 };
359 };
360};
diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts
index 5053766d369b..3c3e6da1deac 100644
--- a/arch/arm/boot/dts/omap3-beagle.dts
+++ b/arch/arm/boot/dts/omap3-beagle.dts
@@ -24,6 +24,11 @@
24 reg = <0x80000000 0x10000000>; /* 256 MB */ 24 reg = <0x80000000 0x10000000>; /* 256 MB */
25 }; 25 };
26 26
27 aliases {
28 display0 = &dvi0;
29 display1 = &tv0;
30 };
31
27 leds { 32 leds {
28 compatible = "gpio-leds"; 33 compatible = "gpio-leds";
29 pmu_stat { 34 pmu_stat {
@@ -80,6 +85,61 @@
80 }; 85 };
81 86
82 }; 87 };
88
89 tfp410: encoder@0 {
90 compatible = "ti,tfp410";
91 powerdown-gpios = <&gpio6 10 GPIO_ACTIVE_LOW>; /* gpio_170 */
92
93 pinctrl-names = "default";
94 pinctrl-0 = <&tfp410_pins>;
95
96 ports {
97 #address-cells = <1>;
98 #size-cells = <0>;
99
100 port@0 {
101 reg = <0>;
102
103 tfp410_in: endpoint@0 {
104 remote-endpoint = <&dpi_out>;
105 };
106 };
107
108 port@1 {
109 reg = <1>;
110
111 tfp410_out: endpoint@0 {
112 remote-endpoint = <&dvi_connector_in>;
113 };
114 };
115 };
116 };
117
118 dvi0: connector@0 {
119 compatible = "dvi-connector";
120 label = "dvi";
121
122 digital;
123
124 ddc-i2c-bus = <&i2c3>;
125
126 port {
127 dvi_connector_in: endpoint {
128 remote-endpoint = <&tfp410_out>;
129 };
130 };
131 };
132
133 tv0: connector@1 {
134 compatible = "svideo-connector";
135 label = "tv";
136
137 port {
138 tv_connector_in: endpoint {
139 remote-endpoint = <&venc_out>;
140 };
141 };
142 };
83}; 143};
84 144
85&omap3_pmx_wkup { 145&omap3_pmx_wkup {
@@ -113,6 +173,45 @@
113 0x170 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */ 173 0x170 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
114 >; 174 >;
115 }; 175 };
176
177 tfp410_pins: pinmux_tfp410_pins {
178 pinctrl-single,pins = <
179 0x194 (PIN_OUTPUT | MUX_MODE4) /* hdq_sio.gpio_170 */
180 >;
181 };
182
183 dss_dpi_pins: pinmux_dss_dpi_pins {
184 pinctrl-single,pins = <
185 0x0a4 (PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
186 0x0a6 (PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
187 0x0a8 (PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */
188 0x0aa (PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */
189 0x0ac (PIN_OUTPUT | MUX_MODE0) /* dss_data0.dss_data0 */
190 0x0ae (PIN_OUTPUT | MUX_MODE0) /* dss_data1.dss_data1 */
191 0x0b0 (PIN_OUTPUT | MUX_MODE0) /* dss_data2.dss_data2 */
192 0x0b2 (PIN_OUTPUT | MUX_MODE0) /* dss_data3.dss_data3 */
193 0x0b4 (PIN_OUTPUT | MUX_MODE0) /* dss_data4.dss_data4 */
194 0x0b6 (PIN_OUTPUT | MUX_MODE0) /* dss_data5.dss_data5 */
195 0x0b8 (PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */
196 0x0ba (PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */
197 0x0bc (PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */
198 0x0be (PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */
199 0x0c0 (PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */
200 0x0c2 (PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */
201 0x0c4 (PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */
202 0x0c6 (PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */
203 0x0c8 (PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */
204 0x0ca (PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */
205 0x0cc (PIN_OUTPUT | MUX_MODE0) /* dss_data16.dss_data16 */
206 0x0ce (PIN_OUTPUT | MUX_MODE0) /* dss_data17.dss_data17 */
207 0x0d0 (PIN_OUTPUT | MUX_MODE0) /* dss_data18.dss_data18 */
208 0x0d2 (PIN_OUTPUT | MUX_MODE0) /* dss_data19.dss_data19 */
209 0x0d4 (PIN_OUTPUT | MUX_MODE0) /* dss_data20.dss_data20 */
210 0x0d6 (PIN_OUTPUT | MUX_MODE0) /* dss_data21.dss_data21 */
211 0x0d8 (PIN_OUTPUT | MUX_MODE0) /* dss_data22.dss_data22 */
212 0x0da (PIN_OUTPUT | MUX_MODE0) /* dss_data23.dss_data23 */
213 >;
214 };
116}; 215};
117 216
118&omap3_pmx_core2 { 217&omap3_pmx_core2 {
@@ -152,6 +251,10 @@
152#include "twl4030.dtsi" 251#include "twl4030.dtsi"
153#include "twl4030_omap3.dtsi" 252#include "twl4030_omap3.dtsi"
154 253
254&i2c3 {
255 clock-frequency = <100000>;
256};
257
155&mmc1 { 258&mmc1 {
156 vmmc-supply = <&vmmc1>; 259 vmmc-supply = <&vmmc1>;
157 vmmc_aux-supply = <&vsim>; 260 vmmc_aux-supply = <&vsim>;
@@ -211,3 +314,39 @@
211 regulator-max-microvolt = <1800000>; 314 regulator-max-microvolt = <1800000>;
212 regulator-always-on; 315 regulator-always-on;
213}; 316};
317
318&mcbsp2 {
319 status = "okay";
320};
321
322/* Needed to power the DPI pins */
323&vpll2 {
324 regulator-always-on;
325};
326
327&dss {
328 status = "ok";
329
330 pinctrl-names = "default";
331 pinctrl-0 = <&dss_dpi_pins>;
332
333 port {
334 dpi_out: endpoint {
335 remote-endpoint = <&tfp410_in>;
336 data-lines = <24>;
337 };
338 };
339};
340
341&venc {
342 status = "ok";
343
344 vdda-supply = <&vdac>;
345
346 port {
347 venc_out: endpoint {
348 remote-endpoint = <&tv_connector_in>;
349 ti,channels = <2>;
350 };
351 };
352};
diff --git a/arch/arm/boot/dts/omap3-cm-t3517.dts b/arch/arm/boot/dts/omap3-cm-t3517.dts
new file mode 100644
index 000000000000..d00502f4fd9b
--- /dev/null
+++ b/arch/arm/boot/dts/omap3-cm-t3517.dts
@@ -0,0 +1,136 @@
1/*
2 * Support for CompuLab CM-T3517
3 */
4/dts-v1/;
5
6#include "am3517.dtsi"
7#include "omap3-cm-t3x.dtsi"
8
9/ {
10 model = "CompuLab CM-T3517";
11 compatible = "compulab,omap3-cm-t3517", "ti,am3517", "ti,omap3";
12
13 vmmc: regulator-vmmc {
14 compatible = "regulator-fixed";
15 regulator-name = "vmmc";
16 regulator-min-microvolt = <3300000>;
17 regulator-max-microvolt = <3300000>;
18 };
19
20 wl12xx_vmmc2: wl12xx_vmmc2 {
21 compatible = "regulator-fixed";
22 regulator-name = "vw1271";
23 pinctrl-names = "default";
24 pinctrl-0 = <
25 &wl12xx_wkup_pins
26 &wl12xx_core_pins
27 >;
28 regulator-min-microvolt = <1800000>;
29 regulator-max-microvolt = <1800000>;
30 gpio = <&gpio1 6 GPIO_ACTIVE_HIGH >; /* gpio6 */
31 startup-delay-us = <20000>;
32 enable-active-high;
33 };
34
35 wl12xx_vaux2: wl12xx_vaux2 {
36 compatible = "regulator-fixed";
37 regulator-name = "vwl1271_vaux2";
38 regulator-min-microvolt = <1800000>;
39 regulator-max-microvolt = <1800000>;
40 };
41};
42
43&omap3_pmx_wkup {
44
45 wl12xx_wkup_pins: pinmux_wl12xx_wkup_pins {
46 pinctrl-single,pins = <
47 OMAP3_WKUP_IOPAD(0x2a0e, PIN_OUTPUT | MUX_MODE4) /* sys_boot2.gpio_4 */
48 OMAP3_WKUP_IOPAD(0x2a12, PIN_OUTPUT | MUX_MODE4) /* sys_boot4.gpio_6 */
49 >;
50 };
51};
52
53&omap3_pmx_core {
54
55 phy1_reset_pins: pinmux_hsusb1_phy_reset_pins {
56 pinctrl-single,pins = <
57 OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE4) /* uart2_tx.gpio_146 */
58 >;
59 };
60
61 phy2_reset_pins: pinmux_hsusb2_phy_reset_pins {
62 pinctrl-single,pins = <
63 OMAP3_CORE1_IOPAD(0x217a, PIN_OUTPUT | MUX_MODE4) /* uart2_rx.gpio_147 */
64 >;
65 };
66
67 otg_drv_vbus: pinmux_otg_drv_vbus {
68 pinctrl-single,pins = <
69 OMAP3_CORE1_IOPAD(0x2210, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii_50Mhz_clk.usb0_drvvbus */
70 >;
71 };
72
73 mmc2_pins: pinmux_mmc2_pins {
74 pinctrl-single,pins = <
75 OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
76 OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
77 OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
78 OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
79 OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
80 OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
81 >;
82 };
83
84 wl12xx_core_pins: pinmux_wl12xx_core_pins {
85 pinctrl-single,pins = <
86 OMAP3_CORE1_IOPAD(0x20b8, PIN_OUTPUT | MUX_MODE4) /* gpmc_ncs5.gpio_56 */
87 OMAP3_CORE1_IOPAD(0x2176, PIN_INPUT_PULLUP | MUX_MODE4) /* uart2_rts.gpio_145 */
88 >;
89 };
90
91 usb_hub_pins: pinmux_usb_hub_pins {
92 pinctrl-single,pins = <
93 OMAP3_CORE1_IOPAD(0x2184, PIN_OUTPUT | MUX_MODE4) /* mcbsp4_clkx.gpio_152 - USB HUB RST */
94 >;
95 };
96};
97
98&hsusb1_phy {
99 pinctrl-names = "default";
100 pinctrl-0 = <&phy1_reset_pins>;
101 reset-gpios = <&gpio5 18 GPIO_ACTIVE_LOW>;
102};
103
104&hsusb2_phy {
105 pinctrl-names = "default";
106 pinctrl-0 = <&phy2_reset_pins>;
107 reset-gpios = <&gpio5 19 GPIO_ACTIVE_LOW>;
108};
109
110&davinci_emac {
111 status = "okay";
112};
113
114&davinci_mdio {
115 status = "okay";
116};
117
118&am35x_otg_hs {
119 status = "okay";
120 pinctrl-names = "default";
121 pinctrl-0 = <&otg_drv_vbus>;
122};
123
124&mmc1 {
125 vmmc-supply = <&vmmc>;
126};
127
128&mmc2 {
129 pinctrl-names = "default";
130 pinctrl-0 = <&mmc2_pins>;
131 vmmc-supply = <&wl12xx_vmmc2>;
132 vmmc_aux-supply = <&wl12xx_vaux2>;
133 non-removable;
134 bus-width = <4>;
135 cap-power-off-card;
136};
diff --git a/arch/arm/boot/dts/omap3-cm-t3530.dts b/arch/arm/boot/dts/omap3-cm-t3530.dts
new file mode 100644
index 000000000000..d1458496520e
--- /dev/null
+++ b/arch/arm/boot/dts/omap3-cm-t3530.dts
@@ -0,0 +1,48 @@
1/*
2 * Support for CompuLab CM-T3530
3 */
4/dts-v1/;
5
6#include "omap34xx.dtsi"
7#include "omap3-cm-t3x30.dtsi"
8
9/ {
10 model = "CompuLab CM-T3530";
11 compatible = "compulab,omap3-cm-t3530", "ti,omap34xx", "ti,omap3";
12
13 /* Regulator to trigger the reset signal of the Wifi module */
14 mmc2_sdio_reset: regulator-mmc2-sdio-reset {
15 compatible = "regulator-fixed";
16 regulator-name = "regulator-mmc2-sdio-reset";
17 regulator-min-microvolt = <3300000>;
18 regulator-max-microvolt = <3300000>;
19 gpio = <&twl_gpio 2 GPIO_ACTIVE_HIGH>;
20 enable-active-high;
21 };
22};
23
24&omap3_pmx_core {
25 mmc2_pins: pinmux_mmc2_pins {
26 pinctrl-single,pins = <
27 OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
28 OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
29 OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
30 OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
31 OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
32 OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
33 OMAP3_CORE1_IOPAD(0x2164, PIN_OUTPUT | MUX_MODE1) /* sdmmc2_dat4.sdmmc2_dir_dat0 */
34 OMAP3_CORE1_IOPAD(0x2166, PIN_OUTPUT | MUX_MODE1) /* sdmmc2_dat5.sdmmc2_dir_dat1 */
35 OMAP3_CORE1_IOPAD(0x2168, PIN_OUTPUT | MUX_MODE1) /* sdmmc2_dat6.sdmmc2_dir_cmd */
36 OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT | MUX_MODE1) /* sdmmc2_dat7.sdmmc2_clkin */
37 >;
38 };
39};
40
41&mmc2 {
42 pinctrl-names = "default";
43 pinctrl-0 = <&mmc2_pins>;
44 vmmc-supply = <&mmc2_sdio_reset>;
45 non-removable;
46 bus-width = <4>;
47 cap-power-off-card;
48};
diff --git a/arch/arm/boot/dts/omap3-cm-t3730.dts b/arch/arm/boot/dts/omap3-cm-t3730.dts
index 486f4d6c4219..b3f9a50b3bc8 100644
--- a/arch/arm/boot/dts/omap3-cm-t3730.dts
+++ b/arch/arm/boot/dts/omap3-cm-t3730.dts
@@ -32,57 +32,26 @@
32}; 32};
33 33
34&omap3_pmx_core { 34&omap3_pmx_core {
35 mmc1_pins: pinmux_mmc1_pins {
36 pinctrl-single,pins = <
37 0x114 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
38 0x116 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
39 0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
40 0x11a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
41 0x11c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
42 0x11e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
43 >;
44 };
45 35
46 mmc2_pins: pinmux_mmc2_pins { 36 mmc2_pins: pinmux_mmc2_pins {
47 pinctrl-single,pins = < 37 pinctrl-single,pins = <
48 0x128 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */ 38 OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
49 0x12a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */ 39 OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
50 0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */ 40 OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
51 0x12e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */ 41 OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
52 0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */ 42 OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
53 0x132 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */ 43 OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
54 >;
55 };
56
57 smsc1_pins: pinmux_smsc1_pins {
58 pinctrl-single,pins = <
59 0x88 (PIN_OUTPUT | MUX_MODE0) /* gpmc_ncs5.gpmc_ncs5 */
60 0x16a (PIN_INPUT_PULLUP | MUX_MODE4) /* uart3_cts_rctx.gpio_163 */
61 >;
62 };
63
64 uart3_pins: pinmux_uart3_pins {
65 pinctrl-single,pins = <
66 0x16e (PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
67 0x170 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
68 >; 44 >;
69 }; 45 };
70 46
71 wl12xx_gpio: pinmux_wl12xx_gpio { 47 wl12xx_gpio: pinmux_wl12xx_gpio {
72 pinctrl-single,pins = < 48 pinctrl-single,pins = <
73 0xb2 (PIN_OUTPUT | MUX_MODE4) /* dss_data3.gpio_73 */ 49 OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE4) /* dss_data3.gpio_73 */
74 0x134 (PIN_INPUT | MUX_MODE4) /* sdmmc2_dat4.gpio_136 */ 50 OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT | MUX_MODE4) /* sdmmc2_dat4.gpio_136 */
75 >; 51 >;
76 }; 52 };
77}; 53};
78 54
79&mmc1 {
80 vmmc-supply = <&vmmc1>;
81 bus-width = <4>;
82 pinctrl-names = "default";
83 pinctrl-0 = <&mmc1_pins>;
84};
85
86&mmc2 { 55&mmc2 {
87 pinctrl-names = "default"; 56 pinctrl-names = "default";
88 pinctrl-0 = <&mmc2_pins>; 57 pinctrl-0 = <&mmc2_pins>;
@@ -92,13 +61,3 @@
92 bus-width = <4>; 61 bus-width = <4>;
93 cap-power-off-card; 62 cap-power-off-card;
94}; 63};
95
96&smsc1 {
97 pinctrl-names = "default";
98 pinctrl-0 = <&smsc1_pins>;
99};
100
101&uart3 {
102 pinctrl-names = "default";
103 pinctrl-0 = <&uart3_pins>;
104};
diff --git a/arch/arm/boot/dts/omap3-cm-t3x.dtsi b/arch/arm/boot/dts/omap3-cm-t3x.dtsi
new file mode 100644
index 000000000000..c671a2299ea8
--- /dev/null
+++ b/arch/arm/boot/dts/omap3-cm-t3x.dtsi
@@ -0,0 +1,110 @@
1/*
2 * Common support for CompuLab CM-T3x CoMs
3 */
4
5/ {
6
7 memory {
8 device_type = "memory";
9 reg = <0x80000000 0x10000000>; /* 256 MB */
10 };
11
12 leds {
13 compatible = "gpio-leds";
14 pinctrl-names = "default";
15 pinctrl-0 = <&green_led_pins>;
16 ledb {
17 label = "cm-t3x:green";
18 gpios = <&gpio6 26 GPIO_ACTIVE_HIGH>; /* gpio186 */
19 linux,default-trigger = "heartbeat";
20 };
21 };
22
23 /* HS USB Port 1 Power */
24 hsusb1_power: hsusb1_power_reg {
25 compatible = "regulator-fixed";
26 regulator-name = "hsusb1_vbus";
27 regulator-min-microvolt = <3300000>;
28 regulator-max-microvolt = <3300000>;
29 startup-delay-us = <70000>;
30 };
31
32 /* HS USB Port 2 Power */
33 hsusb2_power: hsusb2_power_reg {
34 compatible = "regulator-fixed";
35 regulator-name = "hsusb2_vbus";
36 regulator-min-microvolt = <3300000>;
37 regulator-max-microvolt = <3300000>;
38 startup-delay-us = <70000>;
39 };
40
41 /* HS USB Host PHY on PORT 1 */
42 hsusb1_phy: hsusb1_phy {
43 compatible = "usb-nop-xceiv";
44 vcc-supply = <&hsusb1_power>;
45 };
46
47 /* HS USB Host PHY on PORT 2 */
48 hsusb2_phy: hsusb2_phy {
49 compatible = "usb-nop-xceiv";
50 vcc-supply = <&hsusb2_power>;
51 };
52};
53
54&omap3_pmx_core {
55
56 uart3_pins: pinmux_uart3_pins {
57 pinctrl-single,pins = <
58 OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
59 OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
60 >;
61 };
62
63 mmc1_pins: pinmux_mmc1_pins {
64 pinctrl-single,pins = <
65 OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
66 OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
67 OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
68 OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
69 OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
70 OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
71 >;
72 };
73
74 green_led_pins: pinmux_green_led_pins {
75 pinctrl-single,pins = <
76 OMAP3_CORE1_IOPAD(0x21e2, PIN_OUTPUT | MUX_MODE4) /* sys_clkout2.gpio_186 */
77 >;
78 };
79};
80
81&uart3 {
82 pinctrl-names = "default";
83 pinctrl-0 = <&uart3_pins>;
84};
85
86&mmc1 {
87 pinctrl-names = "default";
88 pinctrl-0 = <&mmc1_pins>;
89 bus-width = <4>;
90};
91
92&mmc3 {
93 status = "disabled";
94};
95
96&i2c1 {
97 clock-frequency = <400000>;
98};
99
100&i2c3 {
101 clock-frequency = <400000>;
102};
103&usbhshost {
104 port1-mode = "ehci-phy";
105 port2-mode = "ehci-phy";
106};
107
108&usbhsehci {
109 phys = <&hsusb1_phy &hsusb2_phy>;
110};
diff --git a/arch/arm/boot/dts/omap3-cm-t3x30.dtsi b/arch/arm/boot/dts/omap3-cm-t3x30.dtsi
index 3a9f004d8924..d00055809e31 100644
--- a/arch/arm/boot/dts/omap3-cm-t3x30.dtsi
+++ b/arch/arm/boot/dts/omap3-cm-t3x30.dtsi
@@ -1,28 +1,16 @@
1/* 1/*
2 * Common support for CompuLab CM-T3530 and CM-T3730 2 * Common support for CompuLab CM-T3x30 CoMs
3 */ 3 */
4 4
5/ { 5#include "omap3-cm-t3x.dtsi"
6 memory {
7 device_type = "memory";
8 reg = <0x80000000 0x10000000>; /* 256 MB */
9 };
10 6
7/ {
11 cpus { 8 cpus {
12 cpu@0 { 9 cpu@0 {
13 cpu0-supply = <&vcc>; 10 cpu0-supply = <&vcc>;
14 }; 11 };
15 }; 12 };
16 13
17 leds {
18 compatible = "gpio-leds";
19 ledb {
20 label = "cm-t35:green";
21 gpios = <&gpio6 26 GPIO_ACTIVE_HIGH>; /* gpio186 */
22 linux,default-trigger = "heartbeat";
23 };
24 };
25
26 vddvario: regulator-vddvario { 14 vddvario: regulator-vddvario {
27 compatible = "regulator-fixed"; 15 compatible = "regulator-fixed";
28 regulator-name = "vddvario"; 16 regulator-name = "vddvario";
@@ -36,11 +24,40 @@
36 }; 24 };
37}; 25};
38 26
27&omap3_pmx_core {
28
29 smsc1_pins: pinmux_smsc1_pins {
30 pinctrl-single,pins = <
31 OMAP3_CORE1_IOPAD(0x20b8, PIN_OUTPUT | MUX_MODE0) /* gpmc_ncs5.gpmc_ncs5 */
32 OMAP3_CORE1_IOPAD(0x219a, PIN_INPUT_PULLUP | MUX_MODE4) /* uart3_cts_rctx.gpio_163 */
33 >;
34 };
35
36 hsusb0_pins: pinmux_hsusb0_pins {
37 pinctrl-single,pins = <
38 OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* hsusb0_clk.hsusb0_clk */
39 OMAP3_CORE1_IOPAD(0x21a2, PIN_OUTPUT | MUX_MODE0) /* hsusb0_stp.hsusb0_stp */
40 OMAP3_CORE1_IOPAD(0x21a4, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_dir.hsusb0_dir */
41 OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_nxt.hsusb0_nxt */
42 OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data0.hsusb2_data0 */
43 OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data1.hsusb0_data1 */
44 OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data2.hsusb0_data2 */
45 OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data3 */
46 OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data4 */
47 OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data5 */
48 OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data6 */
49 OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data7 */
50 >;
51 };
52};
53
39&gpmc { 54&gpmc {
40 ranges = <5 0 0x2c000000 0x01000000>; 55 ranges = <5 0 0x2c000000 0x01000000>;
41 56
42 smsc1: ethernet@5,0 { 57 smsc1: ethernet@5,0 {
43 compatible = "smsc,lan9221", "smsc,lan9115"; 58 compatible = "smsc,lan9221", "smsc,lan9115";
59 pinctrl-names = "default";
60 pinctrl-0 = <&smsc1_pins>;
44 interrupt-parent = <&gpio6>; 61 interrupt-parent = <&gpio6>;
45 interrupts = <3 IRQ_TYPE_LEVEL_LOW>; 62 interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
46 reg = <5 0 0xff>; 63 reg = <5 0 0xff>;
@@ -74,8 +91,6 @@
74}; 91};
75 92
76&i2c1 { 93&i2c1 {
77 clock-frequency = <400000>;
78
79 twl: twl@48 { 94 twl: twl@48 {
80 reg = <0x48>; 95 reg = <0x48>;
81 interrupts = <7>; /* SYS_NIRQ cascaded to intc */ 96 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
@@ -86,10 +101,31 @@
86#include "twl4030.dtsi" 101#include "twl4030.dtsi"
87#include "twl4030_omap3.dtsi" 102#include "twl4030_omap3.dtsi"
88 103
89&i2c3 { 104&mmc1 {
90 clock-frequency = <400000>; 105 vmmc-supply = <&vmmc1>;
91}; 106};
92 107
93&twl_gpio { 108&twl_gpio {
94 ti,use-leds; 109 ti,use-leds;
110 /* pullups: BIT(0) */
111 ti,pullups = <0x000001>;
112};
113
114&hsusb1_phy {
115 reset-gpios = <&twl_gpio 6 GPIO_ACTIVE_LOW>;
116};
117
118&hsusb2_phy {
119 reset-gpios = <&twl_gpio 7 GPIO_ACTIVE_LOW>;
120};
121
122&usb_otg_hs {
123 pinctrl-names = "default";
124 pinctrl-0 = <&hsusb0_pins>;
125 interface-type = <0>;
126 usb-phy = <&usb2_phy>;
127 phys = <&usb2_phy>;
128 phy-names = "usb2-phy";
129 mode = <3>;
130 power = <50>;
95}; 131};
diff --git a/arch/arm/boot/dts/omap3-devkit8000.dts b/arch/arm/boot/dts/omap3-devkit8000.dts
index 4665421bb7bc..bf5a515a3247 100644
--- a/arch/arm/boot/dts/omap3-devkit8000.dts
+++ b/arch/arm/boot/dts/omap3-devkit8000.dts
@@ -101,20 +101,8 @@
101 status = "disabled"; 101 status = "disabled";
102}; 102};
103 103
104&mcbsp1 { 104&mcbsp2 {
105 status = "disabled"; 105 status = "okay";
106};
107
108&mcbsp3 {
109 status = "disabled";
110};
111
112&mcbsp4 {
113 status = "disabled";
114};
115
116&mcbsp5 {
117 status = "disabled";
118}; 106};
119 107
120&gpmc { 108&gpmc {
diff --git a/arch/arm/boot/dts/omap3-gta04.dts b/arch/arm/boot/dts/omap3-gta04.dts
index c551e4af4d83..7d760aa4ed15 100644
--- a/arch/arm/boot/dts/omap3-gta04.dts
+++ b/arch/arm/boot/dts/omap3-gta04.dts
@@ -36,6 +36,14 @@
36 gpio-key,wakeup; 36 gpio-key,wakeup;
37 }; 37 };
38 }; 38 };
39
40 sound {
41 compatible = "ti,omap-twl4030";
42 ti,model = "gta04";
43
44 ti,mcbsp = <&mcbsp2>;
45 ti,codec = <&twl_audio>;
46 };
39}; 47};
40 48
41&omap3_pmx_core { 49&omap3_pmx_core {
@@ -80,6 +88,12 @@
80 interrupts = <7>; /* SYS_NIRQ cascaded to intc */ 88 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
81 interrupt-parent = <&intc>; 89 interrupt-parent = <&intc>;
82 }; 90 };
91
92 twl_audio: audio {
93 compatible = "ti,twl4030-audio";
94 codec {
95 };
96 };
83}; 97};
84 98
85#include "twl4030.dtsi" 99#include "twl4030.dtsi"
@@ -96,6 +110,14 @@
96 interrupts = <17 IRQ_TYPE_EDGE_RISING>; 110 interrupts = <17 IRQ_TYPE_EDGE_RISING>;
97 }; 111 };
98 112
113 /* accelerometer */
114 bma180@41 {
115 compatible = "bosch,bma180";
116 reg = <0x41>;
117 interrupt-parent = <&gpio3>;
118 interrupts = <19 IRQ_TYPE_LEVEL_HIGH>;
119 };
120
99 /* leds */ 121 /* leds */
100 tca6507@45 { 122 tca6507@45 {
101 compatible = "ti,tca6507"; 123 compatible = "ti,tca6507";
@@ -124,6 +146,22 @@
124 reg = <0x4>; 146 reg = <0x4>;
125 }; 147 };
126 }; 148 };
149
150 /* compass aka magnetometer */
151 hmc5843@1e {
152 compatible = "honeywell,hmc5843";
153 reg = <0x1e>;
154 };
155
156 /* touchscreen */
157 tsc2007@48 {
158 compatible = "ti,tsc2007";
159 reg = <0x48>;
160 interrupt-parent = <&gpio6>;
161 interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
162 gpios = <&gpio6 0 GPIO_ACTIVE_LOW>;
163 ti,x-plate-ohms = <600>;
164 };
127}; 165};
128 166
129&i2c3 { 167&i2c3 {
@@ -148,7 +186,9 @@
148}; 186};
149 187
150&mmc2 { 188&mmc2 {
151 status = "disabled"; 189 vmmc-supply = <&vaux4>;
190 bus-width = <4>;
191 ti,non-removable;
152}; 192};
153 193
154&mmc3 { 194&mmc3 {
@@ -170,3 +210,12 @@
170 pinctrl-0 = <&uart3_pins>; 210 pinctrl-0 = <&uart3_pins>;
171}; 211};
172 212
213&charger {
214 bb_uvolt = <3200000>;
215 bb_uamp = <150>;
216};
217
218&vaux4 {
219 regulator-min-microvolt = <2800000>;
220 regulator-max-microvolt = <3150000>;
221};
diff --git a/arch/arm/boot/dts/omap3-igep.dtsi b/arch/arm/boot/dts/omap3-igep.dtsi
index c17009323520..b97736d98a64 100644
--- a/arch/arm/boot/dts/omap3-igep.dtsi
+++ b/arch/arm/boot/dts/omap3-igep.dtsi
@@ -170,6 +170,7 @@
170&mcbsp2 { 170&mcbsp2 {
171 pinctrl-names = "default"; 171 pinctrl-names = "default";
172 pinctrl-0 = <&mcbsp2_pins>; 172 pinctrl-0 = <&mcbsp2_pins>;
173 status = "okay";
173}; 174};
174 175
175&mmc1 { 176&mmc1 {
diff --git a/arch/arm/boot/dts/omap3-igep0020.dts b/arch/arm/boot/dts/omap3-igep0020.dts
index 25a2b5f652fd..8aa4ded8ce03 100644
--- a/arch/arm/boot/dts/omap3-igep0020.dts
+++ b/arch/arm/boot/dts/omap3-igep0020.dts
@@ -61,22 +61,63 @@
61 reset-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>; /* gpio_24 */ 61 reset-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>; /* gpio_24 */
62 vcc-supply = <&hsusb1_power>; 62 vcc-supply = <&hsusb1_power>;
63 }; 63 };
64
65 tfp410: encoder@0 {
66 compatible = "ti,tfp410";
67 powerdown-gpios = <&gpio6 10 GPIO_ACTIVE_LOW>; /* gpio_170 */
68
69 ports {
70 #address-cells = <1>;
71 #size-cells = <0>;
72
73 port@0 {
74 reg = <0>;
75
76 tfp410_in: endpoint@0 {
77 remote-endpoint = <&dpi_out>;
78 };
79 };
80
81 port@1 {
82 reg = <1>;
83
84 tfp410_out: endpoint@0 {
85 remote-endpoint = <&dvi_connector_in>;
86 };
87 };
88 };
89 };
90
91 dvi0: connector@0 {
92 compatible = "dvi-connector";
93 label = "dvi";
94
95 digital;
96
97 ddc-i2c-bus = <&i2c3>;
98
99 port {
100 dvi_connector_in: endpoint {
101 remote-endpoint = <&tfp410_out>;
102 };
103 };
104 };
64}; 105};
65 106
66&omap3_pmx_core { 107&omap3_pmx_core {
67 pinctrl-names = "default"; 108 pinctrl-names = "default";
68 pinctrl-0 = < 109 pinctrl-0 = <
69 &tfp410_pins 110 &tfp410_pins
70 &dss_pins 111 &dss_dpi_pins
71 >; 112 >;
72 113
73 tfp410_pins: tfp410_dvi_pins { 114 tfp410_pins: pinmux_tfp410_pins {
74 pinctrl-single,pins = < 115 pinctrl-single,pins = <
75 0x196 (PIN_OUTPUT | MUX_MODE4) /* hdq_sio.gpio_170 */ 116 0x196 (PIN_OUTPUT | MUX_MODE4) /* hdq_sio.gpio_170 */
76 >; 117 >;
77 }; 118 };
78 119
79 dss_pins: pinmux_dss_dvi_pins { 120 dss_dpi_pins: pinmux_dss_dpi_pins {
80 pinctrl-single,pins = < 121 pinctrl-single,pins = <
81 0x0a4 (PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */ 122 0x0a4 (PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
82 0x0a6 (PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */ 123 0x0a6 (PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
@@ -226,3 +267,14 @@
226 /* Needed for DSS */ 267 /* Needed for DSS */
227 regulator-name = "vdds_dsi"; 268 regulator-name = "vdds_dsi";
228}; 269};
270
271&dss {
272 status = "ok";
273
274 port {
275 dpi_out: endpoint {
276 remote-endpoint = <&tfp410_in>;
277 data-lines = <24>;
278 };
279 };
280};
diff --git a/arch/arm/boot/dts/omap3-lilly-a83x.dtsi b/arch/arm/boot/dts/omap3-lilly-a83x.dtsi
new file mode 100644
index 000000000000..6369d9f43ca2
--- /dev/null
+++ b/arch/arm/boot/dts/omap3-lilly-a83x.dtsi
@@ -0,0 +1,459 @@
1/*
2 * Copyright (C) 2014 Christoph Fritz <chf.fritzc@googlemail.com>
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 */
9
10#include "omap36xx.dtsi"
11
12/ {
13 model = "INCOstartec LILLY-A83X module (DM3730)";
14 compatible = "incostartec,omap3-lilly-a83x", "ti,omap36xx", "ti,omap3";
15
16 chosen {
17 bootargs = "console=ttyO0,115200n8 vt.global_cursor_default=0 consoleblank=0";
18 };
19
20 memory {
21 device_type = "memory";
22 reg = <0x80000000 0x8000000>; /* 128 MB */
23 };
24
25 leds {
26 compatible = "gpio-leds";
27
28 led1 {
29 label = "lilly-a83x::led1";
30 gpios = <&gpio1 29 GPIO_ACTIVE_LOW>;
31 linux,default-trigger = "default-on";
32 };
33
34 };
35
36 sound {
37 compatible = "ti,omap-twl4030";
38 ti,model = "lilly-a83x";
39
40 ti,mcbsp = <&mcbsp2>;
41 ti,codec = <&twl_audio>;
42 };
43
44 reg_vcc3: vcc3 {
45 compatible = "regulator-fixed";
46 regulator-name = "VCC3";
47 regulator-min-microvolt = <3300000>;
48 regulator-max-microvolt = <3300000>;
49 regulator-always-on;
50 };
51
52 hsusb1_phy: hsusb1_phy {
53 compatible = "usb-nop-xceiv";
54 vcc-supply = <&reg_vcc3>;
55 };
56};
57
58&omap3_pmx_wkup {
59 pinctrl-names = "default";
60
61 lan9221_pins: pinmux_lan9221_pins {
62 pinctrl-single,pins = <
63 OMAP3_WKUP_IOPAD(0x2a5a, PIN_INPUT | MUX_MODE4) /* reserved.gpio_129 */
64 >;
65 };
66
67 tsc2048_pins: pinmux_tsc2048_pins {
68 pinctrl-single,pins = <
69 OMAP3_WKUP_IOPAD(0x2a16, PIN_INPUT_PULLUP | MUX_MODE4) /* sys_boot6.gpio_8 */
70 >;
71 };
72
73 mmc1cd_pins: pinmux_mmc1cd_pins {
74 pinctrl-single,pins = <
75 OMAP3_WKUP_IOPAD(0x2a56, PIN_INPUT | MUX_MODE4) /* reserved.gpio_126 */
76 >;
77 };
78};
79
80&omap3_pmx_core {
81 pinctrl-names = "default";
82
83 uart1_pins: pinmux_uart1_pins {
84 pinctrl-single,pins = <
85 OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE0) /* uart1_tx.uart1_tx */
86 OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE0) /* uart1_rts.uart1_rts */
87 OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT | MUX_MODE0) /* uart1_cts.uart1_cts */
88 OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE0) /* uart1_rx.uart1_rx */
89 >;
90 };
91
92 uart2_pins: pinmux_uart2_pins {
93 pinctrl-single,pins = <
94 OMAP3_CORE1_IOPAD(0x2170, PIN_OUTPUT | MUX_MODE1) /* mcbsp3_clkx.uart2_tx */
95 OMAP3_CORE1_IOPAD(0x2172, PIN_INPUT | MUX_MODE1) /* mcbsp3_fsx.uart2_rx */
96 >;
97 };
98
99 uart3_pins: pinmux_uart3_pins {
100 pinctrl-single,pins = <
101 OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
102 OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
103 >;
104 };
105
106 i2c1_pins: pinmux_i2c1_pins {
107 pinctrl-single,pins = <
108 OMAP3_CORE1_IOPAD(0x21ba ,PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl.i2c1_scl */
109 OMAP3_CORE1_IOPAD(0x21bc ,PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda.i2c1_sda */
110 >;
111 };
112
113 i2c2_pins: pinmux_i2c2_pins {
114 pinctrl-single,pins = <
115 OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT | MUX_MODE0) /* i2c2_scl.i2c2_scl */
116 OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT | MUX_MODE0) /* i2c2_sda.i2c2_sda */
117 >;
118 };
119
120 i2c3_pins: pinmux_i2c3_pins {
121 pinctrl-single,pins = <
122 OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0) /* i2c3_scl.i2c3_scl */
123 OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0) /* i2c3_sda.i2c3_sda */
124 >;
125 };
126
127 hsusb1_pins: pinmux_hsusb1_pins {
128 pinctrl-single,pins = <
129
130 /* GPIO 182 controls USB-Hub reset. But USB-Phy its
131 * reset can't be controlled. So we clamp this GPIO to
132 * high (PIN_OFF_OUTPUT_HIGH) to always enable USB-Hub.
133 */
134
135 OMAP3_CORE1_IOPAD(0x21de, PIN_OUTPUT_PULLUP | PIN_OFF_OUTPUT_HIGH | MUX_MODE4) /* mcspi2_cs1.gpio_182 */
136 >;
137 };
138
139 hsusb_otg_pins: pinmux_hsusb_otg_pins {
140 pinctrl-single,pins = <
141 OMAP3_CORE1_IOPAD(0x21a2, PIN_INPUT | MUX_MODE0) /* hsusb0_clk.hsusb0_clk */
142 OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT | MUX_MODE0) /* hsusb0_stp.hsusb0_stp */
143 OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT | MUX_MODE0) /* hsusb0_dir.hsusb0_dir */
144 OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT | MUX_MODE0) /* hsusb0_nxt.hsusb0_nxt */
145 OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT | MUX_MODE0) /* hsusb0_data0.hsusb0_data0 */
146 OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT | MUX_MODE0) /* hsusb0_data1.hsusb0_data1 */
147 OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT | MUX_MODE0) /* hsusb0_data2.hsusb0_data2 */
148 OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT | MUX_MODE0) /* hsusb0_data3.hsusb0_data3 */
149 OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT | MUX_MODE0) /* hsusb0_data4.hsusb0_data4 */
150 OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT | MUX_MODE0) /* hsusb0_data5.hsusb0_data5 */
151 OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT | MUX_MODE0) /* hsusb0_data6.hsusb0_data6 */
152 OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT | MUX_MODE0) /* hsusb0_data7.hsusb0_data7 */
153 >;
154 };
155
156 mmc1_pins: pinmux_mmc1_pins {
157 pinctrl-single,pins = <
158 OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
159 OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
160 OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
161 OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
162 OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
163 OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
164 >;
165 };
166
167 spi2_pins: pinmux_spi2_pins {
168 pinctrl-single,pins = <
169 OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcspi2_clk.mcspi2_clk */
170 OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcspi2_simo.mcspi2_simo */
171 OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcspi2_somi.mcspi2_somi */
172 OMAP3_CORE1_IOPAD(0x21dc, PIN_OUTPUT | MUX_MODE0) /* mcspi2_cs0.mcspi2_cs0 */
173 >;
174 };
175};
176
177&omap3_pmx_core2 {
178 pinctrl-names = "default";
179 pinctrl-0 = <
180 &hsusb1_2_pins
181 >;
182
183 hsusb1_2_pins: pinmux_hsusb1_2_pins {
184 pinctrl-single,pins = <
185 OMAP3630_CORE2_IOPAD(0x25d8, PIN_OUTPUT | MUX_MODE3) /* etk_clk.hsusb1_stp */
186 OMAP3630_CORE2_IOPAD(0x25da, PIN_INPUT | MUX_MODE3) /* etk_ctl.hsusb1_clk */
187 OMAP3630_CORE2_IOPAD(0x25dc, PIN_INPUT | MUX_MODE3) /* etk_d0.hsusb1_data0 */
188 OMAP3630_CORE2_IOPAD(0x25de, PIN_INPUT | MUX_MODE3) /* etk_d1.hsusb1_data1 */
189 OMAP3630_CORE2_IOPAD(0x25e0, PIN_INPUT | MUX_MODE3) /* etk_d2.hsusb1_data2 */
190 OMAP3630_CORE2_IOPAD(0x25e2, PIN_INPUT | MUX_MODE3) /* etk_d3.hsusb1_data7 */
191 OMAP3630_CORE2_IOPAD(0x25e4, PIN_INPUT | MUX_MODE3) /* etk_d4.hsusb1_data4 */
192 OMAP3630_CORE2_IOPAD(0x25e6, PIN_INPUT | MUX_MODE3) /* etk_d5.hsusb1_data5 */
193 OMAP3630_CORE2_IOPAD(0x25e8, PIN_INPUT | MUX_MODE3) /* etk_d6.hsusb1_data6 */
194 OMAP3630_CORE2_IOPAD(0x25ea, PIN_INPUT | MUX_MODE3) /* etk_d7.hsusb1_data3 */
195 OMAP3630_CORE2_IOPAD(0x25ec, PIN_INPUT | MUX_MODE3) /* etk_d8.hsusb1_dir */
196 OMAP3630_CORE2_IOPAD(0x25ee, PIN_INPUT | MUX_MODE3) /* etk_d9.hsusb1_nxt */
197 >;
198 };
199
200 gpio1_pins: pinmux_gpio1_pins {
201 pinctrl-single,pins = <
202 OMAP3630_CORE2_IOPAD(0x25fa, PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* etk_d15.gpio_29 */
203 >;
204 };
205
206};
207
208&gpio1 {
209 pinctrl-names = "default";
210 pinctrl-0 = <&gpio1_pins>;
211};
212
213&gpio6 {
214 pinctrl-names = "default";
215 pinctrl-0 = <&hsusb1_pins>;
216};
217
218&i2c1 {
219 clock-frequency = <2600000>;
220 pinctrl-names = "default";
221 pinctrl-0 = <&i2c1_pins>;
222
223 twl: twl@48 {
224 reg = <0x48>;
225 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
226 interrupt-parent = <&intc>;
227
228 twl_audio: audio {
229 compatible = "ti,twl4030-audio";
230 codec {
231 };
232 };
233 };
234};
235
236#include "twl4030.dtsi"
237#include "twl4030_omap3.dtsi"
238
239&twl {
240 vmmc1: regulator-vmmc1 {
241 regulator-always-on;
242 };
243
244 vdd1: regulator-vdd1 {
245 regulator-always-on;
246 };
247
248 vdd2: regulator-vdd2 {
249 regulator-always-on;
250 };
251};
252
253&i2c2 {
254 clock-frequency = <2600000>;
255 pinctrl-names = "default";
256 pinctrl-0 = <&i2c2_pins>;
257};
258
259&i2c3 {
260 clock-frequency = <2600000>;
261 pinctrl-names = "default";
262 pinctrl-0 = <&i2c3_pins>;
263 gpiom1: gpio@20 {
264 compatible = "mcp,mcp23017";
265 gpio-controller;
266 #gpio-cells = <2>;
267 reg = <0x20>;
268 };
269};
270
271&uart1 {
272 pinctrl-names = "default";
273 pinctrl-0 = <&uart1_pins>;
274};
275
276&uart2 {
277 pinctrl-names = "default";
278 pinctrl-0 = <&uart2_pins>;
279};
280
281&uart3 {
282 pinctrl-names = "default";
283 pinctrl-0 = <&uart3_pins>;
284};
285
286&uart4 {
287 status = "disabled";
288};
289
290&mmc1 {
291 cd-gpios = <&gpio4 30 IRQ_TYPE_LEVEL_LOW>;
292 cd-inverted;
293 vmmc-supply = <&vmmc1>;
294 bus-width = <4>;
295 pinctrl-names = "default";
296 pinctrl-0 = <&mmc1_pins &mmc1cd_pins>;
297 cap-sdio-irq;
298 cap-sd-highspeed;
299 cap-mmc-highspeed;
300};
301
302&mmc2 {
303 status = "disabled";
304};
305
306&mmc3 {
307 status = "disabled";
308};
309
310&mcspi2 {
311 status = "okay";
312 pinctrl-names = "default";
313 pinctrl-0 = <&spi2_pins>;
314
315 tsc2046@0 {
316 reg = <0>; /* CS0 */
317 compatible = "ti,tsc2046";
318 interrupt-parent = <&gpio1>;
319 interrupts = <8 0>; /* boot6 / gpio_8 */
320 spi-max-frequency = <1000000>;
321 pendown-gpio = <&gpio1 8 0>;
322 vcc-supply = <&reg_vcc3>;
323 pinctrl-names = "default";
324 pinctrl-0 = <&tsc2048_pins>;
325
326 ti,x-min = <300>;
327 ti,x-max = <3000>;
328 ti,y-min = <600>;
329 ti,y-max = <3600>;
330 ti,x-plate-ohms = <80>;
331 ti,pressure-max = <255>;
332 ti,swap-xy;
333
334 linux,wakeup;
335 };
336};
337
338&usbhsehci {
339 phys = <&hsusb1_phy>;
340};
341
342&usbhshost {
343 pinctrl-names = "default";
344 pinctrl-0 = <&hsusb1_2_pins>;
345 num-ports = <2>;
346 port1-mode = "ehci-phy";
347};
348
349&usb_otg_hs {
350 pinctrl-names = "default";
351 pinctrl-0 = <&hsusb_otg_pins>;
352 interface-type = <0>;
353 usb-phy = <&usb2_phy>;
354 phys = <&usb2_phy>;
355 phy-names = "usb2-phy";
356 mode = <3>;
357 power = <50>;
358};
359
360&gpmc {
361 ranges = <0 0 0x30000000 0x1000000>,
362 <7 0 0x15000000 0x01000000>;
363
364 nand@0,0 {
365 reg = <0 0 0x1000000>;
366 nand-bus-width = <16>;
367 ti,nand-ecc-opt = "bch8";
368 /* no elm on omap3 */
369
370 gpmc,mux-add-data = <0>;
371 gpmc,device-nand;
372 gpmc,device-width = <2>;
373 gpmc,wait-pin = <0>;
374 gpmc,wait-monitoring-ns = <0>;
375 gpmc,burst-length= <4>;
376 gpmc,cs-on-ns = <0>;
377 gpmc,cs-rd-off-ns = <100>;
378 gpmc,cs-wr-off-ns = <100>;
379 gpmc,adv-on-ns = <0>;
380 gpmc,adv-rd-off-ns = <100>;
381 gpmc,adv-wr-off-ns = <100>;
382 gpmc,oe-on-ns = <5>;
383 gpmc,oe-off-ns = <75>;
384 gpmc,we-on-ns = <5>;
385 gpmc,we-off-ns = <75>;
386 gpmc,rd-cycle-ns = <100>;
387 gpmc,wr-cycle-ns = <100>;
388 gpmc,access-ns = <60>;
389 gpmc,page-burst-access-ns = <5>;
390 gpmc,bus-turnaround-ns = <0>;
391 gpmc,cycle2cycle-samecsen;
392 gpmc,cycle2cycle-delay-ns = <50>;
393 gpmc,wr-data-mux-bus-ns = <75>;
394 gpmc,wr-access-ns = <155>;
395
396 #address-cells = <1>;
397 #size-cells = <1>;
398
399 partition@0 {
400 label = "MLO";
401 reg = <0 0x80000>;
402 };
403
404 partition@0x80000 {
405 label = "u-boot";
406 reg = <0x80000 0x1e0000>;
407 };
408
409 partition@0x260000 {
410 label = "u-boot-environment";
411 reg = <0x260000 0x20000>;
412 };
413
414 partition@0x280000 {
415 label = "kernel";
416 reg = <0x280000 0x500000>;
417 };
418
419 partition@0x780000 {
420 label = "filesystem";
421 reg = <0x780000 0xf880000>;
422 };
423 };
424
425 ethernet@7,0 {
426 compatible = "smsc,lan9221", "smsc,lan9115";
427 bank-width = <2>;
428 gpmc,mux-add-data = <2>;
429 gpmc,cs-on-ns = <10>;
430 gpmc,cs-rd-off-ns = <60>;
431 gpmc,cs-wr-off-ns = <60>;
432 gpmc,adv-on-ns = <0>;
433 gpmc,adv-rd-off-ns = <10>;
434 gpmc,adv-wr-off-ns = <10>;
435 gpmc,oe-on-ns = <10>;
436 gpmc,oe-off-ns = <60>;
437 gpmc,we-on-ns = <10>;
438 gpmc,we-off-ns = <60>;
439 gpmc,rd-cycle-ns = <100>;
440 gpmc,wr-cycle-ns = <100>;
441 gpmc,access-ns = <50>;
442 gpmc,page-burst-access-ns = <5>;
443 gpmc,bus-turnaround-ns = <0>;
444 gpmc,cycle2cycle-delay-ns = <75>;
445 gpmc,wr-data-mux-bus-ns = <15>;
446 gpmc,wr-access-ns = <75>;
447 gpmc,cycle2cycle-samecsen;
448 gpmc,cycle2cycle-diffcsen;
449 vddvario-supply = <&reg_vcc3>;
450 vdd33a-supply = <&reg_vcc3>;
451 reg-io-width = <4>;
452 interrupt-parent = <&gpio5>;
453 interrupts = <1 0x2>;
454 reg = <7 0 0xff>;
455 pinctrl-names = "default";
456 pinctrl-0 = <&lan9221_pins>;
457 phy-mode = "mii";
458 };
459};
diff --git a/arch/arm/boot/dts/omap3-lilly-dbb056.dts b/arch/arm/boot/dts/omap3-lilly-dbb056.dts
new file mode 100644
index 000000000000..834f7c65f62d
--- /dev/null
+++ b/arch/arm/boot/dts/omap3-lilly-dbb056.dts
@@ -0,0 +1,170 @@
1/*
2 * Copyright (C) 2014 Christoph Fritz <chf.fritzc@googlemail.com>
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 */
9/dts-v1/;
10
11#include "omap3-lilly-a83x.dtsi"
12
13/ {
14 model = "INCOstartec LILLY-DBB056 (DM3730)";
15 compatible = "incostartec,omap3-lilly-dbb056", "incostartec,omap3-lilly-a83x", "ti,omap36xx", "ti,omap3";
16};
17
18&twl {
19 vaux2: regulator-vaux2 {
20 compatible = "ti,twl4030-vaux2";
21 regulator-min-microvolt = <2800000>;
22 regulator-max-microvolt = <2800000>;
23 regulator-always-on;
24 };
25};
26
27&omap3_pmx_core {
28 pinctrl-names = "default";
29 pinctrl-0 = <&lcd_pins>;
30
31 lan9117_pins: pinmux_lan9117_pins {
32 pinctrl-single,pins = <
33 OMAP3_CORE1_IOPAD(0x2114, PIN_INPUT | MUX_MODE4) /* cam_fld.gpio_98 */
34 >;
35 };
36
37 gpio4_pins: pinmux_gpio4_pins {
38 pinctrl-single,pins = <
39 OMAP3_CORE1_IOPAD(0x212e, PIN_INPUT | MUX_MODE4) /* cam_xclkb.gpio_111 -> sja1000 IRQ */
40 >;
41 };
42
43 gpio5_pins: pinmux_gpio5_pins {
44 pinctrl-single,pins = <
45 OMAP3_CORE1_IOPAD(0x218c, PIN_OUTPUT | PIN_OFF_OUTPUT_HIGH | MUX_MODE4) /* mcbsp1_clk.gpio_156 -> enable DSS */
46 >;
47 };
48
49 lcd_pins: pinmux_lcd_pins {
50 pinctrl-single,pins = <
51 OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
52 OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
53 OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */
54 OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */
55 OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0) /* dss_data0.dss_data0 */
56 OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0) /* dss_data1.dss_data1 */
57 OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0) /* dss_data2.dss_data2 */
58 OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0) /* dss_data3.dss_data3 */
59 OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0) /* dss_data4.dss_data4 */
60 OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0) /* dss_data5.dss_data5 */
61 OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */
62 OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */
63 OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */
64 OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */
65 OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */
66 OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */
67 OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */
68 OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */
69 OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */
70 OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */
71 OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0) /* dss_data16.dss_data16 */
72 OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0) /* dss_data17.dss_data17 */
73 >;
74 };
75
76 mmc2_pins: pinmux_mmc2_pins {
77 pinctrl-single,pins = <
78 OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
79 OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
80 OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
81 OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
82 OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
83 OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
84 OMAP3_CORE1_IOPAD(0x2164, PIN_OUTPUT | MUX_MODE1) /* sdmmc2_dat4.sdmmc2_dir_dat0 */
85 OMAP3_CORE1_IOPAD(0x2166, PIN_OUTPUT | MUX_MODE1) /* sdmmc2_dat5.sdmmc2_dir_dat1 */
86 OMAP3_CORE1_IOPAD(0x2168, PIN_OUTPUT | MUX_MODE1) /* sdmmc2_dat6.sdmmc2_dir_cmd */
87 OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT | MUX_MODE1) /* sdmmc2_dat7.sdmmc2_clkin */
88 OMAP3_CORE1_IOPAD(0x219a, PIN_INPUT_PULLUP | MUX_MODE4) /* uart3_cts_rctx.gpio_163 -> wp */
89 OMAP3_CORE1_IOPAD(0x219c, PIN_INPUT_PULLUP | MUX_MODE4) /* uart3_rts_sd.gpio_164 -> cd */
90 >;
91 };
92
93 spi1_pins: pinmux_spi1_pins {
94 pinctrl-single,pins = <
95 OMAP3_CORE1_IOPAD(0x21c8, PIN_INPUT | MUX_MODE0) /* mcspi1_clk.mcspi1_clk */
96 OMAP3_CORE1_IOPAD(0x21ca, PIN_INPUT | MUX_MODE0) /* mcspi1_simo.mcspi1_simo */
97 OMAP3_CORE1_IOPAD(0x21cc, PIN_INPUT | MUX_MODE0) /* mcspi1_somi.mcspi1_somi */
98 OMAP3_CORE1_IOPAD(0x21ce, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcspi1_cs0.mcspi1_cs0 */
99 >;
100 };
101};
102
103&gpio4 {
104 pinctrl-names = "default";
105 pinctrl-0 = <&gpio4_pins>;
106};
107
108&gpio5 {
109 pinctrl-names = "default";
110 pinctrl-0 = <&gpio5_pins>;
111};
112
113&mmc2 {
114 status = "okay";
115 bus-width = <4>;
116 vmmc-supply = <&vmmc1>;
117 cd-gpios = <&gpio6 4 0>; /* gpio_164 */
118 wp-gpios = <&gpio6 3 0>; /* gpio_163 */
119 pinctrl-names = "default";
120 pinctrl-0 = <&mmc2_pins>;
121 ti,dual-volt;
122};
123
124&mcspi1 {
125 status = "okay";
126 pinctrl-names = "default";
127 pinctrl-0 = <&spi1_pins>;
128};
129
130&gpmc {
131 ranges = <0 0 0x30000000 0x1000000>, /* nand assigned by COM a83x */
132 <4 0 0x20000000 0x01000000>,
133 <7 0 0x15000000 0x01000000>; /* eth assigend by COM a83x */
134
135 ethernet@4,0 {
136 compatible = "smsc,lan9117", "smsc,lan9115";
137 bank-width = <2>;
138 gpmc,mux-add-data = <2>;
139 gpmc,cs-on-ns = <10>;
140 gpmc,cs-rd-off-ns = <65>;
141 gpmc,cs-wr-off-ns = <65>;
142 gpmc,adv-on-ns = <0>;
143 gpmc,adv-rd-off-ns = <10>;
144 gpmc,adv-wr-off-ns = <10>;
145 gpmc,oe-on-ns = <10>;
146 gpmc,oe-off-ns = <65>;
147 gpmc,we-on-ns = <10>;
148 gpmc,we-off-ns = <65>;
149 gpmc,rd-cycle-ns = <100>;
150 gpmc,wr-cycle-ns = <100>;
151 gpmc,access-ns = <60>;
152 gpmc,page-burst-access-ns = <5>;
153 gpmc,bus-turnaround-ns = <0>;
154 gpmc,cycle2cycle-delay-ns = <75>;
155 gpmc,wr-data-mux-bus-ns = <15>;
156 gpmc,wr-access-ns = <75>;
157 gpmc,cycle2cycle-samecsen;
158 gpmc,cycle2cycle-diffcsen;
159 vddvario-supply = <&reg_vcc3>;
160 vdd33a-supply = <&reg_vcc3>;
161 reg-io-width = <4>;
162 interrupt-parent = <&gpio4>;
163 interrupts = <2 0x2>;
164 reg = <4 0 0xff>;
165 pinctrl-names = "default";
166 pinctrl-0 = <&lan9117_pins>;
167 phy-mode = "mii";
168 smsc,force-internal-phy;
169 };
170};
diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts
index 0bf40c90faba..1a57b61f5e24 100644
--- a/arch/arm/boot/dts/omap3-n900.dts
+++ b/arch/arm/boot/dts/omap3-n900.dts
@@ -74,6 +74,22 @@
74 }; 74 };
75 }; 75 };
76 76
77 isp1704: isp1704 {
78 compatible = "nxp,isp1704";
79 nxp,enable-gpio = <&gpio3 3 GPIO_ACTIVE_HIGH>;
80 usb-phy = <&usb2_phy>;
81 };
82
83 tv: connector {
84 compatible = "composite-connector";
85 label = "tv";
86
87 port {
88 tv_connector_in: endpoint {
89 remote-endpoint = <&venc_out>;
90 };
91 };
92 };
77}; 93};
78 94
79&omap3_pmx_core { 95&omap3_pmx_core {
@@ -140,11 +156,23 @@
140 >; 156 >;
141 }; 157 };
142 158
143 display_pins: pinmux_display_pins { 159 acx565akm_pins: pinmux_acx565akm_pins {
144 pinctrl-single,pins = < 160 pinctrl-single,pins = <
145 0x0d4 (PIN_OUTPUT | MUX_MODE4) /* RX51_LCD_RESET_GPIO */ 161 0x0d4 (PIN_OUTPUT | MUX_MODE4) /* RX51_LCD_RESET_GPIO */
146 >; 162 >;
147 }; 163 };
164
165 dss_sdi_pins: pinmux_dss_sdi_pins {
166 pinctrl-single,pins = <
167 0x0c0 (PIN_OUTPUT | MUX_MODE1) /* dss_data10.sdi_dat1n */
168 0x0c2 (PIN_OUTPUT | MUX_MODE1) /* dss_data11.sdi_dat1p */
169 0x0c4 (PIN_OUTPUT | MUX_MODE1) /* dss_data12.sdi_dat2n */
170 0x0c6 (PIN_OUTPUT | MUX_MODE1) /* dss_data13.sdi_dat2p */
171
172 0x0d8 (PIN_OUTPUT | MUX_MODE1) /* dss_data22.sdi_clkp */
173 0x0da (PIN_OUTPUT | MUX_MODE1) /* dss_data23.sdi_clkn */
174 >;
175 };
148}; 176};
149 177
150&i2c1 { 178&i2c1 {
@@ -254,6 +282,61 @@
254 }; 282 };
255}; 283};
256 284
285&twl_keypad {
286 linux,keymap = < 0x00000010 /* KEY_Q */
287 0x00010018 /* KEY_O */
288 0x00020019 /* KEY_P */
289 0x00030033 /* KEY_COMMA */
290 0x0004000e /* KEY_BACKSPACE */
291 0x0006001e /* KEY_A */
292 0x0007001f /* KEY_S */
293
294 0x01000011 /* KEY_W */
295 0x01010020 /* KEY_D */
296 0x01020021 /* KEY_F */
297 0x01030022 /* KEY_G */
298 0x01040023 /* KEY_H */
299 0x01050024 /* KEY_J */
300 0x01060025 /* KEY_K */
301 0x01070026 /* KEY_L */
302
303 0x02000012 /* KEY_E */
304 0x02010034 /* KEY_DOT */
305 0x02020067 /* KEY_UP */
306 0x0203001c /* KEY_ENTER */
307 0x0205002c /* KEY_Z */
308 0x0206002d /* KEY_X */
309 0x0207002e /* KEY_C */
310 0x02080043 /* KEY_F9 */
311
312 0x03000013 /* KEY_R */
313 0x0301002f /* KEY_V */
314 0x03020030 /* KEY_B */
315 0x03030031 /* KEY_N */
316 0x03040032 /* KEY_M */
317 0x03050039 /* KEY_SPACE */
318 0x03060039 /* KEY_SPACE */
319 0x03070069 /* KEY_LEFT */
320
321 0x04000014 /* KEY_T */
322 0x0401006c /* KEY_DOWN */
323 0x0402006a /* KEY_RIGHT */
324 0x0404001d /* KEY_LEFTCTRL */
325 0x04050064 /* KEY_RIGHTALT */
326 0x0406002a /* KEY_LEFTSHIFT */
327 0x04080044 /* KEY_F10 */
328
329 0x05000015 /* KEY_Y */
330 0x05080057 /* KEY_F11 */
331
332 0x06000016 /* KEY_U */
333
334 0x07000017 /* KEY_I */
335 0x07010041 /* KEY_F7 */
336 0x07020042 /* KEY_F8 */
337 >;
338};
339
257&twl_gpio { 340&twl_gpio {
258 ti,pullups = <0x0>; 341 ti,pullups = <0x0>;
259 ti,pulldowns = <0x03ff3f>; /* BIT(0..5) | BIT(8..17) */ 342 ti,pulldowns = <0x03ff3f>; /* BIT(0..5) | BIT(8..17) */
@@ -291,6 +374,13 @@
291 DVDD-supply = <&vio>; 374 DVDD-supply = <&vio>;
292 }; 375 };
293 376
377 tsl2563: tsl2563@29 {
378 compatible = "amstaos,tsl2563";
379 reg = <0x29>;
380
381 amstaos,cover-comp-gain = <16>;
382 };
383
294 lp5523: lp5523@32 { 384 lp5523: lp5523@32 {
295 compatible = "national,lp5523"; 385 compatible = "national,lp5523";
296 reg = <0x32>; 386 reg = <0x32>;
@@ -356,6 +446,29 @@
356 compatible = "ti,bq27200"; 446 compatible = "ti,bq27200";
357 reg = <0x55>; 447 reg = <0x55>;
358 }; 448 };
449
450 tpa6130a2: tpa6130a2@60 {
451 compatible = "ti,tpa6130a2";
452 reg = <0x60>;
453
454 Vdd-supply = <&vmmc2>;
455
456 power-gpio = <&gpio4 2 GPIO_ACTIVE_HIGH>; /* 98 */
457 };
458
459 bq24150a: bq24150a@6b {
460 compatible = "ti,bq24150a";
461 reg = <0x6b>;
462
463 ti,current-limit = <100>;
464 ti,weak-battery-voltage = <3400>;
465 ti,battery-regulation-voltage = <4200>;
466 ti,charge-current = <650>;
467 ti,termination-current = <100>;
468 ti,resistor-sense = <68>;
469
470 ti,usb-charger-detection = <&isp1704>;
471 };
359}; 472};
360 473
361&i2c3 { 474&i2c3 {
@@ -471,13 +584,23 @@
471 spi-max-frequency = <6000000>; 584 spi-max-frequency = <6000000>;
472 reg = <0>; 585 reg = <0>;
473 }; 586 };
474 mipid@2 { 587
475 compatible = "acx565akm"; 588 acx565akm@2 {
589 compatible = "sony,acx565akm";
476 spi-max-frequency = <6000000>; 590 spi-max-frequency = <6000000>;
477 reg = <2>; 591 reg = <2>;
478 592
479 pinctrl-names = "default"; 593 pinctrl-names = "default";
480 pinctrl-0 = <&display_pins>; 594 pinctrl-0 = <&acx565akm_pins>;
595
596 label = "lcd";
597 reset-gpios = <&gpio3 26 GPIO_ACTIVE_HIGH>; /* 90 */
598
599 port {
600 lcd_in: endpoint {
601 remote-endpoint = <&sdi_out>;
602 };
603 };
481 }; 604 };
482}; 605};
483 606
@@ -503,3 +626,39 @@
503 pinctrl-names = "default"; 626 pinctrl-names = "default";
504 pinctrl-0 = <&uart3_pins>; 627 pinctrl-0 = <&uart3_pins>;
505}; 628};
629
630&dss {
631 status = "ok";
632
633 pinctrl-names = "default";
634 pinctrl-0 = <&dss_sdi_pins>;
635
636 vdds_sdi-supply = <&vaux1>;
637
638 ports {
639 #address-cells = <1>;
640 #size-cells = <0>;
641
642 port@1 {
643 reg = <1>;
644
645 sdi_out: endpoint {
646 remote-endpoint = <&lcd_in>;
647 datapairs = <2>;
648 };
649 };
650 };
651};
652
653&venc {
654 status = "ok";
655
656 vdda-supply = <&vdac>;
657
658 port {
659 venc_out: endpoint {
660 remote-endpoint = <&tv_connector_in>;
661 ti,channels = <1>;
662 };
663 };
664};
diff --git a/arch/arm/boot/dts/omap3-overo.dtsi b/arch/arm/boot/dts/omap3-overo.dtsi
index 597099907f8e..cc534e401dee 100644
--- a/arch/arm/boot/dts/omap3-overo.dtsi
+++ b/arch/arm/boot/dts/omap3-overo.dtsi
@@ -92,3 +92,7 @@
92 pinctrl-names = "default"; 92 pinctrl-names = "default";
93 pinctrl-0 = <&uart3_pins>; 93 pinctrl-0 = <&uart3_pins>;
94}; 94};
95
96&mcbsp2 {
97 status = "okay";
98};
diff --git a/arch/arm/boot/dts/omap3-sb-t35.dtsi b/arch/arm/boot/dts/omap3-sb-t35.dtsi
index b9a2fedce7ee..7909c51b05a5 100644
--- a/arch/arm/boot/dts/omap3-sb-t35.dtsi
+++ b/arch/arm/boot/dts/omap3-sb-t35.dtsi
@@ -2,11 +2,36 @@
2 * Common support for CompuLab SB-T35 used on SBC-T3530, SBC-T3517 and SBC-T3730 2 * Common support for CompuLab SB-T35 used on SBC-T3530, SBC-T3517 and SBC-T3730
3 */ 3 */
4 4
5/ {
6 vddvario_sb_t35: regulator-vddvario-sb-t35 {
7 compatible = "regulator-fixed";
8 regulator-name = "vddvario";
9 regulator-always-on;
10 };
11
12 vdd33a_sb_t35: regulator-vdd33a-sb-t35 {
13 compatible = "regulator-fixed";
14 regulator-name = "vdd33a";
15 regulator-always-on;
16 };
17};
18
19&omap3_pmx_core {
20 smsc2_pins: pinmux_smsc2_pins {
21 pinctrl-single,pins = <
22 OMAP3_CORE1_IOPAD(0x20b6, PIN_OUTPUT | MUX_MODE0) /* gpmc_ncs4.gpmc_ncs4 */
23 OMAP3_CORE1_IOPAD(0x20d2, PIN_INPUT_PULLUP | MUX_MODE4) /* gpmc_wait3.gpio_65 */
24 >;
25 };
26};
27
5&gpmc { 28&gpmc {
6 ranges = <4 0 0x2d000000 0x01000000>; 29 ranges = <4 0 0x2d000000 0x01000000>;
7 30
8 smsc2: ethernet@4,0 { 31 smsc2: ethernet@4,0 {
9 compatible = "smsc,lan9221", "smsc,lan9115"; 32 compatible = "smsc,lan9221", "smsc,lan9115";
33 pinctrl-names = "default";
34 pinctrl-0 = <&smsc2_pins>;
10 interrupt-parent = <&gpio3>; 35 interrupt-parent = <&gpio3>;
11 interrupts = <1 IRQ_TYPE_LEVEL_LOW>; 36 interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
12 reg = <4 0 0xff>; 37 reg = <4 0 0xff>;
@@ -32,8 +57,8 @@
32 gpmc,wr-access-ns = <186>; 57 gpmc,wr-access-ns = <186>;
33 gpmc,cycle2cycle-samecsen; 58 gpmc,cycle2cycle-samecsen;
34 gpmc,cycle2cycle-diffcsen; 59 gpmc,cycle2cycle-diffcsen;
35 vddvario-supply = <&vddvario>; 60 vddvario-supply = <&vddvario_sb_t35>;
36 vdd33a-supply = <&vdd33a>; 61 vdd33a-supply = <&vdd33a_sb_t35>;
37 reg-io-width = <4>; 62 reg-io-width = <4>;
38 smsc,save-mac-address; 63 smsc,save-mac-address;
39 }; 64 };
diff --git a/arch/arm/boot/dts/omap3-sbc-t3517.dts b/arch/arm/boot/dts/omap3-sbc-t3517.dts
new file mode 100644
index 000000000000..024c9c6c682d
--- /dev/null
+++ b/arch/arm/boot/dts/omap3-sbc-t3517.dts
@@ -0,0 +1,43 @@
1/*
2 * Suppport for CompuLab SBC-T3517 with CM-T3517
3 */
4
5#include "omap3-cm-t3517.dts"
6#include "omap3-sb-t35.dtsi"
7
8/ {
9 model = "CompuLab SBC-T3517 with CM-T3517";
10 compatible = "compulab,omap3-sbc-t3517", "compulab,omap3-cm-t3517", "ti,am3517", "ti,omap3";
11};
12
13&omap3_pmx_core {
14 pinctrl-names = "default";
15 pinctrl-0 = <
16 &sb_t35_usb_hub_pins
17 &usb_hub_pins
18 >;
19
20 mmc1_aux_pins: pinmux_mmc1_aux_pins {
21 pinctrl-single,pins = <
22 OMAP3_CORE1_IOPAD(0x20c0, PIN_INPUT_PULLUP | MUX_MODE4) /* gpmc_clk.gpio_59 */
23 OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT_PULLUP | MUX_MODE4) /* uart2_cts.gpio_144 */
24 >;
25 };
26
27 sb_t35_usb_hub_pins: pinmux_sb_t35_usb_hub_pins {
28 pinctrl-single,pins = <
29 OMAP3_CORE1_IOPAD(0x21ec, PIN_OUTPUT | MUX_MODE4) /* ccdc_wen.gpio_98 - SB-T35 USB HUB RST */
30 >;
31 };
32};
33
34&mmc1 {
35 pinctrl-names = "default";
36 pinctrl-0 = <
37 &mmc1_pins
38 &mmc1_aux_pins
39 >;
40
41 wp-gpios = <&gpio2 27 GPIO_ACTIVE_HIGH>; /* gpio_59 */
42 cd-gpios = <&gpio5 16 GPIO_ACTIVE_HIGH>; /* gpio_144 */
43};
diff --git a/arch/arm/boot/dts/omap3-sbc-t3530.dts b/arch/arm/boot/dts/omap3-sbc-t3530.dts
new file mode 100644
index 000000000000..bbbeea6b1988
--- /dev/null
+++ b/arch/arm/boot/dts/omap3-sbc-t3530.dts
@@ -0,0 +1,36 @@
1/*
2 * Suppport for CompuLab SBC-T3530 with CM-T3530
3 */
4
5#include "omap3-cm-t3530.dts"
6#include "omap3-sb-t35.dtsi"
7
8/ {
9 model = "CompuLab SBC-T3530 with CM-T3530";
10 compatible = "compulab,omap3-sbc-t3530", "compulab,omap3-cm-t3530", "ti,omap34xx", "ti,omap3";
11};
12
13&omap3_pmx_core {
14 pinctrl-names = "default";
15 pinctrl-0 = <&sb_t35_usb_hub_pins>;
16
17 sb_t35_usb_hub_pins: pinmux_sb_t35_usb_hub_pins {
18 pinctrl-single,pins = <
19 OMAP3_CORE1_IOPAD(0x2130, PIN_OUTPUT | MUX_MODE4) /* ccdc_wen.gpio_167 - SB-T35 USB HUB RST */
20 >;
21 };
22};
23
24/*
25 * The following ranges correspond to SMSC9x eth chips on CM-T3530 CoM and
26 * SB-T35 baseboard respectively.
27 * This setting includes both chips in SBC-T3530 board device tree.
28 */
29&gpmc {
30 ranges = <5 0 0x2c000000 0x01000000>,
31 <4 0 0x2d000000 0x01000000>;
32};
33
34&mmc1 {
35 cd-gpios = <&twl_gpio 0 GPIO_ACTIVE_HIGH>;
36};
diff --git a/arch/arm/boot/dts/omap3-sbc-t3730.dts b/arch/arm/boot/dts/omap3-sbc-t3730.dts
index c119bd545053..08e4a7086f22 100644
--- a/arch/arm/boot/dts/omap3-sbc-t3730.dts
+++ b/arch/arm/boot/dts/omap3-sbc-t3730.dts
@@ -10,21 +10,18 @@
10 compatible = "compulab,omap3-sbc-t3730", "compulab,omap3-cm-t3730", "ti,omap36xx", "ti,omap3"; 10 compatible = "compulab,omap3-sbc-t3730", "compulab,omap3-cm-t3730", "ti,omap36xx", "ti,omap3";
11}; 11};
12 12
13&gpmc { 13&omap3_pmx_core {
14 ranges = <5 0 0x2c000000 0x01000000>,
15 <4 0 0x2d000000 0x01000000>;
16};
17
18&smsc2 {
19 pinctrl-names = "default"; 14 pinctrl-names = "default";
20 pinctrl-0 = <&smsc2_pins>; 15 pinctrl-0 = <&sb_t35_usb_hub_pins>;
21};
22 16
23&omap3_pmx_core { 17 sb_t35_usb_hub_pins: pinmux_sb_t35_usb_hub_pins {
24 smsc2_pins: pinmux_smsc2_pins {
25 pinctrl-single,pins = < 18 pinctrl-single,pins = <
26 0x86 (PIN_OUTPUT | MUX_MODE0) /* gpmc_ncs4.gpmc_ncs4 */ 19 OMAP3_CORE1_IOPAD(0x2130, PIN_OUTPUT | MUX_MODE4) /* ccdc_wen.gpio_167 - SB-T35 USB HUB RST */
27 0xa2 (PIN_INPUT_PULLUP | MUX_MODE4) /* gpmc_wait3.gpio_65 */
28 >; 20 >;
29 }; 21 };
30}; \ No newline at end of file 22};
23
24&gpmc {
25 ranges = <5 0 0x2c000000 0x01000000>,
26 <4 0 0x2d000000 0x01000000>;
27};
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index a5fc83b9c835..3d05eff67e25 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -35,6 +35,11 @@
35 compatible = "arm,cortex-a8"; 35 compatible = "arm,cortex-a8";
36 device_type = "cpu"; 36 device_type = "cpu";
37 reg = <0x0>; 37 reg = <0x0>;
38
39 clocks = <&dpll1_ck>;
40 clock-names = "cpu";
41
42 clock-latency = <300000>; /* From omap-cpufreq driver */
38 }; 43 };
39 }; 44 };
40 45
@@ -411,10 +416,19 @@
411 }; 416 };
412 417
413 mmu_isp: mmu@480bd400 { 418 mmu_isp: mmu@480bd400 {
414 compatible = "ti,omap3-mmu-isp"; 419 compatible = "ti,omap2-iommu";
415 ti,hwmods = "mmu_isp";
416 reg = <0x480bd400 0x80>; 420 reg = <0x480bd400 0x80>;
417 interrupts = <8>; 421 interrupts = <24>;
422 ti,hwmods = "mmu_isp";
423 ti,#tlb-entries = <8>;
424 };
425
426 mmu_iva: mmu@5d000000 {
427 compatible = "ti,omap2-iommu";
428 reg = <0x5d000000 0x80>;
429 interrupts = <28>;
430 ti,hwmods = "mmu_iva";
431 status = "disabled";
418 }; 432 };
419 433
420 wdt2: wdt@48314000 { 434 wdt2: wdt@48314000 {
@@ -436,6 +450,7 @@
436 dmas = <&sdma 31>, 450 dmas = <&sdma 31>,
437 <&sdma 32>; 451 <&sdma 32>;
438 dma-names = "tx", "rx"; 452 dma-names = "tx", "rx";
453 status = "disabled";
439 }; 454 };
440 455
441 mcbsp2: mcbsp@49022000 { 456 mcbsp2: mcbsp@49022000 {
@@ -453,6 +468,7 @@
453 dmas = <&sdma 33>, 468 dmas = <&sdma 33>,
454 <&sdma 34>; 469 <&sdma 34>;
455 dma-names = "tx", "rx"; 470 dma-names = "tx", "rx";
471 status = "disabled";
456 }; 472 };
457 473
458 mcbsp3: mcbsp@49024000 { 474 mcbsp3: mcbsp@49024000 {
@@ -470,6 +486,7 @@
470 dmas = <&sdma 17>, 486 dmas = <&sdma 17>,
471 <&sdma 18>; 487 <&sdma 18>;
472 dma-names = "tx", "rx"; 488 dma-names = "tx", "rx";
489 status = "disabled";
473 }; 490 };
474 491
475 mcbsp4: mcbsp@49026000 { 492 mcbsp4: mcbsp@49026000 {
@@ -485,6 +502,7 @@
485 dmas = <&sdma 19>, 502 dmas = <&sdma 19>,
486 <&sdma 20>; 503 <&sdma 20>;
487 dma-names = "tx", "rx"; 504 dma-names = "tx", "rx";
505 status = "disabled";
488 }; 506 };
489 507
490 mcbsp5: mcbsp@48096000 { 508 mcbsp5: mcbsp@48096000 {
@@ -500,6 +518,7 @@
500 dmas = <&sdma 21>, 518 dmas = <&sdma 21>,
501 <&sdma 22>; 519 <&sdma 22>;
502 dma-names = "tx", "rx"; 520 dma-names = "tx", "rx";
521 status = "disabled";
503 }; 522 };
504 523
505 sham: sham@480c3000 { 524 sham: sham@480c3000 {
@@ -634,14 +653,14 @@
634 ranges; 653 ranges;
635 654
636 usbhsohci: ohci@48064400 { 655 usbhsohci: ohci@48064400 {
637 compatible = "ti,ohci-omap3", "usb-ohci"; 656 compatible = "ti,ohci-omap3";
638 reg = <0x48064400 0x400>; 657 reg = <0x48064400 0x400>;
639 interrupt-parent = <&intc>; 658 interrupt-parent = <&intc>;
640 interrupts = <76>; 659 interrupts = <76>;
641 }; 660 };
642 661
643 usbhsehci: ehci@48064800 { 662 usbhsehci: ehci@48064800 {
644 compatible = "ti,ehci-omap", "usb-ehci"; 663 compatible = "ti,ehci-omap";
645 reg = <0x48064800 0x400>; 664 reg = <0x48064800 0x400>;
646 interrupt-parent = <&intc>; 665 interrupt-parent = <&intc>;
647 interrupts = <77>; 666 interrupts = <77>;
@@ -669,6 +688,58 @@
669 num-eps = <16>; 688 num-eps = <16>;
670 ram-bits = <12>; 689 ram-bits = <12>;
671 }; 690 };
691
692 dss: dss@48050000 {
693 compatible = "ti,omap3-dss";
694 reg = <0x48050000 0x200>;
695 status = "disabled";
696 ti,hwmods = "dss_core";
697 clocks = <&dss1_alwon_fck>;
698 clock-names = "fck";
699 #address-cells = <1>;
700 #size-cells = <1>;
701 ranges;
702
703 dispc@48050400 {
704 compatible = "ti,omap3-dispc";
705 reg = <0x48050400 0x400>;
706 interrupts = <25>;
707 ti,hwmods = "dss_dispc";
708 clocks = <&dss1_alwon_fck>;
709 clock-names = "fck";
710 };
711
712 dsi: encoder@4804fc00 {
713 compatible = "ti,omap3-dsi";
714 reg = <0x4804fc00 0x200>,
715 <0x4804fe00 0x40>,
716 <0x4804ff00 0x20>;
717 reg-names = "proto", "phy", "pll";
718 interrupts = <25>;
719 status = "disabled";
720 ti,hwmods = "dss_dsi1";
721 clocks = <&dss1_alwon_fck>, <&dss2_alwon_fck>;
722 clock-names = "fck", "sys_clk";
723 };
724
725 rfbi: encoder@48050800 {
726 compatible = "ti,omap3-rfbi";
727 reg = <0x48050800 0x100>;
728 status = "disabled";
729 ti,hwmods = "dss_rfbi";
730 clocks = <&dss1_alwon_fck>, <&dss_ick>;
731 clock-names = "fck", "ick";
732 };
733
734 venc: encoder@48050c00 {
735 compatible = "ti,omap3-venc";
736 reg = <0x48050c00 0x100>;
737 status = "disabled";
738 ti,hwmods = "dss_venc";
739 clocks = <&dss_tv_fck>;
740 clock-names = "fck";
741 };
742 };
672 }; 743 };
673}; 744};
674 745
diff --git a/arch/arm/boot/dts/omap3430-sdp.dts b/arch/arm/boot/dts/omap3430-sdp.dts
index 281914ed0151..02f69f4a8fd3 100644
--- a/arch/arm/boot/dts/omap3430-sdp.dts
+++ b/arch/arm/boot/dts/omap3430-sdp.dts
@@ -34,6 +34,10 @@
34&mmc1 { 34&mmc1 {
35 vmmc-supply = <&vmmc1>; 35 vmmc-supply = <&vmmc1>;
36 vmmc_aux-supply = <&vsim>; 36 vmmc_aux-supply = <&vsim>;
37 /*
38 * S6-3 must be in ON position for 8 bit mode to function
39 * Else, use 4 bit mode
40 */
37 bus-width = <8>; 41 bus-width = <8>;
38}; 42};
39 43
@@ -103,9 +107,8 @@
103 #address-cells = <1>; 107 #address-cells = <1>;
104 #size-cells = <1>; 108 #size-cells = <1>;
105 reg = <1 0 0x08000000>; 109 reg = <1 0 0x08000000>;
110 ti,nand-ecc-opt = "ham1";
106 nand-bus-width = <8>; 111 nand-bus-width = <8>;
107
108 ti,nand-ecc-opt = "sw";
109 gpmc,cs-on-ns = <0>; 112 gpmc,cs-on-ns = <0>;
110 gpmc,cs-rd-off-ns = <36>; 113 gpmc,cs-rd-off-ns = <36>;
111 gpmc,cs-wr-off-ns = <36>; 114 gpmc,cs-wr-off-ns = <36>;
diff --git a/arch/arm/boot/dts/omap3430es1-clocks.dtsi b/arch/arm/boot/dts/omap3430es1-clocks.dtsi
index 02f6c7fabbec..4c22f3a7f813 100644
--- a/arch/arm/boot/dts/omap3430es1-clocks.dtsi
+++ b/arch/arm/boot/dts/omap3430es1-clocks.dtsi
@@ -82,16 +82,16 @@
82 ti,dividers = <0>, <1>, <2>, <3>, <4>, <0>, <6>, <0>, <8>; 82 ti,dividers = <0>, <1>, <2>, <3>, <4>, <0>, <6>, <0>, <8>;
83 }; 83 };
84 84
85 ssi_ssr_fck_3430es1: ssi_ssr_fck_3430es1 { 85 ssi_ssr_fck: ssi_ssr_fck_3430es1 {
86 #clock-cells = <0>; 86 #clock-cells = <0>;
87 compatible = "ti,composite-clock"; 87 compatible = "ti,composite-clock";
88 clocks = <&ssi_ssr_gate_fck_3430es1>, <&ssi_ssr_div_fck_3430es1>; 88 clocks = <&ssi_ssr_gate_fck_3430es1>, <&ssi_ssr_div_fck_3430es1>;
89 }; 89 };
90 90
91 ssi_sst_fck_3430es1: ssi_sst_fck_3430es1 { 91 ssi_sst_fck: ssi_sst_fck_3430es1 {
92 #clock-cells = <0>; 92 #clock-cells = <0>;
93 compatible = "fixed-factor-clock"; 93 compatible = "fixed-factor-clock";
94 clocks = <&ssi_ssr_fck_3430es1>; 94 clocks = <&ssi_ssr_fck>;
95 clock-mult = <1>; 95 clock-mult = <1>;
96 clock-div = <2>; 96 clock-div = <2>;
97 }; 97 };
@@ -120,7 +120,7 @@
120 clock-div = <1>; 120 clock-div = <1>;
121 }; 121 };
122 122
123 ssi_ick_3430es1: ssi_ick_3430es1 { 123 ssi_ick: ssi_ick_3430es1 {
124 #clock-cells = <0>; 124 #clock-cells = <0>;
125 compatible = "ti,omap3-no-wait-interface-clock"; 125 compatible = "ti,omap3-no-wait-interface-clock";
126 clocks = <&ssi_l4_ick>; 126 clocks = <&ssi_l4_ick>;
@@ -152,7 +152,7 @@
152 clocks = <&usb_l4_gate_ick>, <&usb_l4_div_ick>; 152 clocks = <&usb_l4_gate_ick>, <&usb_l4_div_ick>;
153 }; 153 };
154 154
155 dss1_alwon_fck_3430es1: dss1_alwon_fck_3430es1 { 155 dss1_alwon_fck: dss1_alwon_fck_3430es1 {
156 #clock-cells = <0>; 156 #clock-cells = <0>;
157 compatible = "ti,gate-clock"; 157 compatible = "ti,gate-clock";
158 clocks = <&dpll4_m4x2_ck>; 158 clocks = <&dpll4_m4x2_ck>;
@@ -161,7 +161,7 @@
161 ti,set-rate-parent; 161 ti,set-rate-parent;
162 }; 162 };
163 163
164 dss_ick_3430es1: dss_ick_3430es1 { 164 dss_ick: dss_ick_3430es1 {
165 #clock-cells = <0>; 165 #clock-cells = <0>;
166 compatible = "ti,omap3-no-wait-interface-clock"; 166 compatible = "ti,omap3-no-wait-interface-clock";
167 clocks = <&l4_ick>; 167 clocks = <&l4_ick>;
@@ -184,7 +184,7 @@
184 dss_clkdm: dss_clkdm { 184 dss_clkdm: dss_clkdm {
185 compatible = "ti,clockdomain"; 185 compatible = "ti,clockdomain";
186 clocks = <&dss_tv_fck>, <&dss_96m_fck>, <&dss2_alwon_fck>, 186 clocks = <&dss_tv_fck>, <&dss_96m_fck>, <&dss2_alwon_fck>,
187 <&dss1_alwon_fck_3430es1>, <&dss_ick_3430es1>; 187 <&dss1_alwon_fck>, <&dss_ick>;
188 }; 188 };
189 189
190 d2d_clkdm: d2d_clkdm { 190 d2d_clkdm: d2d_clkdm {
@@ -203,6 +203,6 @@
203 <&i2c1_ick>, <&uart2_ick>, <&uart1_ick>, <&gpt11_ick>, 203 <&i2c1_ick>, <&uart2_ick>, <&uart1_ick>, <&gpt11_ick>,
204 <&gpt10_ick>, <&mcbsp5_ick>, <&mcbsp1_ick>, 204 <&gpt10_ick>, <&mcbsp5_ick>, <&mcbsp1_ick>,
205 <&omapctrl_ick>, <&aes2_ick>, <&sha12_ick>, 205 <&omapctrl_ick>, <&aes2_ick>, <&sha12_ick>,
206 <&fshostusb_fck>, <&fac_ick>, <&ssi_ick_3430es1>; 206 <&fshostusb_fck>, <&fac_ick>, <&ssi_ick>;
207 }; 207 };
208}; 208};
diff --git a/arch/arm/boot/dts/omap36xx-am35xx-omap3430es2plus-clocks.dtsi b/arch/arm/boot/dts/omap36xx-am35xx-omap3430es2plus-clocks.dtsi
index af9ae5346bf2..080fb3f4e429 100644
--- a/arch/arm/boot/dts/omap36xx-am35xx-omap3430es2plus-clocks.dtsi
+++ b/arch/arm/boot/dts/omap36xx-am35xx-omap3430es2plus-clocks.dtsi
@@ -160,7 +160,7 @@
160 ti,bit-shift = <30>; 160 ti,bit-shift = <30>;
161 }; 161 };
162 162
163 dss1_alwon_fck_3430es2: dss1_alwon_fck_3430es2 { 163 dss1_alwon_fck: dss1_alwon_fck_3430es2 {
164 #clock-cells = <0>; 164 #clock-cells = <0>;
165 compatible = "ti,dss-gate-clock"; 165 compatible = "ti,dss-gate-clock";
166 clocks = <&dpll4_m4x2_ck>; 166 clocks = <&dpll4_m4x2_ck>;
@@ -169,7 +169,7 @@
169 ti,set-rate-parent; 169 ti,set-rate-parent;
170 }; 170 };
171 171
172 dss_ick_3430es2: dss_ick_3430es2 { 172 dss_ick: dss_ick_3430es2 {
173 #clock-cells = <0>; 173 #clock-cells = <0>;
174 compatible = "ti,omap3-dss-interface-clock"; 174 compatible = "ti,omap3-dss-interface-clock";
175 clocks = <&l4_ick>; 175 clocks = <&l4_ick>;
@@ -216,7 +216,7 @@
216 dss_clkdm: dss_clkdm { 216 dss_clkdm: dss_clkdm {
217 compatible = "ti,clockdomain"; 217 compatible = "ti,clockdomain";
218 clocks = <&dss_tv_fck>, <&dss_96m_fck>, <&dss2_alwon_fck>, 218 clocks = <&dss_tv_fck>, <&dss_96m_fck>, <&dss2_alwon_fck>,
219 <&dss1_alwon_fck_3430es2>, <&dss_ick_3430es2>; 219 <&dss1_alwon_fck>, <&dss_ick>;
220 }; 220 };
221 221
222 core_l4_clkdm: core_l4_clkdm { 222 core_l4_clkdm: core_l4_clkdm {
diff --git a/arch/arm/boot/dts/omap36xx-clocks.dtsi b/arch/arm/boot/dts/omap36xx-clocks.dtsi
index 2fcf253b677c..6b5280d04a0e 100644
--- a/arch/arm/boot/dts/omap36xx-clocks.dtsi
+++ b/arch/arm/boot/dts/omap36xx-clocks.dtsi
@@ -70,6 +70,26 @@
70 }; 70 };
71}; 71};
72 72
73&dpll4_m2x2_mul_ck {
74 clock-mult = <1>;
75};
76
77&dpll4_m3x2_mul_ck {
78 clock-mult = <1>;
79};
80
81&dpll4_m4x2_mul_ck {
82 ti,clock-mult = <1>;
83};
84
85&dpll4_m5x2_mul_ck {
86 clock-mult = <1>;
87};
88
89&dpll4_m6x2_mul_ck {
90 clock-mult = <1>;
91};
92
73&cm_clockdomains { 93&cm_clockdomains {
74 dpll4_clkdm: dpll4_clkdm { 94 dpll4_clkdm: dpll4_clkdm {
75 compatible = "ti,clockdomain"; 95 compatible = "ti,clockdomain";
diff --git a/arch/arm/boot/dts/omap36xx-omap3430es2plus-clocks.dtsi b/arch/arm/boot/dts/omap36xx-omap3430es2plus-clocks.dtsi
index 8ed475dd63c9..877318c28364 100644
--- a/arch/arm/boot/dts/omap36xx-omap3430es2plus-clocks.dtsi
+++ b/arch/arm/boot/dts/omap36xx-omap3430es2plus-clocks.dtsi
@@ -25,16 +25,16 @@
25 ti,dividers = <0>, <1>, <2>, <3>, <4>, <0>, <6>, <0>, <8>; 25 ti,dividers = <0>, <1>, <2>, <3>, <4>, <0>, <6>, <0>, <8>;
26 }; 26 };
27 27
28 ssi_ssr_fck_3430es2: ssi_ssr_fck_3430es2 { 28 ssi_ssr_fck: ssi_ssr_fck_3430es2 {
29 #clock-cells = <0>; 29 #clock-cells = <0>;
30 compatible = "ti,composite-clock"; 30 compatible = "ti,composite-clock";
31 clocks = <&ssi_ssr_gate_fck_3430es2>, <&ssi_ssr_div_fck_3430es2>; 31 clocks = <&ssi_ssr_gate_fck_3430es2>, <&ssi_ssr_div_fck_3430es2>;
32 }; 32 };
33 33
34 ssi_sst_fck_3430es2: ssi_sst_fck_3430es2 { 34 ssi_sst_fck: ssi_sst_fck_3430es2 {
35 #clock-cells = <0>; 35 #clock-cells = <0>;
36 compatible = "fixed-factor-clock"; 36 compatible = "fixed-factor-clock";
37 clocks = <&ssi_ssr_fck_3430es2>; 37 clocks = <&ssi_ssr_fck>;
38 clock-mult = <1>; 38 clock-mult = <1>;
39 clock-div = <2>; 39 clock-div = <2>;
40 }; 40 };
@@ -55,7 +55,7 @@
55 clock-div = <1>; 55 clock-div = <1>;
56 }; 56 };
57 57
58 ssi_ick_3430es2: ssi_ick_3430es2 { 58 ssi_ick: ssi_ick_3430es2 {
59 #clock-cells = <0>; 59 #clock-cells = <0>;
60 compatible = "ti,omap3-ssi-interface-clock"; 60 compatible = "ti,omap3-ssi-interface-clock";
61 clocks = <&ssi_l4_ick>; 61 clocks = <&ssi_l4_ick>;
@@ -193,6 +193,6 @@
193 <&i2c1_ick>, <&uart2_ick>, <&uart1_ick>, <&gpt11_ick>, 193 <&i2c1_ick>, <&uart2_ick>, <&uart1_ick>, <&gpt11_ick>,
194 <&gpt10_ick>, <&mcbsp5_ick>, <&mcbsp1_ick>, 194 <&gpt10_ick>, <&mcbsp5_ick>, <&mcbsp1_ick>,
195 <&omapctrl_ick>, <&aes2_ick>, <&sha12_ick>, 195 <&omapctrl_ick>, <&aes2_ick>, <&sha12_ick>,
196 <&ssi_ick_3430es2>; 196 <&ssi_ick>;
197 }; 197 };
198}; 198};
diff --git a/arch/arm/boot/dts/omap36xx.dtsi b/arch/arm/boot/dts/omap36xx.dtsi
index 7e8dee9175d6..22cf4647087e 100644
--- a/arch/arm/boot/dts/omap36xx.dtsi
+++ b/arch/arm/boot/dts/omap36xx.dtsi
@@ -39,6 +39,26 @@
39 clock-frequency = <48000000>; 39 clock-frequency = <48000000>;
40 }; 40 };
41 41
42 abb_mpu_iva: regulator-abb-mpu {
43 compatible = "ti,abb-v1";
44 regulator-name = "abb_mpu_iva";
45 #address-cell = <0>;
46 #size-cells = <0>;
47 reg = <0x483072f0 0x8>, <0x48306818 0x4>;
48 reg-names = "base-address", "int-address";
49 ti,tranxdone-status-mask = <0x4000000>;
50 clocks = <&sys_ck>;
51 ti,settling-time = <30>;
52 ti,clock-cycles = <8>;
53 ti,abb_info = <
54 /*uV ABB efuse rbb_m fbb_m vset_m*/
55 1012500 0 0 0 0 0
56 1200000 0 0 0 0 0
57 1325000 0 0 0 0 0
58 1375000 1 0 0 0 0
59 >;
60 };
61
42 omap3_pmx_core2: pinmux@480025a0 { 62 omap3_pmx_core2: pinmux@480025a0 {
43 compatible = "ti,omap3-padconf", "pinctrl-single"; 63 compatible = "ti,omap3-padconf", "pinctrl-single";
44 reg = <0x480025a0 0x5c>; 64 reg = <0x480025a0 0x5c>;
@@ -52,7 +72,13 @@
52 }; 72 };
53}; 73};
54 74
55/include/ "omap36xx-clocks.dtsi" 75/* OMAP3630 needs dss_96m_fck for VENC */
76&venc {
77 clocks = <&dss_tv_fck>, <&dss_96m_fck>;
78 clock-names = "fck", "tv_dac_clk";
79};
80
56/include/ "omap34xx-omap36xx-clocks.dtsi" 81/include/ "omap34xx-omap36xx-clocks.dtsi"
57/include/ "omap36xx-omap3430es2plus-clocks.dtsi" 82/include/ "omap36xx-omap3430es2plus-clocks.dtsi"
58/include/ "omap36xx-am35xx-omap3430es2plus-clocks.dtsi" 83/include/ "omap36xx-am35xx-omap3430es2plus-clocks.dtsi"
84/include/ "omap36xx-clocks.dtsi"
diff --git a/arch/arm/boot/dts/omap3xxx-clocks.dtsi b/arch/arm/boot/dts/omap3xxx-clocks.dtsi
index cb04d4b37e7f..12be2b35dae9 100644
--- a/arch/arm/boot/dts/omap3xxx-clocks.dtsi
+++ b/arch/arm/boot/dts/omap3xxx-clocks.dtsi
@@ -425,10 +425,11 @@
425 425
426 dpll4_m4x2_mul_ck: dpll4_m4x2_mul_ck { 426 dpll4_m4x2_mul_ck: dpll4_m4x2_mul_ck {
427 #clock-cells = <0>; 427 #clock-cells = <0>;
428 compatible = "fixed-factor-clock"; 428 compatible = "ti,fixed-factor-clock";
429 clocks = <&dpll4_m4_ck>; 429 clocks = <&dpll4_m4_ck>;
430 clock-mult = <2>; 430 ti,clock-mult = <2>;
431 clock-div = <1>; 431 ti,clock-div = <1>;
432 ti,set-rate-parent;
432 }; 433 };
433 434
434 dpll4_m4x2_ck: dpll4_m4x2_ck { 435 dpll4_m4x2_ck: dpll4_m4x2_ck {
@@ -438,6 +439,7 @@
438 ti,bit-shift = <0x1d>; 439 ti,bit-shift = <0x1d>;
439 reg = <0x0d00>; 440 reg = <0x0d00>;
440 ti,set-bit-to-disable; 441 ti,set-bit-to-disable;
442 ti,set-rate-parent;
441 }; 443 };
442 444
443 dpll4_m5_ck: dpll4_m5_ck { 445 dpll4_m5_ck: dpll4_m5_ck {
diff --git a/arch/arm/boot/dts/omap4-duovero-parlor.dts b/arch/arm/boot/dts/omap4-duovero-parlor.dts
new file mode 100644
index 000000000000..96f51d870812
--- /dev/null
+++ b/arch/arm/boot/dts/omap4-duovero-parlor.dts
@@ -0,0 +1,146 @@
1/*
2 * Copyright (C) 2014 Florian Vaussard, EPFL Mobots group
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8/dts-v1/;
9
10#include "omap4-duovero.dtsi"
11
12#include <dt-bindings/input/input.h>
13
14/ {
15 model = "OMAP4430 Gumstix Duovero on Parlor";
16 compatible = "gumstix,omap4-duovero-parlor", "gumstix,omap4-duovero", "ti,omap4430", "ti,omap4";
17
18 leds {
19 compatible = "gpio-leds";
20 led0 {
21 label = "duovero:blue:led0";
22 gpios = <&gpio4 26 GPIO_ACTIVE_HIGH>; /* gpio_122 */
23 linux,default-trigger = "heartbeat";
24 };
25 };
26
27 gpio_keys {
28 compatible = "gpio-keys";
29 #address-cells = <1>;
30 #size-cells = <0>;
31 button0@121 {
32 label = "button0";
33 linux,code = <BTN_0>;
34 gpios = <&gpio4 25 GPIO_ACTIVE_LOW>; /* gpio_121 */
35 gpio-key,wakeup;
36 };
37 };
38};
39
40&omap4_pmx_core {
41 pinctrl-0 = <
42 &led_pins
43 &button_pins
44 &smsc_pins
45 >;
46
47 led_pins: pinmux_led_pins {
48 pinctrl-single,pins = <
49 0xd6 (PIN_OUTPUT | MUX_MODE3) /* abe_dmic_din3.gpio_122 */
50 >;
51 };
52
53 button_pins: pinmux_button_pins {
54 pinctrl-single,pins = <
55 0xd4 (PIN_INPUT_PULLUP | MUX_MODE3) /* abe_dmic_din2.gpio_121 */
56 >;
57 };
58
59 i2c2_pins: pinmux_i2c2_pins {
60 pinctrl-single,pins = <
61 0xe6 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_scl */
62 0xe8 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_sda */
63 >;
64 };
65
66 i2c3_pins: pinmux_i2c3_pins {
67 pinctrl-single,pins = <
68 0xea (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_scl */
69 0xec (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda */
70 >;
71 };
72
73 smsc_pins: pinmux_smsc_pins {
74 pinctrl-single,pins = <
75 0x28 (PIN_INPUT | MUX_MODE3) /* gpmc_a20.gpio_44: IRQ */
76 0x2a (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_a21.gpio_45: nReset */
77 0x30 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_a24.gpio_48: amdix enabled */
78 >;
79 };
80};
81
82&i2c2 {
83 pinctrl-names = "default";
84 pinctrl-0 = <&i2c2_pins>;
85
86 clock-frequency = <400000>;
87};
88
89&i2c3 {
90 pinctrl-names = "default";
91 pinctrl-0 = <&i2c3_pins>;
92
93 clock-frequency = <100000>;
94
95 /* optional 1K EEPROM with revision information */
96 eeprom@51 {
97 compatible = "atmel,24c01";
98 reg = <0x51>;
99 pagesize = <8>;
100 };
101};
102
103&mmc3 {
104 status = "disabled";
105};
106
107#include "omap-gpmc-smsc911x.dtsi"
108
109&gpmc {
110 ranges = <5 0 0x2c000000 0x1000000>; /* CS5 */
111
112 ethernet@gpmc {
113 reg = <5 0 0xff>;
114 interrupt-parent = <&gpio2>;
115 interrupts = <12 IRQ_TYPE_LEVEL_LOW>; /* gpio_44 */
116
117 phy-mode = "mii";
118
119 gpmc,cs-on-ns = <10>;
120 gpmc,cs-rd-off-ns = <50>;
121 gpmc,cs-wr-off-ns = <50>;
122 gpmc,adv-on-ns = <0>;
123 gpmc,adv-rd-off-ns = <10>;
124 gpmc,adv-wr-off-ns = <10>;
125 gpmc,oe-on-ns = <15>;
126 gpmc,oe-off-ns = <50>;
127 gpmc,we-on-ns = <15>;
128 gpmc,we-off-ns = <50>;
129 gpmc,rd-cycle-ns = <50>;
130 gpmc,wr-cycle-ns = <50>;
131 gpmc,access-ns = <50>;
132 gpmc,page-burst-access-ns = <0>;
133 gpmc,bus-turnaround-ns = <35>;
134 gpmc,cycle2cycle-delay-ns = <35>;
135 gpmc,wr-data-mux-bus-ns = <35>;
136 gpmc,wr-access-ns = <50>;
137
138 gpmc,mux-add-data = <2>;
139 gpmc,sync-read;
140 gpmc,sync-write;
141 gpmc,clk-activation-ns = <5>;
142 gpmc,sync-clk-ps = <20000>;
143 };
144};
145
146
diff --git a/arch/arm/boot/dts/omap4-duovero.dtsi b/arch/arm/boot/dts/omap4-duovero.dtsi
new file mode 100644
index 000000000000..a514791154eb
--- /dev/null
+++ b/arch/arm/boot/dts/omap4-duovero.dtsi
@@ -0,0 +1,252 @@
1/*
2 * Copyright (C) 2014 Florian Vaussard, EPFL Mobots group
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#include "omap443x.dtsi"
10
11/ {
12 model = "Gumstix Duovero";
13 compatible = "gumstix,omap4-duovero", "ti,omap4430", "ti,omap4";
14
15 memory {
16 device_type = "memory";
17 reg = <0x80000000 0x40000000>; /* 1 GB */
18 };
19
20 sound {
21 compatible = "ti,abe-twl6040";
22 ti,model = "DuoVero";
23
24 ti,mclk-freq = <38400000>;
25
26 ti,mcpdm = <&mcpdm>;
27
28 ti,twl6040 = <&twl6040>;
29
30 /* Audio routing */
31 ti,audio-routing =
32 "Headset Stereophone", "HSOL",
33 "Headset Stereophone", "HSOR",
34 "HSMIC", "Headset Mic",
35 "Headset Mic", "Headset Mic Bias";
36 };
37
38 /* HS USB Host PHY on PORT 1 */
39 hsusb1_phy: hsusb1_phy {
40 compatible = "usb-nop-xceiv";
41 reset-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>; /* gpio_62 */
42
43 pinctrl-names = "default";
44 pinctrl-0 = <&hsusb1phy_pins>;
45
46 clocks = <&auxclk3_ck>;
47 clock-names = "main_clk";
48 clock-frequency = <19200000>;
49 };
50
51 /* regulator for w2cbw0015 on sdio5 */
52 w2cbw0015_vmmc: w2cbw0015_vmmc {
53 pinctrl-names = "default";
54 pinctrl-0 = <&w2cbw0015_pins>;
55 compatible = "regulator-fixed";
56 regulator-name = "w2cbw0015";
57 regulator-min-microvolt = <3000000>;
58 regulator-max-microvolt = <3000000>;
59 gpio = <&gpio2 11 GPIO_ACTIVE_LOW>; /* gpio_43 */
60 startup-delay-us = <70000>;
61 enable-active-high;
62 regulator-boot-on;
63 };
64};
65
66&omap4_pmx_core {
67 pinctrl-names = "default";
68 pinctrl-0 = <
69 &twl6040_pins
70 &mcpdm_pins
71 &mcbsp1_pins
72 &hsusbb1_pins
73 >;
74
75 twl6040_pins: pinmux_twl6040_pins {
76 pinctrl-single,pins = <
77 0x126 (PIN_OUTPUT | MUX_MODE3) /* usbb2_ulpitll_nxt.gpio_160 */
78 0x160 (PIN_INPUT | MUX_MODE0) /* sys_nirq2.sys_nirq2 */
79 >;
80 };
81
82 mcpdm_pins: pinmux_mcpdm_pins {
83 pinctrl-single,pins = <
84 0xc6 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_pdm_ul_data.abe_pdm_ul_data */
85 0xc8 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_pdm_dl_data.abe_pdm_dl_data */
86 0xca (PIN_INPUT_PULLUP | MUX_MODE0) /* abe_pdm_frame.abe_pdm_frame */
87 0xcc (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_pdm_lb_clk.abe_pdm_lb_clk */
88 0xce (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_clks.abe_clks */
89 >;
90 };
91
92 mcbsp1_pins: pinmux_mcbsp1_pins {
93 pinctrl-single,pins = <
94 0xbe (PIN_INPUT | MUX_MODE0) /* abe_mcbsp1_clkx.abe_mcbsp1_clkx */
95 0xc0 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp1_dr.abe_mcbsp1_dr */
96 0xc2 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp1_dx.abe_mcbsp1_dx */
97 0xc4 (PIN_INPUT | MUX_MODE0) /* abe_mcbsp1_fsx.abe_mcbsp1_fsx */
98 >;
99 };
100
101 hsusbb1_pins: pinmux_hsusbb1_pins {
102 pinctrl-single,pins = <
103 0x82 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_clk.usbb1_ulpiphy_clk */
104 0x84 (PIN_OUTPUT | MUX_MODE4) /* usbb1_ulpitll_stp.usbb1_ulpiphy_stp */
105 0x86 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dir.usbb1_ulpiphy_dir */
106 0x88 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_nxt.usbb1_ulpiphy_nxt */
107 0x8a (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat0.usbb1_ulpiphy_dat0 */
108 0x8c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat1.usbb1_ulpiphy_dat1 */
109 0x8e (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat2.usbb1_ulpiphy_dat2 */
110 0x90 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat3.usbb1_ulpiphy_dat3 */
111 0x92 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat4.usbb1_ulpiphy_dat4 */
112 0x94 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat5.usbb1_ulpiphy_dat5 */
113 0x96 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat6.usbb1_ulpiphy_dat6 */
114 0x98 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat7.usbb1_ulpiphy_dat7 */
115 >;
116 };
117
118 hsusb1phy_pins: pinmux_hsusb1phy_pins {
119 pinctrl-single,pins = <
120 0x4c (PIN_OUTPUT | MUX_MODE3) /* gpmc_wait1.gpio_62 */
121 >;
122 };
123
124 w2cbw0015_pins: pinmux_w2cbw0015_pins {
125 pinctrl-single,pins = <
126 0x26 (PIN_OUTPUT | MUX_MODE3) /* gpmc_a19.gpio_43 */
127 0x3a (PIN_INPUT | MUX_MODE3) /* gpmc_ncs3.gpio_53 */
128 >;
129 };
130
131 i2c1_pins: pinmux_i2c1_pins {
132 pinctrl-single,pins = <
133 0xe2 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */
134 0xe4 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda */
135 >;
136 };
137
138 i2c4_pins: pinmux_i2c4_pins {
139 pinctrl-single,pins = <
140 0xee (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_scl */
141 0xf0 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_sda */
142 >;
143 };
144
145 mmc1_pins: pinmux_mmc1_pins {
146 pinctrl-single,pins = <
147 0xa2 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk */
148 0xa4 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmcc1_cmd */
149 0xa6 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmcc1_dat0 */
150 0xa8 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1 */
151 0xaa (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2 */
152 0xac (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3 */
153 >;
154 };
155
156 mmc5_pins: pinmux_mmc5_pins {
157 pinctrl-single,pins = <
158 0x108 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_clk */
159 0x10a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmcc5_cmd */
160 0x10c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmcc5_dat0 */
161 0x10e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat1 */
162 0x110 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat2 */
163 0x112 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat3 */
164 >;
165 };
166};
167
168/* PMIC */
169&i2c1 {
170 pinctrl-names = "default";
171 pinctrl-0 = <&i2c1_pins>;
172
173 clock-frequency = <400000>;
174
175 twl: twl@48 {
176 reg = <0x48>;
177 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_1N cascaded to gic */
178 interrupt-parent = <&gic>;
179 };
180
181 twl6040: twl@4b {
182 compatible = "ti,twl6040";
183 reg = <0x4b>;
184 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_2N cascaded to gic */
185 interrupt-parent = <&gic>;
186 ti,audpwron-gpio = <&gpio6 0 GPIO_ACTIVE_HIGH>; /* gpio_160 */
187
188 vio-supply = <&v1v8>;
189 v2v1-supply = <&v2v1>;
190 enable-active-high;
191 };
192};
193
194#include "twl6030.dtsi"
195#include "twl6030_omap4.dtsi"
196
197/* on-board bluetooth / WiFi module */
198&i2c4 {
199 pinctrl-names = "default";
200 pinctrl-0 = <&i2c4_pins>;
201
202 clock-frequency = <400000>;
203};
204
205&mmc1 {
206 pinctrl-names = "default";
207 pinctrl-0 = <&mmc1_pins>;
208
209 vmmc-supply = <&vmmc>;
210 ti,bus-width = <4>;
211 ti,non-removable; /* FIXME: use PMIC_MMC detect */
212};
213
214&mmc2 {
215 status = "disabled";
216};
217
218/* mmc3 is available to the expansion board */
219
220&mmc4 {
221 status = "disabled";
222};
223
224/* on-board WiFi module */
225&mmc5 {
226 pinctrl-names = "default";
227 pinctrl-0 = <&mmc5_pins>;
228
229 vmmc-supply = <&w2cbw0015_vmmc>;
230 ti,bus-width = <4>;
231 ti,non-removable;
232 cap-power-off-card;
233};
234
235&twl_usb_comparator {
236 usb-supply = <&vusb>;
237};
238
239&usb_otg_hs {
240 interface-type = <1>;
241 mode = <3>;
242 power = <50>;
243};
244
245&usbhshost {
246 port1-mode = "ehci-phy";
247};
248
249&usbhsehci {
250 phys = <&hsusb1_phy>;
251};
252
diff --git a/arch/arm/boot/dts/omap4-panda-common.dtsi b/arch/arm/boot/dts/omap4-panda-common.dtsi
index 88c6a05cab41..d2c45bfaaa2c 100644
--- a/arch/arm/boot/dts/omap4-panda-common.dtsi
+++ b/arch/arm/boot/dts/omap4-panda-common.dtsi
@@ -16,6 +16,11 @@
16 reg = <0x80000000 0x40000000>; /* 1 GB */ 16 reg = <0x80000000 0x40000000>; /* 1 GB */
17 }; 17 };
18 18
19 aliases {
20 display0 = &dvi0;
21 display1 = &hdmi0;
22 };
23
19 leds: leds { 24 leds: leds {
20 compatible = "gpio-leds"; 25 compatible = "gpio-leds";
21 pinctrl-names = "default"; 26 pinctrl-names = "default";
@@ -83,12 +88,8 @@
83 compatible = "usb-nop-xceiv"; 88 compatible = "usb-nop-xceiv";
84 reset-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>; /* gpio_62 */ 89 reset-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>; /* gpio_62 */
85 vcc-supply = <&hsusb1_power>; 90 vcc-supply = <&hsusb1_power>;
86 /** 91 clocks = <&auxclk3_ck>;
87 * FIXME: 92 clock-names = "main_clk";
88 * put the right clock phandle here when available
89 * clocks = <&auxclk3>;
90 * clock-names = "main_clk";
91 */
92 clock-frequency = <19200000>; 93 clock-frequency = <19200000>;
93 }; 94 };
94 95
@@ -104,14 +105,94 @@
104 startup-delay-us = <70000>; 105 startup-delay-us = <70000>;
105 enable-active-high; 106 enable-active-high;
106 }; 107 };
108
109 tfp410: encoder@0 {
110 compatible = "ti,tfp410";
111 powerdown-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>; /* gpio_0 */
112
113 ports {
114 #address-cells = <1>;
115 #size-cells = <0>;
116
117 port@0 {
118 reg = <0>;
119
120 tfp410_in: endpoint@0 {
121 remote-endpoint = <&dpi_out>;
122 };
123 };
124
125 port@1 {
126 reg = <1>;
127
128 tfp410_out: endpoint@0 {
129 remote-endpoint = <&dvi_connector_in>;
130 };
131 };
132 };
133 };
134
135 dvi0: connector@0 {
136 compatible = "dvi-connector";
137 label = "dvi";
138
139 digital;
140
141 ddc-i2c-bus = <&i2c3>;
142
143 port {
144 dvi_connector_in: endpoint {
145 remote-endpoint = <&tfp410_out>;
146 };
147 };
148 };
149
150 tpd12s015: encoder@1 {
151 compatible = "ti,tpd12s015";
152
153 gpios = <&gpio2 28 GPIO_ACTIVE_HIGH>, /* 60, CT CP HPD */
154 <&gpio2 9 GPIO_ACTIVE_HIGH>, /* 41, LS OE */
155 <&gpio2 31 GPIO_ACTIVE_HIGH>; /* 63, HPD */
156
157 ports {
158 #address-cells = <1>;
159 #size-cells = <0>;
160
161 port@0 {
162 reg = <0>;
163
164 tpd12s015_in: endpoint@0 {
165 remote-endpoint = <&hdmi_out>;
166 };
167 };
168
169 port@1 {
170 reg = <1>;
171
172 tpd12s015_out: endpoint@0 {
173 remote-endpoint = <&hdmi_connector_in>;
174 };
175 };
176 };
177 };
178
179 hdmi0: connector@1 {
180 compatible = "hdmi-connector";
181 label = "hdmi";
182
183 type = "a";
184
185 port {
186 hdmi_connector_in: endpoint {
187 remote-endpoint = <&tpd12s015_out>;
188 };
189 };
190 };
107}; 191};
108 192
109&omap4_pmx_core { 193&omap4_pmx_core {
110 pinctrl-names = "default"; 194 pinctrl-names = "default";
111 pinctrl-0 = < 195 pinctrl-0 = <
112 &twl6040_pins
113 &mcpdm_pins
114 &mcbsp1_pins
115 &dss_dpi_pins 196 &dss_dpi_pins
116 &tfp410_pins 197 &tfp410_pins
117 &dss_hdmi_pins 198 &dss_hdmi_pins
@@ -300,6 +381,10 @@
300 twl6040: twl@4b { 381 twl6040: twl@4b {
301 compatible = "ti,twl6040"; 382 compatible = "ti,twl6040";
302 reg = <0x4b>; 383 reg = <0x4b>;
384
385 pinctrl-names = "default";
386 pinctrl-0 = <&twl6040_pins>;
387
303 /* IRQ# = 119 */ 388 /* IRQ# = 119 */
304 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_2N cascaded to gic */ 389 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_2N cascaded to gic */
305 interrupt-parent = <&gic>; 390 interrupt-parent = <&gic>;
@@ -380,16 +465,16 @@
380 device-handle = <&elpida_ECB240ABACN>; 465 device-handle = <&elpida_ECB240ABACN>;
381}; 466};
382 467
383&mcbsp2 { 468&mcbsp1 {
384 status = "disabled"; 469 pinctrl-names = "default";
385}; 470 pinctrl-0 = <&mcbsp1_pins>;
386 471 status = "okay";
387&mcbsp3 {
388 status = "disabled";
389}; 472};
390 473
391&dmic { 474&mcpdm {
392 status = "disabled"; 475 pinctrl-names = "default";
476 pinctrl-0 = <&mcpdm_pins>;
477 status = "okay";
393}; 478};
394 479
395&twl_usb_comparator { 480&twl_usb_comparator {
@@ -409,3 +494,30 @@
409&usbhsehci { 494&usbhsehci {
410 phys = <&hsusb1_phy>; 495 phys = <&hsusb1_phy>;
411}; 496};
497
498&dss {
499 status = "ok";
500
501 port {
502 dpi_out: endpoint {
503 remote-endpoint = <&tfp410_in>;
504 data-lines = <24>;
505 };
506 };
507};
508
509&dsi2 {
510 status = "ok";
511 vdd-supply = <&vcxio>;
512};
513
514&hdmi {
515 status = "ok";
516 vdda-supply = <&vdac>;
517
518 port {
519 hdmi_out: endpoint {
520 remote-endpoint = <&tpd12s015_in>;
521 };
522 };
523};
diff --git a/arch/arm/boot/dts/omap4-sdp.dts b/arch/arm/boot/dts/omap4-sdp.dts
index dbc81fb6ef03..48983c8d56c2 100644
--- a/arch/arm/boot/dts/omap4-sdp.dts
+++ b/arch/arm/boot/dts/omap4-sdp.dts
@@ -19,6 +19,12 @@
19 reg = <0x80000000 0x40000000>; /* 1 GB */ 19 reg = <0x80000000 0x40000000>; /* 1 GB */
20 }; 20 };
21 21
22 aliases {
23 display0 = &lcd0;
24 display1 = &lcd1;
25 display2 = &hdmi0;
26 };
27
22 vdd_eth: fixedregulator-vdd-eth { 28 vdd_eth: fixedregulator-vdd-eth {
23 compatible = "regulator-fixed"; 29 compatible = "regulator-fixed";
24 regulator-name = "VDD_ETH"; 30 regulator-name = "VDD_ETH";
@@ -153,16 +159,53 @@
153 startup-delay-us = <70000>; 159 startup-delay-us = <70000>;
154 enable-active-high; 160 enable-active-high;
155 }; 161 };
162
163 tpd12s015: encoder@0 {
164 compatible = "ti,tpd12s015";
165
166 gpios = <&gpio2 28 GPIO_ACTIVE_HIGH>, /* 60, CT CP HPD */
167 <&gpio2 9 GPIO_ACTIVE_HIGH>, /* 41, LS OE */
168 <&gpio2 31 GPIO_ACTIVE_HIGH>; /* 63, HPD */
169
170 ports {
171 #address-cells = <1>;
172 #size-cells = <0>;
173
174 port@0 {
175 reg = <0>;
176
177 tpd12s015_in: endpoint@0 {
178 remote-endpoint = <&hdmi_out>;
179 };
180 };
181
182 port@1 {
183 reg = <1>;
184
185 tpd12s015_out: endpoint@0 {
186 remote-endpoint = <&hdmi_connector_in>;
187 };
188 };
189 };
190 };
191
192 hdmi0: connector@0 {
193 compatible = "hdmi-connector";
194 label = "hdmi";
195
196 type = "c";
197
198 port {
199 hdmi_connector_in: endpoint {
200 remote-endpoint = <&tpd12s015_out>;
201 };
202 };
203 };
156}; 204};
157 205
158&omap4_pmx_core { 206&omap4_pmx_core {
159 pinctrl-names = "default"; 207 pinctrl-names = "default";
160 pinctrl-0 = < 208 pinctrl-0 = <
161 &twl6040_pins
162 &mcpdm_pins
163 &dmic_pins
164 &mcbsp1_pins
165 &mcbsp2_pins
166 &dss_hdmi_pins 209 &dss_hdmi_pins
167 &tpd12s015_pins 210 &tpd12s015_pins
168 >; 211 >;
@@ -326,6 +369,10 @@
326 twl6040: twl@4b { 369 twl6040: twl@4b {
327 compatible = "ti,twl6040"; 370 compatible = "ti,twl6040";
328 reg = <0x4b>; 371 reg = <0x4b>;
372
373 pinctrl-names = "default";
374 pinctrl-0 = <&twl6040_pins>;
375
329 /* SPI = 0, IRQ# = 119, 4 = active high level-sensitive */ 376 /* SPI = 0, IRQ# = 119, 4 = active high level-sensitive */
330 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_2N cascaded to gic */ 377 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_2N cascaded to gic */
331 interrupt-parent = <&gic>; 378 interrupt-parent = <&gic>;
@@ -537,8 +584,28 @@
537 pinctrl-0 = <&uart4_pins>; 584 pinctrl-0 = <&uart4_pins>;
538}; 585};
539 586
540&mcbsp3 { 587&mcbsp1 {
541 status = "disabled"; 588 pinctrl-names = "default";
589 pinctrl-0 = <&mcbsp1_pins>;
590 status = "okay";
591};
592
593&mcbsp2 {
594 pinctrl-names = "default";
595 pinctrl-0 = <&mcbsp2_pins>;
596 status = "okay";
597};
598
599&dmic {
600 pinctrl-names = "default";
601 pinctrl-0 = <&dmic_pins>;
602 status = "okay";
603};
604
605&mcpdm {
606 pinctrl-names = "default";
607 pinctrl-0 = <&mcpdm_pins>;
608 status = "okay";
542}; 609};
543 610
544&twl_usb_comparator { 611&twl_usb_comparator {
@@ -550,3 +617,68 @@
550 mode = <3>; 617 mode = <3>;
551 power = <50>; 618 power = <50>;
552}; 619};
620
621&dss {
622 status = "ok";
623};
624
625&dsi1 {
626 status = "ok";
627 vdd-supply = <&vcxio>;
628
629 port {
630 dsi1_out_ep: endpoint {
631 remote-endpoint = <&lcd0_in>;
632 lanes = <0 1 2 3 4 5>;
633 };
634 };
635
636 lcd0: display {
637 compatible = "tpo,taal", "panel-dsi-cm";
638 label = "lcd0";
639
640 reset-gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* 102 */
641
642 port {
643 lcd0_in: endpoint {
644 remote-endpoint = <&dsi1_out_ep>;
645 };
646 };
647 };
648};
649
650&dsi2 {
651 status = "ok";
652 vdd-supply = <&vcxio>;
653
654 port {
655 dsi2_out_ep: endpoint {
656 remote-endpoint = <&lcd1_in>;
657 lanes = <0 1 2 3 4 5>;
658 };
659 };
660
661 lcd1: display {
662 compatible = "tpo,taal", "panel-dsi-cm";
663 label = "lcd1";
664
665 reset-gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>; /* 104 */
666
667 port {
668 lcd1_in: endpoint {
669 remote-endpoint = <&dsi2_out_ep>;
670 };
671 };
672 };
673};
674
675&hdmi {
676 status = "ok";
677 vdda-supply = <&vdac>;
678
679 port {
680 hdmi_out: endpoint {
681 remote-endpoint = <&tpd12s015_in>;
682 };
683 };
684};
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index d3f8a6e8ca20..4db99db0bffa 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -36,6 +36,11 @@
36 device_type = "cpu"; 36 device_type = "cpu";
37 next-level-cache = <&L2>; 37 next-level-cache = <&L2>;
38 reg = <0x0>; 38 reg = <0x0>;
39
40 clocks = <&dpll_mpu_ck>;
41 clock-names = "cpu";
42
43 clock-latency = <300000>; /* From omap-cpufreq driver */
39 }; 44 };
40 cpu@1 { 45 cpu@1 {
41 compatible = "arm,cortex-a9"; 46 compatible = "arm,cortex-a9";
@@ -313,6 +318,7 @@
313 compatible = "ti,omap4-hwspinlock"; 318 compatible = "ti,omap4-hwspinlock";
314 reg = <0x4a0f6000 0x1000>; 319 reg = <0x4a0f6000 0x1000>;
315 ti,hwmods = "spinlock"; 320 ti,hwmods = "spinlock";
321 #hwlock-cells = <1>;
316 }; 322 };
317 323
318 i2c1: i2c@48070000 { 324 i2c1: i2c@48070000 {
@@ -461,6 +467,21 @@
461 dma-names = "tx", "rx"; 467 dma-names = "tx", "rx";
462 }; 468 };
463 469
470 mmu_dsp: mmu@4a066000 {
471 compatible = "ti,omap4-iommu";
472 reg = <0x4a066000 0x100>;
473 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
474 ti,hwmods = "mmu_dsp";
475 };
476
477 mmu_ipu: mmu@55082000 {
478 compatible = "ti,omap4-iommu";
479 reg = <0x55082000 0x100>;
480 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
481 ti,hwmods = "mmu_ipu";
482 ti,iommu-bus-err-back;
483 };
484
464 wdt2: wdt@4a314000 { 485 wdt2: wdt@4a314000 {
465 compatible = "ti,omap4-wdt", "ti,omap3-wdt"; 486 compatible = "ti,omap4-wdt", "ti,omap3-wdt";
466 reg = <0x4a314000 0x80>; 487 reg = <0x4a314000 0x80>;
@@ -478,6 +499,7 @@
478 dmas = <&sdma 65>, 499 dmas = <&sdma 65>,
479 <&sdma 66>; 500 <&sdma 66>;
480 dma-names = "up_link", "dn_link"; 501 dma-names = "up_link", "dn_link";
502 status = "disabled";
481 }; 503 };
482 504
483 dmic: dmic@4012e000 { 505 dmic: dmic@4012e000 {
@@ -489,6 +511,7 @@
489 ti,hwmods = "dmic"; 511 ti,hwmods = "dmic";
490 dmas = <&sdma 67>; 512 dmas = <&sdma 67>;
491 dma-names = "up_link"; 513 dma-names = "up_link";
514 status = "disabled";
492 }; 515 };
493 516
494 mcbsp1: mcbsp@40122000 { 517 mcbsp1: mcbsp@40122000 {
@@ -503,6 +526,7 @@
503 dmas = <&sdma 33>, 526 dmas = <&sdma 33>,
504 <&sdma 34>; 527 <&sdma 34>;
505 dma-names = "tx", "rx"; 528 dma-names = "tx", "rx";
529 status = "disabled";
506 }; 530 };
507 531
508 mcbsp2: mcbsp@40124000 { 532 mcbsp2: mcbsp@40124000 {
@@ -517,6 +541,7 @@
517 dmas = <&sdma 17>, 541 dmas = <&sdma 17>,
518 <&sdma 18>; 542 <&sdma 18>;
519 dma-names = "tx", "rx"; 543 dma-names = "tx", "rx";
544 status = "disabled";
520 }; 545 };
521 546
522 mcbsp3: mcbsp@40126000 { 547 mcbsp3: mcbsp@40126000 {
@@ -531,6 +556,7 @@
531 dmas = <&sdma 19>, 556 dmas = <&sdma 19>,
532 <&sdma 20>; 557 <&sdma 20>;
533 dma-names = "tx", "rx"; 558 dma-names = "tx", "rx";
559 status = "disabled";
534 }; 560 };
535 561
536 mcbsp4: mcbsp@48096000 { 562 mcbsp4: mcbsp@48096000 {
@@ -544,6 +570,7 @@
544 dmas = <&sdma 31>, 570 dmas = <&sdma 31>,
545 <&sdma 32>; 571 <&sdma 32>;
546 dma-names = "tx", "rx"; 572 dma-names = "tx", "rx";
573 status = "disabled";
547 }; 574 };
548 575
549 keypad: keypad@4a31c000 { 576 keypad: keypad@4a31c000 {
@@ -554,6 +581,13 @@
554 ti,hwmods = "kbd"; 581 ti,hwmods = "kbd";
555 }; 582 };
556 583
584 dmm@4e000000 {
585 compatible = "ti,omap4-dmm";
586 reg = <0x4e000000 0x800>;
587 interrupts = <0 113 0x4>;
588 ti,hwmods = "dmm";
589 };
590
557 emif1: emif@4c000000 { 591 emif1: emif@4c000000 {
558 compatible = "ti,emif-4d"; 592 compatible = "ti,emif-4d";
559 reg = <0x4c000000 0x100>; 593 reg = <0x4c000000 0x100>;
@@ -699,14 +733,14 @@
699 ranges; 733 ranges;
700 734
701 usbhsohci: ohci@4a064800 { 735 usbhsohci: ohci@4a064800 {
702 compatible = "ti,ohci-omap3", "usb-ohci"; 736 compatible = "ti,ohci-omap3";
703 reg = <0x4a064800 0x400>; 737 reg = <0x4a064800 0x400>;
704 interrupt-parent = <&gic>; 738 interrupt-parent = <&gic>;
705 interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; 739 interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
706 }; 740 };
707 741
708 usbhsehci: ehci@4a064c00 { 742 usbhsehci: ehci@4a064c00 {
709 compatible = "ti,ehci-omap", "usb-ehci"; 743 compatible = "ti,ehci-omap";
710 reg = <0x4a064c00 0x400>; 744 reg = <0x4a064c00 0x400>;
711 interrupt-parent = <&gic>; 745 interrupt-parent = <&gic>;
712 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; 746 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
@@ -757,6 +791,111 @@
757 dmas = <&sdma 117>, <&sdma 116>; 791 dmas = <&sdma 117>, <&sdma 116>;
758 dma-names = "tx", "rx"; 792 dma-names = "tx", "rx";
759 }; 793 };
794
795 abb_mpu: regulator-abb-mpu {
796 compatible = "ti,abb-v2";
797 regulator-name = "abb_mpu";
798 #address-cells = <0>;
799 #size-cells = <0>;
800 ti,tranxdone-status-mask = <0x80>;
801 clocks = <&sys_clkin_ck>;
802 ti,settling-time = <50>;
803 ti,clock-cycles = <16>;
804
805 status = "disabled";
806 };
807
808 abb_iva: regulator-abb-iva {
809 compatible = "ti,abb-v2";
810 regulator-name = "abb_iva";
811 #address-cells = <0>;
812 #size-cells = <0>;
813 ti,tranxdone-status-mask = <0x80000000>;
814 clocks = <&sys_clkin_ck>;
815 ti,settling-time = <50>;
816 ti,clock-cycles = <16>;
817
818 status = "disabled";
819 };
820
821 dss: dss@58000000 {
822 compatible = "ti,omap4-dss";
823 reg = <0x58000000 0x80>;
824 status = "disabled";
825 ti,hwmods = "dss_core";
826 clocks = <&dss_dss_clk>;
827 clock-names = "fck";
828 #address-cells = <1>;
829 #size-cells = <1>;
830 ranges;
831
832 dispc@58001000 {
833 compatible = "ti,omap4-dispc";
834 reg = <0x58001000 0x1000>;
835 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
836 ti,hwmods = "dss_dispc";
837 clocks = <&dss_dss_clk>;
838 clock-names = "fck";
839 };
840
841 rfbi: encoder@58002000 {
842 compatible = "ti,omap4-rfbi";
843 reg = <0x58002000 0x1000>;
844 status = "disabled";
845 ti,hwmods = "dss_rfbi";
846 clocks = <&dss_dss_clk>, <&dss_fck>;
847 clock-names = "fck", "ick";
848 };
849
850 venc: encoder@58003000 {
851 compatible = "ti,omap4-venc";
852 reg = <0x58003000 0x1000>;
853 status = "disabled";
854 ti,hwmods = "dss_venc";
855 clocks = <&dss_tv_clk>;
856 clock-names = "fck";
857 };
858
859 dsi1: encoder@58004000 {
860 compatible = "ti,omap4-dsi";
861 reg = <0x58004000 0x200>,
862 <0x58004200 0x40>,
863 <0x58004300 0x20>;
864 reg-names = "proto", "phy", "pll";
865 interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
866 status = "disabled";
867 ti,hwmods = "dss_dsi1";
868 clocks = <&dss_dss_clk>, <&dss_sys_clk>;
869 clock-names = "fck", "sys_clk";
870 };
871
872 dsi2: encoder@58005000 {
873 compatible = "ti,omap4-dsi";
874 reg = <0x58005000 0x200>,
875 <0x58005200 0x40>,
876 <0x58005300 0x20>;
877 reg-names = "proto", "phy", "pll";
878 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
879 status = "disabled";
880 ti,hwmods = "dss_dsi2";
881 clocks = <&dss_dss_clk>, <&dss_sys_clk>;
882 clock-names = "fck", "sys_clk";
883 };
884
885 hdmi: encoder@58006000 {
886 compatible = "ti,omap4-hdmi";
887 reg = <0x58006000 0x200>,
888 <0x58006200 0x100>,
889 <0x58006300 0x100>,
890 <0x58006400 0x1000>;
891 reg-names = "wp", "pll", "phy", "core";
892 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
893 status = "disabled";
894 ti,hwmods = "dss_hdmi";
895 clocks = <&dss_48mhz_clk>, <&dss_sys_clk>;
896 clock-names = "fck", "sys_clk";
897 };
898 };
760 }; 899 };
761}; 900};
762 901
diff --git a/arch/arm/boot/dts/omap443x.dtsi b/arch/arm/boot/dts/omap443x.dtsi
index 8c1cfad30d60..0adfa1d1ef20 100644
--- a/arch/arm/boot/dts/omap443x.dtsi
+++ b/arch/arm/boot/dts/omap443x.dtsi
@@ -43,6 +43,32 @@
43 #thermal-sensor-cells = <0>; 43 #thermal-sensor-cells = <0>;
44 }; 44 };
45 }; 45 };
46
47 ocp {
48 abb_mpu: regulator-abb-mpu {
49 status = "okay";
50
51 reg = <0x4a307bd0 0x8>, <0x4a306014 0x4>;
52 reg-names = "base-address", "int-address";
53
54 ti,abb_info = <
55 /*uV ABB efuse rbb_m fbb_m vset_m*/
56 1025000 0 0 0 0 0
57 1200000 0 0 0 0 0
58 1313000 0 0 0 0 0
59 1375000 1 0 0 0 0
60 1389000 1 0 0 0 0
61 >;
62 };
63
64 /* Default unused, just provide register info for record */
65 abb_iva: regulator-abb-iva {
66 reg = <0x4a307bd8 0x8>, <0x4a306010 0x4>;
67 reg-names = "base-address", "int-address";
68 };
69
70 };
71
46}; 72};
47 73
48/include/ "omap443x-clocks.dtsi" 74/include/ "omap443x-clocks.dtsi"
diff --git a/arch/arm/boot/dts/omap4460.dtsi b/arch/arm/boot/dts/omap4460.dtsi
index 6b32f520741a..194f9ef0a009 100644
--- a/arch/arm/boot/dts/omap4460.dtsi
+++ b/arch/arm/boot/dts/omap4460.dtsi
@@ -50,7 +50,44 @@
50 50
51 #thermal-sensor-cells = <0>; 51 #thermal-sensor-cells = <0>;
52 }; 52 };
53
54 abb_mpu: regulator-abb-mpu {
55 status = "okay";
56
57 reg = <0x4a307bd0 0x8>, <0x4a306014 0x4>,
58 <0x4A002268 0x4>;
59 reg-names = "base-address", "int-address",
60 "efuse-address";
61
62 ti,abb_info = <
63 /*uV ABB efuse rbb_m fbb_m vset_m*/
64 1025000 0 0 0 0 0
65 1200000 0 0 0 0 0
66 1313000 0 0 0x100000 0x40000 0
67 1375000 1 0 0 0 0
68 1389000 1 0 0 0 0
69 >;
70 };
71
72 abb_iva: regulator-abb-iva {
73 status = "okay";
74
75 reg = <0x4a307bd8 0x8>, <0x4a306010 0x4>,
76 <0x4A002268 0x4>;
77 reg-names = "base-address", "int-address",
78 "efuse-address";
79
80 ti,abb_info = <
81 /*uV ABB efuse rbb_m fbb_m vset_m*/
82 950000 0 0 0 0 0
83 1140000 0 0 0 0 0
84 1291000 0 0 0x200000 0 0
85 1375000 1 0 0 0 0
86 1376000 1 0 0 0 0
87 >;
88 };
53 }; 89 };
90
54}; 91};
55 92
56/include/ "omap446x-clocks.dtsi" 93/include/ "omap446x-clocks.dtsi"
diff --git a/arch/arm/boot/dts/omap5-uevm.dts b/arch/arm/boot/dts/omap5-uevm.dts
index 002fa70180a5..3b99ec25b748 100644
--- a/arch/arm/boot/dts/omap5-uevm.dts
+++ b/arch/arm/boot/dts/omap5-uevm.dts
@@ -31,12 +31,8 @@
31 hsusb2_phy: hsusb2_phy { 31 hsusb2_phy: hsusb2_phy {
32 compatible = "usb-nop-xceiv"; 32 compatible = "usb-nop-xceiv";
33 reset-gpios = <&gpio3 16 GPIO_ACTIVE_LOW>; /* gpio3_80 HUB_NRESET */ 33 reset-gpios = <&gpio3 16 GPIO_ACTIVE_LOW>; /* gpio3_80 HUB_NRESET */
34 /** 34 clocks = <&auxclk1_ck>;
35 * FIXME 35 clock-names = "main_clk";
36 * Put the right clock phandle here when available
37 * clocks = <&auxclk1>;
38 * clock-names = "main_clk";
39 */
40 clock-frequency = <19200000>; 36 clock-frequency = <19200000>;
41 }; 37 };
42 38
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index a72813a9663e..757f0b9343c2 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -49,6 +49,12 @@
49 1000000 1060000 49 1000000 1060000
50 1500000 1250000 50 1500000 1250000
51 >; 51 >;
52
53 clocks = <&dpll_mpu_ck>;
54 clock-names = "cpu";
55
56 clock-latency = <300000>; /* From omap-cpufreq driver */
57
52 /* cooling options */ 58 /* cooling options */
53 cooling-min-level = <0>; 59 cooling-min-level = <0>;
54 cooling-max-level = <2>; 60 cooling-max-level = <2>;
@@ -353,6 +359,7 @@
353 compatible = "ti,omap4-hwspinlock"; 359 compatible = "ti,omap4-hwspinlock";
354 reg = <0x4a0f6000 0x1000>; 360 reg = <0x4a0f6000 0x1000>;
355 ti,hwmods = "spinlock"; 361 ti,hwmods = "spinlock";
362 #hwlock-cells = <1>;
356 }; 363 };
357 364
358 mcspi1: spi@48098000 { 365 mcspi1: spi@48098000 {
@@ -513,6 +520,21 @@
513 dma-names = "tx", "rx"; 520 dma-names = "tx", "rx";
514 }; 521 };
515 522
523 mmu_dsp: mmu@4a066000 {
524 compatible = "ti,omap4-iommu";
525 reg = <0x4a066000 0x100>;
526 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
527 ti,hwmods = "mmu_dsp";
528 };
529
530 mmu_ipu: mmu@55082000 {
531 compatible = "ti,omap4-iommu";
532 reg = <0x55082000 0x100>;
533 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
534 ti,hwmods = "mmu_ipu";
535 ti,iommu-bus-err-back;
536 };
537
516 keypad: keypad@4ae1c000 { 538 keypad: keypad@4ae1c000 {
517 compatible = "ti,omap4-keypad"; 539 compatible = "ti,omap4-keypad";
518 reg = <0x4ae1c000 0x400>; 540 reg = <0x4ae1c000 0x400>;
@@ -529,6 +551,7 @@
529 dmas = <&sdma 65>, 551 dmas = <&sdma 65>,
530 <&sdma 66>; 552 <&sdma 66>;
531 dma-names = "up_link", "dn_link"; 553 dma-names = "up_link", "dn_link";
554 status = "disabled";
532 }; 555 };
533 556
534 dmic: dmic@4012e000 { 557 dmic: dmic@4012e000 {
@@ -540,6 +563,7 @@
540 ti,hwmods = "dmic"; 563 ti,hwmods = "dmic";
541 dmas = <&sdma 67>; 564 dmas = <&sdma 67>;
542 dma-names = "up_link"; 565 dma-names = "up_link";
566 status = "disabled";
543 }; 567 };
544 568
545 mcbsp1: mcbsp@40122000 { 569 mcbsp1: mcbsp@40122000 {
@@ -554,6 +578,7 @@
554 dmas = <&sdma 33>, 578 dmas = <&sdma 33>,
555 <&sdma 34>; 579 <&sdma 34>;
556 dma-names = "tx", "rx"; 580 dma-names = "tx", "rx";
581 status = "disabled";
557 }; 582 };
558 583
559 mcbsp2: mcbsp@40124000 { 584 mcbsp2: mcbsp@40124000 {
@@ -568,6 +593,7 @@
568 dmas = <&sdma 17>, 593 dmas = <&sdma 17>,
569 <&sdma 18>; 594 <&sdma 18>;
570 dma-names = "tx", "rx"; 595 dma-names = "tx", "rx";
596 status = "disabled";
571 }; 597 };
572 598
573 mcbsp3: mcbsp@40126000 { 599 mcbsp3: mcbsp@40126000 {
@@ -582,6 +608,7 @@
582 dmas = <&sdma 19>, 608 dmas = <&sdma 19>,
583 <&sdma 20>; 609 <&sdma 20>;
584 dma-names = "tx", "rx"; 610 dma-names = "tx", "rx";
611 status = "disabled";
585 }; 612 };
586 613
587 timer1: timer@4ae18000 { 614 timer1: timer@4ae18000 {
@@ -683,6 +710,13 @@
683 ti,hwmods = "wd_timer2"; 710 ti,hwmods = "wd_timer2";
684 }; 711 };
685 712
713 dmm@4e000000 {
714 compatible = "ti,omap5-dmm";
715 reg = <0x4e000000 0x800>;
716 interrupts = <0 113 0x4>;
717 ti,hwmods = "dmm";
718 };
719
686 emif1: emif@4c000000 { 720 emif1: emif@4c000000 {
687 compatible = "ti,emif-4d5"; 721 compatible = "ti,emif-4d5";
688 ti,hwmods = "emif1"; 722 ti,hwmods = "emif1";
@@ -732,7 +766,8 @@
732 compatible = "snps,dwc3"; 766 compatible = "snps,dwc3";
733 reg = <0x4a030000 0x10000>; 767 reg = <0x4a030000 0x10000>;
734 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; 768 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
735 usb-phy = <&usb2_phy>, <&usb3_phy>; 769 phys = <&usb2_phy>, <&usb3_phy>;
770 phy-names = "usb2-phy", "usb3-phy";
736 dr_mode = "peripheral"; 771 dr_mode = "peripheral";
737 tx-fifo-resize; 772 tx-fifo-resize;
738 }; 773 };
@@ -749,6 +784,7 @@
749 compatible = "ti,omap-usb2"; 784 compatible = "ti,omap-usb2";
750 reg = <0x4a084000 0x7c>; 785 reg = <0x4a084000 0x7c>;
751 ctrl-module = <&omap_control_usb2phy>; 786 ctrl-module = <&omap_control_usb2phy>;
787 #phy-cells = <0>;
752 }; 788 };
753 789
754 usb3_phy: usb3phy@4a084400 { 790 usb3_phy: usb3phy@4a084400 {
@@ -758,6 +794,7 @@
758 <0x4a084c00 0x40>; 794 <0x4a084c00 0x40>;
759 reg-names = "phy_rx", "phy_tx", "pll_ctrl"; 795 reg-names = "phy_rx", "phy_tx", "pll_ctrl";
760 ctrl-module = <&omap_control_usb3phy>; 796 ctrl-module = <&omap_control_usb3phy>;
797 #phy-cells = <0>;
761 }; 798 };
762 }; 799 };
763 800
@@ -777,14 +814,14 @@
777 ranges; 814 ranges;
778 815
779 usbhsohci: ohci@4a064800 { 816 usbhsohci: ohci@4a064800 {
780 compatible = "ti,ohci-omap3", "usb-ohci"; 817 compatible = "ti,ohci-omap3";
781 reg = <0x4a064800 0x400>; 818 reg = <0x4a064800 0x400>;
782 interrupt-parent = <&gic>; 819 interrupt-parent = <&gic>;
783 interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; 820 interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
784 }; 821 };
785 822
786 usbhsehci: ehci@4a064c00 { 823 usbhsehci: ehci@4a064c00 {
787 compatible = "ti,ehci-omap", "usb-ehci"; 824 compatible = "ti,ehci-omap";
788 reg = <0x4a064c00 0x400>; 825 reg = <0x4a064c00 0x400>;
789 interrupt-parent = <&gic>; 826 interrupt-parent = <&gic>;
790 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; 827 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm/boot/dts/tps65910.dtsi b/arch/arm/boot/dts/tps65910.dtsi
index 92693a89160e..b0ac6657a170 100644
--- a/arch/arm/boot/dts/tps65910.dtsi
+++ b/arch/arm/boot/dts/tps65910.dtsi
@@ -82,5 +82,10 @@
82 reg = <12>; 82 reg = <12>;
83 regulator-compatible = "vmmc"; 83 regulator-compatible = "vmmc";
84 }; 84 };
85
86 vbb_reg: regulator@13 {
87 reg = <13>;
88 regulator-compatible = "vbb";
89 };
85 }; 90 };
86}; 91};
diff --git a/arch/arm/boot/dts/twl4030.dtsi b/arch/arm/boot/dts/twl4030.dtsi
index 4217096ee677..86cfc7d15ca7 100644
--- a/arch/arm/boot/dts/twl4030.dtsi
+++ b/arch/arm/boot/dts/twl4030.dtsi
@@ -145,4 +145,11 @@
145 compatible = "ti,twl4030-pwrbutton"; 145 compatible = "ti,twl4030-pwrbutton";
146 interrupts = <8>; 146 interrupts = <8>;
147 }; 147 };
148
149 twl_keypad: keypad {
150 compatible = "ti,twl4030-keypad";
151 interrupts = <1>;
152 keypad,num-rows = <8>;
153 keypad,num-columns = <8>;
154 };
148}; 155};
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-30 18:00:42 -0500