diff options
Diffstat (limited to 'arch/arm/boot')
-rw-r--r-- | arch/arm/boot/dts/Makefile | 4 | ||||
-rw-r--r-- | arch/arm/boot/dts/animeo_ip.dts | 166 | ||||
-rw-r--r-- | arch/arm/boot/dts/at91rm9200.dtsi | 349 | ||||
-rw-r--r-- | arch/arm/boot/dts/at91rm9200ek.dts | 79 | ||||
-rw-r--r-- | arch/arm/boot/dts/at91sam9260.dtsi | 132 | ||||
-rw-r--r-- | arch/arm/boot/dts/at91sam9263.dtsi | 78 | ||||
-rw-r--r-- | arch/arm/boot/dts/at91sam9263ek.dts | 5 | ||||
-rw-r--r-- | arch/arm/boot/dts/at91sam9g20ek_common.dtsi | 11 | ||||
-rw-r--r-- | arch/arm/boot/dts/at91sam9g45.dtsi | 92 | ||||
-rw-r--r-- | arch/arm/boot/dts/at91sam9m10g45ek.dts | 5 | ||||
-rw-r--r-- | arch/arm/boot/dts/at91sam9n12.dtsi | 62 | ||||
-rw-r--r-- | arch/arm/boot/dts/at91sam9x25.dtsi | 21 | ||||
-rw-r--r-- | arch/arm/boot/dts/at91sam9x5.dtsi | 100 | ||||
-rw-r--r-- | arch/arm/boot/dts/pm9g45.dts | 144 |
14 files changed, 1111 insertions, 137 deletions
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 4ffed9ae7292..fb5b07737ca7 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile | |||
@@ -1,7 +1,10 @@ | |||
1 | ifeq ($(CONFIG_OF),y) | 1 | ifeq ($(CONFIG_OF),y) |
2 | 2 | ||
3 | # Keep at91 dtb files sorted alphabetically for each SoC | 3 | # Keep at91 dtb files sorted alphabetically for each SoC |
4 | # rm9200 | ||
5 | dtb-$(CONFIG_ARCH_AT91) += at91rm9200ek.dtb | ||
4 | # sam9260 | 6 | # sam9260 |
7 | dtb-$(CONFIG_ARCH_AT91) += animeo_ip.dtb | ||
5 | dtb-$(CONFIG_ARCH_AT91) += aks-cdu.dtb | 8 | dtb-$(CONFIG_ARCH_AT91) += aks-cdu.dtb |
6 | dtb-$(CONFIG_ARCH_AT91) += ethernut5.dtb | 9 | dtb-$(CONFIG_ARCH_AT91) += ethernut5.dtb |
7 | dtb-$(CONFIG_ARCH_AT91) += evk-pro3.dtb | 10 | dtb-$(CONFIG_ARCH_AT91) += evk-pro3.dtb |
@@ -19,6 +22,7 @@ dtb-$(CONFIG_ARCH_AT91) += tny_a9g20.dtb | |||
19 | dtb-$(CONFIG_ARCH_AT91) += usb_a9g20.dtb | 22 | dtb-$(CONFIG_ARCH_AT91) += usb_a9g20.dtb |
20 | # sam9g45 | 23 | # sam9g45 |
21 | dtb-$(CONFIG_ARCH_AT91) += at91sam9m10g45ek.dtb | 24 | dtb-$(CONFIG_ARCH_AT91) += at91sam9m10g45ek.dtb |
25 | dtb-$(CONFIG_ARCH_AT91) += pm9g45.dtb | ||
22 | # sam9n12 | 26 | # sam9n12 |
23 | dtb-$(CONFIG_ARCH_AT91) += at91sam9n12ek.dtb | 27 | dtb-$(CONFIG_ARCH_AT91) += at91sam9n12ek.dtb |
24 | # sam9x5 | 28 | # sam9x5 |
diff --git a/arch/arm/boot/dts/animeo_ip.dts b/arch/arm/boot/dts/animeo_ip.dts new file mode 100644 index 000000000000..518baedaae05 --- /dev/null +++ b/arch/arm/boot/dts/animeo_ip.dts | |||
@@ -0,0 +1,166 @@ | |||
1 | /* | ||
2 | * animeo_ip.dts - Device Tree file for Somfy Animeo IP Boards | ||
3 | * | ||
4 | * Copyright (C) 2011-2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | ||
5 | * | ||
6 | * Licensed under GPLv2 only. | ||
7 | */ | ||
8 | |||
9 | /dts-v1/; | ||
10 | /include/ "at91sam9260.dtsi" | ||
11 | |||
12 | / { | ||
13 | model = "Somfy Animeo IP"; | ||
14 | compatible = "somfy,animeo-ip", "atmel,at91sam9260", "atmel,at91sam9"; | ||
15 | |||
16 | aliases { | ||
17 | serial0 = &usart1; | ||
18 | serial1 = &usart2; | ||
19 | serial2 = &usart0; | ||
20 | serial3 = &dbgu; | ||
21 | serial4 = &usart3; | ||
22 | serial5 = &uart0; | ||
23 | serial6 = &uart1; | ||
24 | }; | ||
25 | |||
26 | chosen { | ||
27 | linux,stdout-path = &usart2; | ||
28 | }; | ||
29 | |||
30 | memory { | ||
31 | reg = <0x20000000 0x4000000>; | ||
32 | }; | ||
33 | |||
34 | clocks { | ||
35 | #address-cells = <1>; | ||
36 | #size-cells = <1>; | ||
37 | ranges; | ||
38 | |||
39 | main_clock: clock@0 { | ||
40 | compatible = "atmel,osc", "fixed-clock"; | ||
41 | clock-frequency = <18432000>; | ||
42 | }; | ||
43 | }; | ||
44 | |||
45 | ahb { | ||
46 | apb { | ||
47 | usart0: serial@fffb0000 { | ||
48 | pinctrl-0 = <&pinctrl_usart0 &pinctrl_usart0_rts>; | ||
49 | linux,rs485-enabled-at-boot-time; | ||
50 | status = "okay"; | ||
51 | }; | ||
52 | |||
53 | usart1: serial@fffb4000 { | ||
54 | pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts>; | ||
55 | linux,rs485-enabled-at-boot-time; | ||
56 | status = "okay"; | ||
57 | }; | ||
58 | |||
59 | usart2: serial@fffb8000 { | ||
60 | pinctrl-0 = <&pinctrl_usart2>; | ||
61 | status = "okay"; | ||
62 | }; | ||
63 | |||
64 | macb0: ethernet@fffc4000 { | ||
65 | pinctrl-0 = <&pinctrl_macb_rmii &pinctrl_macb_rmii_mii>; | ||
66 | phy-mode = "mii"; | ||
67 | status = "okay"; | ||
68 | }; | ||
69 | }; | ||
70 | |||
71 | nand0: nand@40000000 { | ||
72 | nand-bus-width = <8>; | ||
73 | nand-ecc-mode = "soft"; | ||
74 | nand-on-flash-bbt; | ||
75 | status = "okay"; | ||
76 | |||
77 | at91bootstrap@0 { | ||
78 | label = "at91bootstrap"; | ||
79 | reg = <0x0 0x8000>; | ||
80 | }; | ||
81 | |||
82 | barebox@8000 { | ||
83 | label = "barebox"; | ||
84 | reg = <0x8000 0x40000>; | ||
85 | }; | ||
86 | |||
87 | bareboxenv@48000 { | ||
88 | label = "bareboxenv"; | ||
89 | reg = <0x48000 0x8000>; | ||
90 | }; | ||
91 | |||
92 | user_block@0x50000 { | ||
93 | label = "user_block"; | ||
94 | reg = <0x50000 0xb0000>; | ||
95 | }; | ||
96 | |||
97 | kernel@100000 { | ||
98 | label = "kernel"; | ||
99 | reg = <0x100000 0x1b0000>; | ||
100 | }; | ||
101 | |||
102 | root@2b0000 { | ||
103 | label = "root"; | ||
104 | reg = <0x2b0000 0x1D50000>; | ||
105 | }; | ||
106 | }; | ||
107 | |||
108 | usb0: ohci@00500000 { | ||
109 | num-ports = <2>; | ||
110 | atmel,vbus-gpio = <&pioB 15 1>; | ||
111 | status = "okay"; | ||
112 | }; | ||
113 | }; | ||
114 | |||
115 | leds { | ||
116 | compatible = "gpio-leds"; | ||
117 | |||
118 | power_green { | ||
119 | label = "power_green"; | ||
120 | gpios = <&pioC 17 0>; | ||
121 | linux,default-trigger = "heartbeat"; | ||
122 | }; | ||
123 | |||
124 | power_red { | ||
125 | label = "power_red"; | ||
126 | gpios = <&pioA 2 0>; | ||
127 | }; | ||
128 | |||
129 | tx_green { | ||
130 | label = "tx_green"; | ||
131 | gpios = <&pioC 19 0>; | ||
132 | }; | ||
133 | |||
134 | tx_red { | ||
135 | label = "tx_red"; | ||
136 | gpios = <&pioC 18 0>; | ||
137 | }; | ||
138 | }; | ||
139 | |||
140 | gpio_keys { | ||
141 | compatible = "gpio-keys"; | ||
142 | #address-cells = <1>; | ||
143 | #size-cells = <0>; | ||
144 | |||
145 | keyswitch_in { | ||
146 | label = "keyswitch_in"; | ||
147 | gpios = <&pioB 1 0>; | ||
148 | linux,code = <28>; | ||
149 | gpio-key,wakeup; | ||
150 | }; | ||
151 | |||
152 | error_in { | ||
153 | label = "error_in"; | ||
154 | gpios = <&pioB 2 0>; | ||
155 | linux,code = <29>; | ||
156 | gpio-key,wakeup; | ||
157 | }; | ||
158 | |||
159 | btn { | ||
160 | label = "btn"; | ||
161 | gpios = <&pioC 23 0>; | ||
162 | linux,code = <31>; | ||
163 | gpio-key,wakeup; | ||
164 | }; | ||
165 | }; | ||
166 | }; | ||
diff --git a/arch/arm/boot/dts/at91rm9200.dtsi b/arch/arm/boot/dts/at91rm9200.dtsi new file mode 100644 index 000000000000..e154f242c680 --- /dev/null +++ b/arch/arm/boot/dts/at91rm9200.dtsi | |||
@@ -0,0 +1,349 @@ | |||
1 | /* | ||
2 | * at91rm9200.dtsi - Device Tree Include file for AT91RM9200 family SoC | ||
3 | * | ||
4 | * Copyright (C) 2011 Atmel, | ||
5 | * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>, | ||
6 | * 2012 Joachim Eastwood <manabian@gmail.com> | ||
7 | * | ||
8 | * Based on at91sam9260.dtsi | ||
9 | * | ||
10 | * Licensed under GPLv2 or later. | ||
11 | */ | ||
12 | |||
13 | /include/ "skeleton.dtsi" | ||
14 | |||
15 | / { | ||
16 | model = "Atmel AT91RM9200 family SoC"; | ||
17 | compatible = "atmel,at91rm9200"; | ||
18 | interrupt-parent = <&aic>; | ||
19 | |||
20 | aliases { | ||
21 | serial0 = &dbgu; | ||
22 | serial1 = &usart0; | ||
23 | serial2 = &usart1; | ||
24 | serial3 = &usart2; | ||
25 | serial4 = &usart3; | ||
26 | gpio0 = &pioA; | ||
27 | gpio1 = &pioB; | ||
28 | gpio2 = &pioC; | ||
29 | gpio3 = &pioD; | ||
30 | tcb0 = &tcb0; | ||
31 | tcb1 = &tcb1; | ||
32 | }; | ||
33 | cpus { | ||
34 | cpu@0 { | ||
35 | compatible = "arm,arm920t"; | ||
36 | }; | ||
37 | }; | ||
38 | |||
39 | memory { | ||
40 | reg = <0x20000000 0x04000000>; | ||
41 | }; | ||
42 | |||
43 | ahb { | ||
44 | compatible = "simple-bus"; | ||
45 | #address-cells = <1>; | ||
46 | #size-cells = <1>; | ||
47 | ranges; | ||
48 | |||
49 | apb { | ||
50 | compatible = "simple-bus"; | ||
51 | #address-cells = <1>; | ||
52 | #size-cells = <1>; | ||
53 | ranges; | ||
54 | |||
55 | aic: interrupt-controller@fffff000 { | ||
56 | #interrupt-cells = <3>; | ||
57 | compatible = "atmel,at91rm9200-aic"; | ||
58 | interrupt-controller; | ||
59 | reg = <0xfffff000 0x200>; | ||
60 | atmel,external-irqs = <25 26 27 28 29 30 31>; | ||
61 | }; | ||
62 | |||
63 | ramc0: ramc@ffffff00 { | ||
64 | compatible = "atmel,at91rm9200-sdramc"; | ||
65 | reg = <0xffffff00 0x100>; | ||
66 | }; | ||
67 | |||
68 | pmc: pmc@fffffc00 { | ||
69 | compatible = "atmel,at91rm9200-pmc"; | ||
70 | reg = <0xfffffc00 0x100>; | ||
71 | }; | ||
72 | |||
73 | st: timer@fffffd00 { | ||
74 | compatible = "atmel,at91rm9200-st"; | ||
75 | reg = <0xfffffd00 0x100>; | ||
76 | interrupts = <1 4 7>; | ||
77 | }; | ||
78 | |||
79 | tcb0: timer@fffa0000 { | ||
80 | compatible = "atmel,at91rm9200-tcb"; | ||
81 | reg = <0xfffa0000 0x100>; | ||
82 | interrupts = <17 4 0 18 4 0 19 4 0>; | ||
83 | }; | ||
84 | |||
85 | tcb1: timer@fffa4000 { | ||
86 | compatible = "atmel,at91rm9200-tcb"; | ||
87 | reg = <0xfffa4000 0x100>; | ||
88 | interrupts = <20 4 0 21 4 0 22 4 0>; | ||
89 | }; | ||
90 | |||
91 | pinctrl@fffff400 { | ||
92 | #address-cells = <1>; | ||
93 | #size-cells = <1>; | ||
94 | compatible = "atmel,at91rm9200-pinctrl", "simple-bus"; | ||
95 | ranges = <0xfffff400 0xfffff400 0x800>; | ||
96 | |||
97 | atmel,mux-mask = < | ||
98 | /* A B */ | ||
99 | 0xffffffff 0xffffffff /* pioA */ | ||
100 | 0xffffffff 0x083fffff /* pioB */ | ||
101 | 0xffff3fff 0x00000000 /* pioC */ | ||
102 | 0x03ff87ff 0x0fffff80 /* pioD */ | ||
103 | >; | ||
104 | |||
105 | /* shared pinctrl settings */ | ||
106 | dbgu { | ||
107 | pinctrl_dbgu: dbgu-0 { | ||
108 | atmel,pins = | ||
109 | <0 30 0x1 0x0 /* PA30 periph A */ | ||
110 | 0 31 0x1 0x1>; /* PA31 periph with pullup */ | ||
111 | }; | ||
112 | }; | ||
113 | |||
114 | uart0 { | ||
115 | pinctrl_uart0: uart0-0 { | ||
116 | atmel,pins = | ||
117 | <0 17 0x1 0x0 /* PA17 periph A */ | ||
118 | 0 18 0x1 0x0>; /* PA18 periph A */ | ||
119 | }; | ||
120 | |||
121 | pinctrl_uart0_rts: uart0_rts-0 { | ||
122 | atmel,pins = | ||
123 | <0 20 0x1 0x0>; /* PA20 periph A */ | ||
124 | }; | ||
125 | |||
126 | pinctrl_uart0_cts: uart0_cts-0 { | ||
127 | atmel,pins = | ||
128 | <0 21 0x1 0x0>; /* PA21 periph A */ | ||
129 | }; | ||
130 | }; | ||
131 | |||
132 | uart1 { | ||
133 | pinctrl_uart1: uart1-0 { | ||
134 | atmel,pins = | ||
135 | <1 20 0x1 0x1 /* PB20 periph A with pullup */ | ||
136 | 1 21 0x1 0x0>; /* PB21 periph A */ | ||
137 | }; | ||
138 | |||
139 | pinctrl_uart1_rts: uart1_rts-0 { | ||
140 | atmel,pins = | ||
141 | <1 24 0x1 0x0>; /* PB24 periph A */ | ||
142 | }; | ||
143 | |||
144 | pinctrl_uart1_cts: uart1_cts-0 { | ||
145 | atmel,pins = | ||
146 | <1 26 0x1 0x0>; /* PB26 periph A */ | ||
147 | }; | ||
148 | |||
149 | pinctrl_uart1_dtr_dsr: uart1_dtr_dsr-0 { | ||
150 | atmel,pins = | ||
151 | <1 19 0x1 0x0 /* PB19 periph A */ | ||
152 | 1 25 0x1 0x0>; /* PB25 periph A */ | ||
153 | }; | ||
154 | |||
155 | pinctrl_uart1_dcd: uart1_dcd-0 { | ||
156 | atmel,pins = | ||
157 | <1 23 0x1 0x0>; /* PB23 periph A */ | ||
158 | }; | ||
159 | |||
160 | pinctrl_uart1_ri: uart1_ri-0 { | ||
161 | atmel,pins = | ||
162 | <1 18 0x1 0x0>; /* PB18 periph A */ | ||
163 | }; | ||
164 | }; | ||
165 | |||
166 | uart2 { | ||
167 | pinctrl_uart2: uart2-0 { | ||
168 | atmel,pins = | ||
169 | <0 22 0x1 0x0 /* PA22 periph A */ | ||
170 | 0 23 0x1 0x1>; /* PA23 periph A with pullup */ | ||
171 | }; | ||
172 | |||
173 | pinctrl_uart2_rts: uart2_rts-0 { | ||
174 | atmel,pins = | ||
175 | <0 30 0x2 0x0>; /* PA30 periph B */ | ||
176 | }; | ||
177 | |||
178 | pinctrl_uart2_cts: uart2_cts-0 { | ||
179 | atmel,pins = | ||
180 | <0 31 0x2 0x0>; /* PA31 periph B */ | ||
181 | }; | ||
182 | }; | ||
183 | |||
184 | uart3 { | ||
185 | pinctrl_uart3: uart3-0 { | ||
186 | atmel,pins = | ||
187 | <0 5 0x2 0x1 /* PA5 periph B with pullup */ | ||
188 | 0 6 0x2 0x0>; /* PA6 periph B */ | ||
189 | }; | ||
190 | |||
191 | pinctrl_uart3_rts: uart3_rts-0 { | ||
192 | atmel,pins = | ||
193 | <1 0 0x2 0x0>; /* PB0 periph B */ | ||
194 | }; | ||
195 | |||
196 | pinctrl_uart3_cts: uart3_cts-0 { | ||
197 | atmel,pins = | ||
198 | <1 1 0x2 0x0>; /* PB1 periph B */ | ||
199 | }; | ||
200 | }; | ||
201 | |||
202 | nand { | ||
203 | pinctrl_nand: nand-0 { | ||
204 | atmel,pins = | ||
205 | <2 2 0x0 0x1 /* PC2 gpio RDY pin pull_up */ | ||
206 | 1 1 0x0 0x1>; /* PB1 gpio CD pin pull_up */ | ||
207 | }; | ||
208 | }; | ||
209 | |||
210 | pioA: gpio@fffff400 { | ||
211 | compatible = "atmel,at91rm9200-gpio"; | ||
212 | reg = <0xfffff400 0x200>; | ||
213 | interrupts = <2 4 1>; | ||
214 | #gpio-cells = <2>; | ||
215 | gpio-controller; | ||
216 | interrupt-controller; | ||
217 | #interrupt-cells = <2>; | ||
218 | }; | ||
219 | |||
220 | pioB: gpio@fffff600 { | ||
221 | compatible = "atmel,at91rm9200-gpio"; | ||
222 | reg = <0xfffff600 0x200>; | ||
223 | interrupts = <3 4 1>; | ||
224 | #gpio-cells = <2>; | ||
225 | gpio-controller; | ||
226 | interrupt-controller; | ||
227 | #interrupt-cells = <2>; | ||
228 | }; | ||
229 | |||
230 | pioC: gpio@fffff800 { | ||
231 | compatible = "atmel,at91rm9200-gpio"; | ||
232 | reg = <0xfffff800 0x200>; | ||
233 | interrupts = <4 4 1>; | ||
234 | #gpio-cells = <2>; | ||
235 | gpio-controller; | ||
236 | interrupt-controller; | ||
237 | #interrupt-cells = <2>; | ||
238 | }; | ||
239 | |||
240 | pioD: gpio@fffffa00 { | ||
241 | compatible = "atmel,at91rm9200-gpio"; | ||
242 | reg = <0xfffffa00 0x200>; | ||
243 | interrupts = <5 4 1>; | ||
244 | #gpio-cells = <2>; | ||
245 | gpio-controller; | ||
246 | interrupt-controller; | ||
247 | #interrupt-cells = <2>; | ||
248 | }; | ||
249 | }; | ||
250 | |||
251 | dbgu: serial@fffff200 { | ||
252 | compatible = "atmel,at91rm9200-usart"; | ||
253 | reg = <0xfffff200 0x200>; | ||
254 | interrupts = <1 4 7>; | ||
255 | pinctrl-names = "default"; | ||
256 | pinctrl-0 = <&pinctrl_dbgu>; | ||
257 | status = "disabled"; | ||
258 | }; | ||
259 | |||
260 | usart0: serial@fffc0000 { | ||
261 | compatible = "atmel,at91rm9200-usart"; | ||
262 | reg = <0xfffc0000 0x200>; | ||
263 | interrupts = <6 4 5>; | ||
264 | atmel,use-dma-rx; | ||
265 | atmel,use-dma-tx; | ||
266 | pinctrl-names = "default"; | ||
267 | pinctrl-0 = <&pinctrl_uart0>; | ||
268 | status = "disabled"; | ||
269 | }; | ||
270 | |||
271 | usart1: serial@fffc4000 { | ||
272 | compatible = "atmel,at91rm9200-usart"; | ||
273 | reg = <0xfffc4000 0x200>; | ||
274 | interrupts = <7 4 5>; | ||
275 | atmel,use-dma-rx; | ||
276 | atmel,use-dma-tx; | ||
277 | pinctrl-names = "default"; | ||
278 | pinctrl-0 = <&pinctrl_uart1>; | ||
279 | status = "disabled"; | ||
280 | }; | ||
281 | |||
282 | usart2: serial@fffc8000 { | ||
283 | compatible = "atmel,at91rm9200-usart"; | ||
284 | reg = <0xfffc8000 0x200>; | ||
285 | interrupts = <8 4 5>; | ||
286 | atmel,use-dma-rx; | ||
287 | atmel,use-dma-tx; | ||
288 | pinctrl-names = "default"; | ||
289 | pinctrl-0 = <&pinctrl_uart2>; | ||
290 | status = "disabled"; | ||
291 | }; | ||
292 | |||
293 | usart3: serial@fffcc000 { | ||
294 | compatible = "atmel,at91rm9200-usart"; | ||
295 | reg = <0xfffcc000 0x200>; | ||
296 | interrupts = <23 4 5>; | ||
297 | atmel,use-dma-rx; | ||
298 | atmel,use-dma-tx; | ||
299 | pinctrl-names = "default"; | ||
300 | pinctrl-0 = <&pinctrl_uart3>; | ||
301 | status = "disabled"; | ||
302 | }; | ||
303 | |||
304 | usb1: gadget@fffb0000 { | ||
305 | compatible = "atmel,at91rm9200-udc"; | ||
306 | reg = <0xfffb0000 0x4000>; | ||
307 | interrupts = <11 4 2>; | ||
308 | status = "disabled"; | ||
309 | }; | ||
310 | }; | ||
311 | |||
312 | nand0: nand@40000000 { | ||
313 | compatible = "atmel,at91rm9200-nand"; | ||
314 | #address-cells = <1>; | ||
315 | #size-cells = <1>; | ||
316 | reg = <0x40000000 0x10000000>; | ||
317 | atmel,nand-addr-offset = <21>; | ||
318 | atmel,nand-cmd-offset = <22>; | ||
319 | pinctrl-names = "default"; | ||
320 | pinctrl-0 = <&pinctrl_nand>; | ||
321 | nand-ecc-mode = "soft"; | ||
322 | gpios = <&pioC 2 0 | ||
323 | 0 | ||
324 | &pioB 1 0 | ||
325 | >; | ||
326 | status = "disabled"; | ||
327 | }; | ||
328 | |||
329 | usb0: ohci@00300000 { | ||
330 | compatible = "atmel,at91rm9200-ohci", "usb-ohci"; | ||
331 | reg = <0x00300000 0x100000>; | ||
332 | interrupts = <23 4 2>; | ||
333 | status = "disabled"; | ||
334 | }; | ||
335 | }; | ||
336 | |||
337 | i2c@0 { | ||
338 | compatible = "i2c-gpio"; | ||
339 | gpios = <&pioA 23 0 /* sda */ | ||
340 | &pioA 24 0 /* scl */ | ||
341 | >; | ||
342 | i2c-gpio,sda-open-drain; | ||
343 | i2c-gpio,scl-open-drain; | ||
344 | i2c-gpio,delay-us = <2>; /* ~100 kHz */ | ||
345 | #address-cells = <1>; | ||
346 | #size-cells = <0>; | ||
347 | status = "disabled"; | ||
348 | }; | ||
349 | }; | ||
diff --git a/arch/arm/boot/dts/at91rm9200ek.dts b/arch/arm/boot/dts/at91rm9200ek.dts new file mode 100644 index 000000000000..8aa48931e0a2 --- /dev/null +++ b/arch/arm/boot/dts/at91rm9200ek.dts | |||
@@ -0,0 +1,79 @@ | |||
1 | /* | ||
2 | * at91rm9200ek.dts - Device Tree file for Atmel AT91RM9200 evaluation kit | ||
3 | * | ||
4 | * Copyright (C) 2012 Joachim Eastwood <manabian@gmail.com> | ||
5 | * | ||
6 | * Licensed under GPLv2 only | ||
7 | */ | ||
8 | /dts-v1/; | ||
9 | /include/ "at91rm9200.dtsi" | ||
10 | |||
11 | / { | ||
12 | model = "Atmel AT91RM9200 evaluation kit"; | ||
13 | compatible = "atmel,at91rm9200ek", "atmel,at91rm9200"; | ||
14 | |||
15 | memory { | ||
16 | reg = <0x20000000 0x4000000>; | ||
17 | }; | ||
18 | |||
19 | clocks { | ||
20 | #address-cells = <1>; | ||
21 | #size-cells = <1>; | ||
22 | ranges; | ||
23 | |||
24 | main_clock: clock@0 { | ||
25 | compatible = "atmel,osc", "fixed-clock"; | ||
26 | clock-frequency = <18432000>; | ||
27 | }; | ||
28 | }; | ||
29 | |||
30 | ahb { | ||
31 | apb { | ||
32 | dbgu: serial@fffff200 { | ||
33 | status = "okay"; | ||
34 | }; | ||
35 | |||
36 | usart1: serial@fffc4000 { | ||
37 | pinctrl-0 = | ||
38 | <&pinctrl_uart1 | ||
39 | &pinctrl_uart1_rts | ||
40 | &pinctrl_uart1_cts | ||
41 | &pinctrl_uart1_dtr_dsr | ||
42 | &pinctrl_uart1_dcd | ||
43 | &pinctrl_uart1_ri>; | ||
44 | status = "okay"; | ||
45 | }; | ||
46 | |||
47 | usb1: gadget@fffb0000 { | ||
48 | atmel,vbus-gpio = <&pioD 4 0>; | ||
49 | status = "okay"; | ||
50 | }; | ||
51 | }; | ||
52 | |||
53 | usb0: ohci@00300000 { | ||
54 | num-ports = <2>; | ||
55 | status = "okay"; | ||
56 | }; | ||
57 | }; | ||
58 | |||
59 | leds { | ||
60 | compatible = "gpio-leds"; | ||
61 | |||
62 | ds2 { | ||
63 | label = "green"; | ||
64 | gpios = <&pioB 0 0x1>; | ||
65 | linux,default-trigger = "mmc0"; | ||
66 | }; | ||
67 | |||
68 | ds4 { | ||
69 | label = "yellow"; | ||
70 | gpios = <&pioB 1 0x1>; | ||
71 | linux,default-trigger = "heartbeat"; | ||
72 | }; | ||
73 | |||
74 | ds6 { | ||
75 | label = "red"; | ||
76 | gpios = <&pioB 2 0x1>; | ||
77 | }; | ||
78 | }; | ||
79 | }; | ||
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi index 9a24ffbb7231..a5d94606e15d 100644 --- a/arch/arm/boot/dts/at91sam9260.dtsi +++ b/arch/arm/boot/dts/at91sam9260.dtsi | |||
@@ -21,8 +21,8 @@ | |||
21 | serial2 = &usart1; | 21 | serial2 = &usart1; |
22 | serial3 = &usart2; | 22 | serial3 = &usart2; |
23 | serial4 = &usart3; | 23 | serial4 = &usart3; |
24 | serial5 = &usart4; | 24 | serial5 = &uart0; |
25 | serial6 = &usart5; | 25 | serial6 = &uart1; |
26 | gpio0 = &pioA; | 26 | gpio0 = &pioA; |
27 | gpio1 = &pioB; | 27 | gpio1 = &pioB; |
28 | gpio2 = &pioC; | 28 | gpio2 = &pioC; |
@@ -120,88 +120,104 @@ | |||
120 | }; | 120 | }; |
121 | }; | 121 | }; |
122 | 122 | ||
123 | uart0 { | 123 | usart0 { |
124 | pinctrl_uart0: uart0-0 { | 124 | pinctrl_usart0: usart0-0 { |
125 | atmel,pins = | 125 | atmel,pins = |
126 | <1 4 0x1 0x0 /* PB4 periph A */ | 126 | <1 4 0x1 0x0 /* PB4 periph A */ |
127 | 1 5 0x1 0x0>; /* PB5 periph A */ | 127 | 1 5 0x1 0x0>; /* PB5 periph A */ |
128 | }; | 128 | }; |
129 | 129 | ||
130 | pinctrl_uart0_rts_cts: uart0_rts_cts-0 { | 130 | pinctrl_usart0_rts: usart0_rts-0 { |
131 | atmel,pins = | ||
132 | <1 26 0x1 0x0>; /* PB26 periph A */ | ||
133 | }; | ||
134 | |||
135 | pinctrl_usart0_cts: usart0_cts-0 { | ||
131 | atmel,pins = | 136 | atmel,pins = |
132 | <1 26 0x1 0x0 /* PB26 periph A */ | 137 | <1 27 0x1 0x0>; /* PB27 periph A */ |
133 | 1 27 0x1 0x0>; /* PB27 periph A */ | ||
134 | }; | 138 | }; |
135 | 139 | ||
136 | pinctrl_uart0_dtr_dsr: uart0_dtr_dsr-0 { | 140 | pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 { |
137 | atmel,pins = | 141 | atmel,pins = |
138 | <1 24 0x1 0x0 /* PB24 periph A */ | 142 | <1 24 0x1 0x0 /* PB24 periph A */ |
139 | 1 22 0x1 0x0>; /* PB22 periph A */ | 143 | 1 22 0x1 0x0>; /* PB22 periph A */ |
140 | }; | 144 | }; |
141 | 145 | ||
142 | pinctrl_uart0_dcd: uart0_dcd-0 { | 146 | pinctrl_usart0_dcd: usart0_dcd-0 { |
143 | atmel,pins = | 147 | atmel,pins = |
144 | <1 23 0x1 0x0>; /* PB23 periph A */ | 148 | <1 23 0x1 0x0>; /* PB23 periph A */ |
145 | }; | 149 | }; |
146 | 150 | ||
147 | pinctrl_uart0_ri: uart0_ri-0 { | 151 | pinctrl_usart0_ri: usart0_ri-0 { |
148 | atmel,pins = | 152 | atmel,pins = |
149 | <1 25 0x1 0x0>; /* PB25 periph A */ | 153 | <1 25 0x1 0x0>; /* PB25 periph A */ |
150 | }; | 154 | }; |
151 | }; | 155 | }; |
152 | 156 | ||
153 | uart1 { | 157 | usart1 { |
154 | pinctrl_uart1: uart1-0 { | 158 | pinctrl_usart1: usart1-0 { |
155 | atmel,pins = | 159 | atmel,pins = |
156 | <2 6 0x1 0x1 /* PB6 periph A with pullup */ | 160 | <2 6 0x1 0x1 /* PB6 periph A with pullup */ |
157 | 2 7 0x1 0x0>; /* PB7 periph A */ | 161 | 2 7 0x1 0x0>; /* PB7 periph A */ |
158 | }; | 162 | }; |
159 | 163 | ||
160 | pinctrl_uart1_rts_cts: uart1_rts_cts-0 { | 164 | pinctrl_usart1_rts: usart1_rts-0 { |
165 | atmel,pins = | ||
166 | <1 28 0x1 0x0>; /* PB28 periph A */ | ||
167 | }; | ||
168 | |||
169 | pinctrl_usart1_cts: usart1_cts-0 { | ||
161 | atmel,pins = | 170 | atmel,pins = |
162 | <1 28 0x1 0x0 /* PB28 periph A */ | 171 | <1 29 0x1 0x0>; /* PB29 periph A */ |
163 | 1 29 0x1 0x0>; /* PB29 periph A */ | ||
164 | }; | 172 | }; |
165 | }; | 173 | }; |
166 | 174 | ||
167 | uart2 { | 175 | usart2 { |
168 | pinctrl_uart2: uart2-0 { | 176 | pinctrl_usart2: usart2-0 { |
169 | atmel,pins = | 177 | atmel,pins = |
170 | <1 8 0x1 0x1 /* PB8 periph A with pullup */ | 178 | <1 8 0x1 0x1 /* PB8 periph A with pullup */ |
171 | 1 9 0x1 0x0>; /* PB9 periph A */ | 179 | 1 9 0x1 0x0>; /* PB9 periph A */ |
172 | }; | 180 | }; |
173 | 181 | ||
174 | pinctrl_uart2_rts_cts: uart2_rts_cts-0 { | 182 | pinctrl_usart2_rts: usart2_rts-0 { |
175 | atmel,pins = | 183 | atmel,pins = |
176 | <0 4 0x1 0x0 /* PA4 periph A */ | 184 | <0 4 0x1 0x0>; /* PA4 periph A */ |
177 | 0 5 0x1 0x0>; /* PA5 periph A */ | 185 | }; |
186 | |||
187 | pinctrl_usart2_cts: usart2_cts-0 { | ||
188 | atmel,pins = | ||
189 | <0 5 0x1 0x0>; /* PA5 periph A */ | ||
178 | }; | 190 | }; |
179 | }; | 191 | }; |
180 | 192 | ||
181 | uart3 { | 193 | usart3 { |
182 | pinctrl_uart3: uart3-0 { | 194 | pinctrl_usart3: usart3-0 { |
183 | atmel,pins = | 195 | atmel,pins = |
184 | <2 10 0x1 0x1 /* PB10 periph A with pullup */ | 196 | <2 10 0x1 0x1 /* PB10 periph A with pullup */ |
185 | 2 11 0x1 0x0>; /* PB11 periph A */ | 197 | 2 11 0x1 0x0>; /* PB11 periph A */ |
186 | }; | 198 | }; |
187 | 199 | ||
188 | pinctrl_uart3_rts_cts: uart3_rts_cts-0 { | 200 | pinctrl_usart3_rts: usart3_rts-0 { |
189 | atmel,pins = | 201 | atmel,pins = |
190 | <3 8 0x2 0x0 /* PB8 periph B */ | 202 | <3 8 0x2 0x0>; /* PB8 periph B */ |
191 | 3 10 0x2 0x0>; /* PB10 periph B */ | 203 | }; |
204 | |||
205 | pinctrl_usart3_cts: usart3_cts-0 { | ||
206 | atmel,pins = | ||
207 | <3 10 0x2 0x0>; /* PB10 periph B */ | ||
192 | }; | 208 | }; |
193 | }; | 209 | }; |
194 | 210 | ||
195 | uart4 { | 211 | uart0 { |
196 | pinctrl_uart4: uart4-0 { | 212 | pinctrl_uart0: uart0-0 { |
197 | atmel,pins = | 213 | atmel,pins = |
198 | <0 31 0x2 0x1 /* PA31 periph B with pullup */ | 214 | <0 31 0x2 0x1 /* PA31 periph B with pullup */ |
199 | 0 30 0x2 0x0>; /* PA30 periph B */ | 215 | 0 30 0x2 0x0>; /* PA30 periph B */ |
200 | }; | 216 | }; |
201 | }; | 217 | }; |
202 | 218 | ||
203 | uart5 { | 219 | uart1 { |
204 | pinctrl_uart5: uart5-0 { | 220 | pinctrl_uart1: uart1-0 { |
205 | atmel,pins = | 221 | atmel,pins = |
206 | <2 12 0x1 0x1 /* PB12 periph A with pullup */ | 222 | <2 12 0x1 0x1 /* PB12 periph A with pullup */ |
207 | 2 13 0x1 0x0>; /* PB13 periph A */ | 223 | 2 13 0x1 0x0>; /* PB13 periph A */ |
@@ -216,6 +232,46 @@ | |||
216 | }; | 232 | }; |
217 | }; | 233 | }; |
218 | 234 | ||
235 | macb { | ||
236 | pinctrl_macb_rmii: macb_rmii-0 { | ||
237 | atmel,pins = | ||
238 | <0 12 0x1 0x0 /* PA12 periph A */ | ||
239 | 0 13 0x1 0x0 /* PA13 periph A */ | ||
240 | 0 14 0x1 0x0 /* PA14 periph A */ | ||
241 | 0 15 0x1 0x0 /* PA15 periph A */ | ||
242 | 0 16 0x1 0x0 /* PA16 periph A */ | ||
243 | 0 17 0x1 0x0 /* PA17 periph A */ | ||
244 | 0 18 0x1 0x0 /* PA18 periph A */ | ||
245 | 0 19 0x1 0x0 /* PA19 periph A */ | ||
246 | 0 20 0x1 0x0 /* PA20 periph A */ | ||
247 | 0 21 0x1 0x0>; /* PA21 periph A */ | ||
248 | }; | ||
249 | |||
250 | pinctrl_macb_rmii_mii: macb_rmii_mii-0 { | ||
251 | atmel,pins = | ||
252 | <0 22 0x2 0x0 /* PA22 periph B */ | ||
253 | 0 23 0x2 0x0 /* PA23 periph B */ | ||
254 | 0 24 0x2 0x0 /* PA24 periph B */ | ||
255 | 0 25 0x2 0x0 /* PA25 periph B */ | ||
256 | 0 26 0x2 0x0 /* PA26 periph B */ | ||
257 | 0 27 0x2 0x0 /* PA27 periph B */ | ||
258 | 0 28 0x2 0x0 /* PA28 periph B */ | ||
259 | 0 29 0x2 0x0>; /* PA29 periph B */ | ||
260 | }; | ||
261 | |||
262 | pinctrl_macb_rmii_mii_alt: macb_rmii_mii-1 { | ||
263 | atmel,pins = | ||
264 | <0 10 0x2 0x0 /* PA10 periph B */ | ||
265 | 0 11 0x2 0x0 /* PA11 periph B */ | ||
266 | 0 24 0x2 0x0 /* PA24 periph B */ | ||
267 | 0 25 0x2 0x0 /* PA25 periph B */ | ||
268 | 0 26 0x2 0x0 /* PA26 periph B */ | ||
269 | 0 27 0x2 0x0 /* PA27 periph B */ | ||
270 | 0 28 0x2 0x0 /* PA28 periph B */ | ||
271 | 0 29 0x2 0x0>; /* PA29 periph B */ | ||
272 | }; | ||
273 | }; | ||
274 | |||
219 | pioA: gpio@fffff400 { | 275 | pioA: gpio@fffff400 { |
220 | compatible = "atmel,at91rm9200-gpio"; | 276 | compatible = "atmel,at91rm9200-gpio"; |
221 | reg = <0xfffff400 0x200>; | 277 | reg = <0xfffff400 0x200>; |
@@ -263,7 +319,7 @@ | |||
263 | atmel,use-dma-rx; | 319 | atmel,use-dma-rx; |
264 | atmel,use-dma-tx; | 320 | atmel,use-dma-tx; |
265 | pinctrl-names = "default"; | 321 | pinctrl-names = "default"; |
266 | pinctrl-0 = <&pinctrl_uart0>; | 322 | pinctrl-0 = <&pinctrl_usart0>; |
267 | status = "disabled"; | 323 | status = "disabled"; |
268 | }; | 324 | }; |
269 | 325 | ||
@@ -274,7 +330,7 @@ | |||
274 | atmel,use-dma-rx; | 330 | atmel,use-dma-rx; |
275 | atmel,use-dma-tx; | 331 | atmel,use-dma-tx; |
276 | pinctrl-names = "default"; | 332 | pinctrl-names = "default"; |
277 | pinctrl-0 = <&pinctrl_uart1>; | 333 | pinctrl-0 = <&pinctrl_usart1>; |
278 | status = "disabled"; | 334 | status = "disabled"; |
279 | }; | 335 | }; |
280 | 336 | ||
@@ -285,7 +341,7 @@ | |||
285 | atmel,use-dma-rx; | 341 | atmel,use-dma-rx; |
286 | atmel,use-dma-tx; | 342 | atmel,use-dma-tx; |
287 | pinctrl-names = "default"; | 343 | pinctrl-names = "default"; |
288 | pinctrl-0 = <&pinctrl_uart2>; | 344 | pinctrl-0 = <&pinctrl_usart2>; |
289 | status = "disabled"; | 345 | status = "disabled"; |
290 | }; | 346 | }; |
291 | 347 | ||
@@ -296,29 +352,29 @@ | |||
296 | atmel,use-dma-rx; | 352 | atmel,use-dma-rx; |
297 | atmel,use-dma-tx; | 353 | atmel,use-dma-tx; |
298 | pinctrl-names = "default"; | 354 | pinctrl-names = "default"; |
299 | pinctrl-0 = <&pinctrl_uart3>; | 355 | pinctrl-0 = <&pinctrl_usart3>; |
300 | status = "disabled"; | 356 | status = "disabled"; |
301 | }; | 357 | }; |
302 | 358 | ||
303 | usart4: serial@fffd4000 { | 359 | uart0: serial@fffd4000 { |
304 | compatible = "atmel,at91sam9260-usart"; | 360 | compatible = "atmel,at91sam9260-usart"; |
305 | reg = <0xfffd4000 0x200>; | 361 | reg = <0xfffd4000 0x200>; |
306 | interrupts = <24 4 5>; | 362 | interrupts = <24 4 5>; |
307 | atmel,use-dma-rx; | 363 | atmel,use-dma-rx; |
308 | atmel,use-dma-tx; | 364 | atmel,use-dma-tx; |
309 | pinctrl-names = "default"; | 365 | pinctrl-names = "default"; |
310 | pinctrl-0 = <&pinctrl_uart4>; | 366 | pinctrl-0 = <&pinctrl_uart0>; |
311 | status = "disabled"; | 367 | status = "disabled"; |
312 | }; | 368 | }; |
313 | 369 | ||
314 | usart5: serial@fffd8000 { | 370 | uart1: serial@fffd8000 { |
315 | compatible = "atmel,at91sam9260-usart"; | 371 | compatible = "atmel,at91sam9260-usart"; |
316 | reg = <0xfffd8000 0x200>; | 372 | reg = <0xfffd8000 0x200>; |
317 | interrupts = <25 4 5>; | 373 | interrupts = <25 4 5>; |
318 | atmel,use-dma-rx; | 374 | atmel,use-dma-rx; |
319 | atmel,use-dma-tx; | 375 | atmel,use-dma-tx; |
320 | pinctrl-names = "default"; | 376 | pinctrl-names = "default"; |
321 | pinctrl-0 = <&pinctrl_uart5>; | 377 | pinctrl-0 = <&pinctrl_uart1>; |
322 | status = "disabled"; | 378 | status = "disabled"; |
323 | }; | 379 | }; |
324 | 380 | ||
@@ -326,6 +382,8 @@ | |||
326 | compatible = "cdns,at32ap7000-macb", "cdns,macb"; | 382 | compatible = "cdns,at32ap7000-macb", "cdns,macb"; |
327 | reg = <0xfffc4000 0x100>; | 383 | reg = <0xfffc4000 0x100>; |
328 | interrupts = <21 4 3>; | 384 | interrupts = <21 4 3>; |
385 | pinctrl-names = "default"; | ||
386 | pinctrl-0 = <&pinctrl_macb_rmii>; | ||
329 | status = "disabled"; | 387 | status = "disabled"; |
330 | }; | 388 | }; |
331 | 389 | ||
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi index 251ccec430a4..a14aa3d1f015 100644 --- a/arch/arm/boot/dts/at91sam9263.dtsi +++ b/arch/arm/boot/dts/at91sam9263.dtsi | |||
@@ -113,45 +113,57 @@ | |||
113 | }; | 113 | }; |
114 | }; | 114 | }; |
115 | 115 | ||
116 | uart0 { | 116 | usart0 { |
117 | pinctrl_uart0: uart0-0 { | 117 | pinctrl_usart0: usart0-0 { |
118 | atmel,pins = | 118 | atmel,pins = |
119 | <0 26 0x1 0x1 /* PA26 periph A with pullup */ | 119 | <0 26 0x1 0x1 /* PA26 periph A with pullup */ |
120 | 0 27 0x1 0x0>; /* PA27 periph A */ | 120 | 0 27 0x1 0x0>; /* PA27 periph A */ |
121 | }; | 121 | }; |
122 | 122 | ||
123 | pinctrl_uart0_rts_cts: uart0_rts_cts-0 { | 123 | pinctrl_usart0_rts: usart0_rts-0 { |
124 | atmel,pins = | 124 | atmel,pins = |
125 | <0 28 0x1 0x0 /* PA28 periph A */ | 125 | <0 28 0x1 0x0>; /* PA28 periph A */ |
126 | 0 29 0x1 0x0>; /* PA29 periph A */ | 126 | }; |
127 | |||
128 | pinctrl_usart0_cts: usart0_cts-0 { | ||
129 | atmel,pins = | ||
130 | <0 29 0x1 0x0>; /* PA29 periph A */ | ||
127 | }; | 131 | }; |
128 | }; | 132 | }; |
129 | 133 | ||
130 | uart1 { | 134 | usart1 { |
131 | pinctrl_uart1: uart1-0 { | 135 | pinctrl_usart1: usart1-0 { |
132 | atmel,pins = | 136 | atmel,pins = |
133 | <3 0 0x1 0x1 /* PD0 periph A with pullup */ | 137 | <3 0 0x1 0x1 /* PD0 periph A with pullup */ |
134 | 3 1 0x1 0x0>; /* PD1 periph A */ | 138 | 3 1 0x1 0x0>; /* PD1 periph A */ |
135 | }; | 139 | }; |
136 | 140 | ||
137 | pinctrl_uart1_rts_cts: uart1_rts_cts-0 { | 141 | pinctrl_usart1_rts: usart1_rts-0 { |
138 | atmel,pins = | 142 | atmel,pins = |
139 | <3 7 0x2 0x0 /* PD7 periph B */ | 143 | <3 7 0x2 0x0>; /* PD7 periph B */ |
140 | 3 8 0x2 0x0>; /* PD8 periph B */ | 144 | }; |
145 | |||
146 | pinctrl_usart1_cts: usart1_cts-0 { | ||
147 | atmel,pins = | ||
148 | <3 8 0x2 0x0>; /* PD8 periph B */ | ||
141 | }; | 149 | }; |
142 | }; | 150 | }; |
143 | 151 | ||
144 | uart2 { | 152 | usart2 { |
145 | pinctrl_uart2: uart2-0 { | 153 | pinctrl_usart2: usart2-0 { |
146 | atmel,pins = | 154 | atmel,pins = |
147 | <3 2 0x1 0x1 /* PD2 periph A with pullup */ | 155 | <3 2 0x1 0x1 /* PD2 periph A with pullup */ |
148 | 3 3 0x1 0x0>; /* PD3 periph A */ | 156 | 3 3 0x1 0x0>; /* PD3 periph A */ |
149 | }; | 157 | }; |
150 | 158 | ||
151 | pinctrl_uart2_rts_cts: uart2_rts_cts-0 { | 159 | pinctrl_usart2_rts: usart2_rts-0 { |
160 | atmel,pins = | ||
161 | <3 5 0x2 0x0>; /* PD5 periph B */ | ||
162 | }; | ||
163 | |||
164 | pinctrl_usart2_cts: usart2_cts-0 { | ||
152 | atmel,pins = | 165 | atmel,pins = |
153 | <3 5 0x2 0x0 /* PD5 periph B */ | 166 | <4 6 0x2 0x0>; /* PD6 periph B */ |
154 | 4 6 0x2 0x0>; /* PD6 periph B */ | ||
155 | }; | 167 | }; |
156 | }; | 168 | }; |
157 | 169 | ||
@@ -163,6 +175,34 @@ | |||
163 | }; | 175 | }; |
164 | }; | 176 | }; |
165 | 177 | ||
178 | macb { | ||
179 | pinctrl_macb_rmii: macb_rmii-0 { | ||
180 | atmel,pins = | ||
181 | <2 25 0x2 0x0 /* PC25 periph B */ | ||
182 | 4 21 0x1 0x0 /* PE21 periph A */ | ||
183 | 4 23 0x1 0x0 /* PE23 periph A */ | ||
184 | 4 24 0x1 0x0 /* PE24 periph A */ | ||
185 | 4 25 0x1 0x0 /* PE25 periph A */ | ||
186 | 4 26 0x1 0x0 /* PE26 periph A */ | ||
187 | 4 27 0x1 0x0 /* PE27 periph A */ | ||
188 | 4 28 0x1 0x0 /* PE28 periph A */ | ||
189 | 4 29 0x1 0x0 /* PE29 periph A */ | ||
190 | 4 30 0x1 0x0>; /* PE30 periph A */ | ||
191 | }; | ||
192 | |||
193 | pinctrl_macb_rmii_mii: macb_rmii_mii-0 { | ||
194 | atmel,pins = | ||
195 | <2 20 0x2 0x0 /* PC20 periph B */ | ||
196 | 2 21 0x2 0x0 /* PC21 periph B */ | ||
197 | 2 22 0x2 0x0 /* PC22 periph B */ | ||
198 | 2 23 0x2 0x0 /* PC23 periph B */ | ||
199 | 2 24 0x2 0x0 /* PC24 periph B */ | ||
200 | 2 25 0x2 0x0 /* PC25 periph B */ | ||
201 | 2 27 0x2 0x0 /* PC27 periph B */ | ||
202 | 4 22 0x2 0x0>; /* PE22 periph B */ | ||
203 | }; | ||
204 | }; | ||
205 | |||
166 | pioA: gpio@fffff200 { | 206 | pioA: gpio@fffff200 { |
167 | compatible = "atmel,at91rm9200-gpio"; | 207 | compatible = "atmel,at91rm9200-gpio"; |
168 | reg = <0xfffff200 0x200>; | 208 | reg = <0xfffff200 0x200>; |
@@ -230,7 +270,7 @@ | |||
230 | atmel,use-dma-rx; | 270 | atmel,use-dma-rx; |
231 | atmel,use-dma-tx; | 271 | atmel,use-dma-tx; |
232 | pinctrl-names = "default"; | 272 | pinctrl-names = "default"; |
233 | pinctrl-0 = <&pinctrl_uart0>; | 273 | pinctrl-0 = <&pinctrl_usart0>; |
234 | status = "disabled"; | 274 | status = "disabled"; |
235 | }; | 275 | }; |
236 | 276 | ||
@@ -241,7 +281,7 @@ | |||
241 | atmel,use-dma-rx; | 281 | atmel,use-dma-rx; |
242 | atmel,use-dma-tx; | 282 | atmel,use-dma-tx; |
243 | pinctrl-names = "default"; | 283 | pinctrl-names = "default"; |
244 | pinctrl-0 = <&pinctrl_uart1>; | 284 | pinctrl-0 = <&pinctrl_usart1>; |
245 | status = "disabled"; | 285 | status = "disabled"; |
246 | }; | 286 | }; |
247 | 287 | ||
@@ -252,7 +292,7 @@ | |||
252 | atmel,use-dma-rx; | 292 | atmel,use-dma-rx; |
253 | atmel,use-dma-tx; | 293 | atmel,use-dma-tx; |
254 | pinctrl-names = "default"; | 294 | pinctrl-names = "default"; |
255 | pinctrl-0 = <&pinctrl_uart2>; | 295 | pinctrl-0 = <&pinctrl_usart2>; |
256 | status = "disabled"; | 296 | status = "disabled"; |
257 | }; | 297 | }; |
258 | 298 | ||
@@ -260,6 +300,8 @@ | |||
260 | compatible = "cdns,at32ap7000-macb", "cdns,macb"; | 300 | compatible = "cdns,at32ap7000-macb", "cdns,macb"; |
261 | reg = <0xfffbc000 0x100>; | 301 | reg = <0xfffbc000 0x100>; |
262 | interrupts = <21 4 3>; | 302 | interrupts = <21 4 3>; |
303 | pinctrl-names = "default"; | ||
304 | pinctrl-0 = <&pinctrl_macb_rmii>; | ||
263 | status = "disabled"; | 305 | status = "disabled"; |
264 | }; | 306 | }; |
265 | 307 | ||
diff --git a/arch/arm/boot/dts/at91sam9263ek.dts b/arch/arm/boot/dts/at91sam9263ek.dts index 7cfe9d521f12..e6a57a37156d 100644 --- a/arch/arm/boot/dts/at91sam9263ek.dts +++ b/arch/arm/boot/dts/at91sam9263ek.dts | |||
@@ -38,7 +38,10 @@ | |||
38 | }; | 38 | }; |
39 | 39 | ||
40 | usart0: serial@fff8c000 { | 40 | usart0: serial@fff8c000 { |
41 | pinctrl-0 = <&pinctrl_uart0 &pinctrl_uart0_rts_cts>; | 41 | pinctrl-0 = < |
42 | &pinctrl_usart0 | ||
43 | &pinctrl_usart0_rts | ||
44 | &pinctrl_usart0_cts>; | ||
42 | status = "okay"; | 45 | status = "okay"; |
43 | }; | 46 | }; |
44 | 47 | ||
diff --git a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi index 689323d8e64c..63a0e5ddd0a1 100644 --- a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi +++ b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi | |||
@@ -36,11 +36,12 @@ | |||
36 | 36 | ||
37 | usart0: serial@fffb0000 { | 37 | usart0: serial@fffb0000 { |
38 | pinctrl-0 = | 38 | pinctrl-0 = |
39 | <&pinctrl_uart0 | 39 | <&pinctrl_usart0 |
40 | &pinctrl_uart0_rts_cts | 40 | &pinctrl_usart0_rts |
41 | &pinctrl_uart0_dtr_dsr | 41 | &pinctrl_usart0_cts |
42 | &pinctrl_uart0_dcd | 42 | &pinctrl_usart0_dtr_dsr |
43 | &pinctrl_uart0_ri>; | 43 | &pinctrl_usart0_dcd |
44 | &pinctrl_usart0_ri>; | ||
44 | status = "okay"; | 45 | status = "okay"; |
45 | }; | 46 | }; |
46 | 47 | ||
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi index c340f6635d81..dc9a4ee28bc8 100644 --- a/arch/arm/boot/dts/at91sam9g45.dtsi +++ b/arch/arm/boot/dts/at91sam9g45.dtsi | |||
@@ -132,59 +132,75 @@ | |||
132 | }; | 132 | }; |
133 | }; | 133 | }; |
134 | 134 | ||
135 | uart0 { | 135 | usart0 { |
136 | pinctrl_uart0: uart0-0 { | 136 | pinctrl_usart0: usart0-0 { |
137 | atmel,pins = | 137 | atmel,pins = |
138 | <1 19 0x1 0x1 /* PB19 periph A with pullup */ | 138 | <1 19 0x1 0x1 /* PB19 periph A with pullup */ |
139 | 1 18 0x1 0x0>; /* PB18 periph A */ | 139 | 1 18 0x1 0x0>; /* PB18 periph A */ |
140 | }; | 140 | }; |
141 | 141 | ||
142 | pinctrl_uart0_rts_cts: uart0_rts_cts-0 { | 142 | pinctrl_usart0_rts: usart0_rts-0 { |
143 | atmel,pins = | 143 | atmel,pins = |
144 | <1 17 0x2 0x0 /* PB17 periph B */ | 144 | <1 17 0x2 0x0>; /* PB17 periph B */ |
145 | 1 15 0x2 0x0>; /* PB15 periph B */ | 145 | }; |
146 | |||
147 | pinctrl_usart0_cts: usart0_cts-0 { | ||
148 | atmel,pins = | ||
149 | <1 15 0x2 0x0>; /* PB15 periph B */ | ||
146 | }; | 150 | }; |
147 | }; | 151 | }; |
148 | 152 | ||
149 | uart1 { | 153 | uart1 { |
150 | pinctrl_uart1: uart1-0 { | 154 | pinctrl_usart1: usart1-0 { |
151 | atmel,pins = | 155 | atmel,pins = |
152 | <1 4 0x1 0x1 /* PB4 periph A with pullup */ | 156 | <1 4 0x1 0x1 /* PB4 periph A with pullup */ |
153 | 1 5 0x1 0x0>; /* PB5 periph A */ | 157 | 1 5 0x1 0x0>; /* PB5 periph A */ |
154 | }; | 158 | }; |
155 | 159 | ||
156 | pinctrl_uart1_rts_cts: uart1_rts_cts-0 { | 160 | pinctrl_usart1_rts: usart1_rts-0 { |
161 | atmel,pins = | ||
162 | <3 16 0x1 0x0>; /* PD16 periph A */ | ||
163 | }; | ||
164 | |||
165 | pinctrl_usart1_cts: usart1_cts-0 { | ||
157 | atmel,pins = | 166 | atmel,pins = |
158 | <3 16 0x1 0x0 /* PD16 periph A */ | 167 | <3 17 0x1 0x0>; /* PD17 periph A */ |
159 | 3 17 0x1 0x0>; /* PD17 periph A */ | ||
160 | }; | 168 | }; |
161 | }; | 169 | }; |
162 | 170 | ||
163 | uart2 { | 171 | usart2 { |
164 | pinctrl_uart2: uart2-0 { | 172 | pinctrl_usart2: usart2-0 { |
165 | atmel,pins = | 173 | atmel,pins = |
166 | <1 6 0x1 0x1 /* PB6 periph A with pullup */ | 174 | <1 6 0x1 0x1 /* PB6 periph A with pullup */ |
167 | 1 7 0x1 0x0>; /* PB7 periph A */ | 175 | 1 7 0x1 0x0>; /* PB7 periph A */ |
168 | }; | 176 | }; |
169 | 177 | ||
170 | pinctrl_uart2_rts_cts: uart2_rts_cts-0 { | 178 | pinctrl_usart2_rts: usart2_rts-0 { |
171 | atmel,pins = | 179 | atmel,pins = |
172 | <2 9 0x2 0x0 /* PC9 periph B */ | 180 | <2 9 0x2 0x0>; /* PC9 periph B */ |
173 | 2 11 0x2 0x0>; /* PC11 periph B */ | 181 | }; |
182 | |||
183 | pinctrl_usart2_cts: usart2_cts-0 { | ||
184 | atmel,pins = | ||
185 | <2 11 0x2 0x0>; /* PC11 periph B */ | ||
174 | }; | 186 | }; |
175 | }; | 187 | }; |
176 | 188 | ||
177 | uart3 { | 189 | usart3 { |
178 | pinctrl_uart3: uart3-0 { | 190 | pinctrl_usart3: usart3-0 { |
179 | atmel,pins = | 191 | atmel,pins = |
180 | <1 8 0x1 0x1 /* PB9 periph A with pullup */ | 192 | <1 8 0x1 0x1 /* PB9 periph A with pullup */ |
181 | 1 9 0x1 0x0>; /* PB8 periph A */ | 193 | 1 9 0x1 0x0>; /* PB8 periph A */ |
182 | }; | 194 | }; |
183 | 195 | ||
184 | pinctrl_uart3_rts_cts: uart3_rts_cts-0 { | 196 | pinctrl_usart3_rts: usart3_rts-0 { |
197 | atmel,pins = | ||
198 | <0 23 0x2 0x0>; /* PA23 periph B */ | ||
199 | }; | ||
200 | |||
201 | pinctrl_usart3_cts: usart3_cts-0 { | ||
185 | atmel,pins = | 202 | atmel,pins = |
186 | <0 23 0x2 0x0 /* PA23 periph B */ | 203 | <0 24 0x2 0x0>; /* PA24 periph B */ |
187 | 0 24 0x2 0x0>; /* PA24 periph B */ | ||
188 | }; | 204 | }; |
189 | }; | 205 | }; |
190 | 206 | ||
@@ -196,6 +212,34 @@ | |||
196 | }; | 212 | }; |
197 | }; | 213 | }; |
198 | 214 | ||
215 | macb { | ||
216 | pinctrl_macb_rmii: macb_rmii-0 { | ||
217 | atmel,pins = | ||
218 | <0 10 0x1 0x0 /* PA10 periph A */ | ||
219 | 0 11 0x1 0x0 /* PA11 periph A */ | ||
220 | 0 12 0x1 0x0 /* PA12 periph A */ | ||
221 | 0 13 0x1 0x0 /* PA13 periph A */ | ||
222 | 0 14 0x1 0x0 /* PA14 periph A */ | ||
223 | 0 15 0x1 0x0 /* PA15 periph A */ | ||
224 | 0 16 0x1 0x0 /* PA16 periph A */ | ||
225 | 0 17 0x1 0x0 /* PA17 periph A */ | ||
226 | 0 18 0x1 0x0 /* PA18 periph A */ | ||
227 | 0 19 0x1 0x0>; /* PA19 periph A */ | ||
228 | }; | ||
229 | |||
230 | pinctrl_macb_rmii_mii: macb_rmii_mii-0 { | ||
231 | atmel,pins = | ||
232 | <0 6 0x2 0x0 /* PA6 periph B */ | ||
233 | 0 7 0x2 0x0 /* PA7 periph B */ | ||
234 | 0 8 0x2 0x0 /* PA8 periph B */ | ||
235 | 0 9 0x2 0x0 /* PA9 periph B */ | ||
236 | 0 27 0x2 0x0 /* PA27 periph B */ | ||
237 | 0 28 0x2 0x0 /* PA28 periph B */ | ||
238 | 0 29 0x2 0x0 /* PA29 periph B */ | ||
239 | 0 30 0x2 0x0>; /* PA30 periph B */ | ||
240 | }; | ||
241 | }; | ||
242 | |||
199 | pioA: gpio@fffff200 { | 243 | pioA: gpio@fffff200 { |
200 | compatible = "atmel,at91rm9200-gpio"; | 244 | compatible = "atmel,at91rm9200-gpio"; |
201 | reg = <0xfffff200 0x200>; | 245 | reg = <0xfffff200 0x200>; |
@@ -263,7 +307,7 @@ | |||
263 | atmel,use-dma-rx; | 307 | atmel,use-dma-rx; |
264 | atmel,use-dma-tx; | 308 | atmel,use-dma-tx; |
265 | pinctrl-names = "default"; | 309 | pinctrl-names = "default"; |
266 | pinctrl-0 = <&pinctrl_uart0>; | 310 | pinctrl-0 = <&pinctrl_usart0>; |
267 | status = "disabled"; | 311 | status = "disabled"; |
268 | }; | 312 | }; |
269 | 313 | ||
@@ -274,7 +318,7 @@ | |||
274 | atmel,use-dma-rx; | 318 | atmel,use-dma-rx; |
275 | atmel,use-dma-tx; | 319 | atmel,use-dma-tx; |
276 | pinctrl-names = "default"; | 320 | pinctrl-names = "default"; |
277 | pinctrl-0 = <&pinctrl_uart1>; | 321 | pinctrl-0 = <&pinctrl_usart1>; |
278 | status = "disabled"; | 322 | status = "disabled"; |
279 | }; | 323 | }; |
280 | 324 | ||
@@ -285,7 +329,7 @@ | |||
285 | atmel,use-dma-rx; | 329 | atmel,use-dma-rx; |
286 | atmel,use-dma-tx; | 330 | atmel,use-dma-tx; |
287 | pinctrl-names = "default"; | 331 | pinctrl-names = "default"; |
288 | pinctrl-0 = <&pinctrl_uart2>; | 332 | pinctrl-0 = <&pinctrl_usart2>; |
289 | status = "disabled"; | 333 | status = "disabled"; |
290 | }; | 334 | }; |
291 | 335 | ||
@@ -296,7 +340,7 @@ | |||
296 | atmel,use-dma-rx; | 340 | atmel,use-dma-rx; |
297 | atmel,use-dma-tx; | 341 | atmel,use-dma-tx; |
298 | pinctrl-names = "default"; | 342 | pinctrl-names = "default"; |
299 | pinctrl-0 = <&pinctrl_uart3>; | 343 | pinctrl-0 = <&pinctrl_usart3>; |
300 | status = "disabled"; | 344 | status = "disabled"; |
301 | }; | 345 | }; |
302 | 346 | ||
@@ -304,6 +348,8 @@ | |||
304 | compatible = "cdns,at32ap7000-macb", "cdns,macb"; | 348 | compatible = "cdns,at32ap7000-macb", "cdns,macb"; |
305 | reg = <0xfffbc000 0x100>; | 349 | reg = <0xfffbc000 0x100>; |
306 | interrupts = <25 4 3>; | 350 | interrupts = <25 4 3>; |
351 | pinctrl-names = "default"; | ||
352 | pinctrl-0 = <&pinctrl_macb_rmii>; | ||
307 | status = "disabled"; | 353 | status = "disabled"; |
308 | }; | 354 | }; |
309 | 355 | ||
diff --git a/arch/arm/boot/dts/at91sam9m10g45ek.dts b/arch/arm/boot/dts/at91sam9m10g45ek.dts index 6aa28b941907..afd586720b15 100644 --- a/arch/arm/boot/dts/at91sam9m10g45ek.dts +++ b/arch/arm/boot/dts/at91sam9m10g45ek.dts | |||
@@ -39,7 +39,10 @@ | |||
39 | }; | 39 | }; |
40 | 40 | ||
41 | usart1: serial@fff90000 { | 41 | usart1: serial@fff90000 { |
42 | pinctrl-0 = <&pinctrl_uart0 &pinctrl_uart1_rts_cts>; | 42 | pinctrl-0 = |
43 | <&pinctrl_usart1 | ||
44 | &pinctrl_usart1_rts | ||
45 | &pinctrl_usart1_cts>; | ||
43 | status = "okay"; | 46 | status = "okay"; |
44 | }; | 47 | }; |
45 | 48 | ||
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi index 7b644c5b0bed..1667937bb2e2 100644 --- a/arch/arm/boot/dts/at91sam9n12.dtsi +++ b/arch/arm/boot/dts/at91sam9n12.dtsi | |||
@@ -125,66 +125,78 @@ | |||
125 | }; | 125 | }; |
126 | }; | 126 | }; |
127 | 127 | ||
128 | uart0 { | 128 | usart0 { |
129 | pinctrl_uart0: uart0-0 { | 129 | pinctrl_usart0: usart0-0 { |
130 | atmel,pins = | 130 | atmel,pins = |
131 | <0 1 0x1 0x1 /* PA1 periph A with pullup */ | 131 | <0 1 0x1 0x1 /* PA1 periph A with pullup */ |
132 | 0 0 0x1 0x0>; /* PA0 periph A */ | 132 | 0 0 0x1 0x0>; /* PA0 periph A */ |
133 | }; | 133 | }; |
134 | 134 | ||
135 | pinctrl_uart0_rts_cts: uart0_rts_cts-0 { | 135 | pinctrl_usart0_rts: usart0_rts-0 { |
136 | atmel,pins = | ||
137 | <0 2 0x1 0x0>; /* PA2 periph A */ | ||
138 | }; | ||
139 | |||
140 | pinctrl_usart0_cts: usart0_cts-0 { | ||
136 | atmel,pins = | 141 | atmel,pins = |
137 | <0 2 0x1 0x0 /* PA2 periph A */ | 142 | <0 3 0x1 0x0>; /* PA3 periph A */ |
138 | 0 3 0x1 0x0>; /* PA3 periph A */ | ||
139 | }; | 143 | }; |
140 | }; | 144 | }; |
141 | 145 | ||
142 | uart1 { | 146 | usart1 { |
143 | pinctrl_uart1: uart1-0 { | 147 | pinctrl_usart1: usart1-0 { |
144 | atmel,pins = | 148 | atmel,pins = |
145 | <0 6 0x1 0x1 /* PA6 periph A with pullup */ | 149 | <0 6 0x1 0x1 /* PA6 periph A with pullup */ |
146 | 0 5 0x1 0x0>; /* PA5 periph A */ | 150 | 0 5 0x1 0x0>; /* PA5 periph A */ |
147 | }; | 151 | }; |
148 | }; | 152 | }; |
149 | 153 | ||
150 | uart2 { | 154 | usart2 { |
151 | pinctrl_uart2: uart2-0 { | 155 | pinctrl_usart2: usart2-0 { |
152 | atmel,pins = | 156 | atmel,pins = |
153 | <0 8 0x1 0x1 /* PA8 periph A with pullup */ | 157 | <0 8 0x1 0x1 /* PA8 periph A with pullup */ |
154 | 0 7 0x1 0x0>; /* PA7 periph A */ | 158 | 0 7 0x1 0x0>; /* PA7 periph A */ |
155 | }; | 159 | }; |
156 | 160 | ||
157 | pinctrl_uart2_rts_cts: uart2_rts_cts-0 { | 161 | pinctrl_usart2_rts: usart2_rts-0 { |
158 | atmel,pins = | 162 | atmel,pins = |
159 | <1 0 0x2 0x0 /* PB0 periph B */ | 163 | <1 0 0x2 0x0>; /* PB0 periph B */ |
160 | 1 1 0x2 0x0>; /* PB1 periph B */ | 164 | }; |
165 | |||
166 | pinctrl_usart2_cts: usart2_cts-0 { | ||
167 | atmel,pins = | ||
168 | <1 1 0x2 0x0>; /* PB1 periph B */ | ||
161 | }; | 169 | }; |
162 | }; | 170 | }; |
163 | 171 | ||
164 | uart3 { | 172 | usart3 { |
165 | pinctrl_uart3: uart3-0 { | 173 | pinctrl_usart3: usart3-0 { |
166 | atmel,pins = | 174 | atmel,pins = |
167 | <2 23 0x2 0x1 /* PC23 periph B with pullup */ | 175 | <2 23 0x2 0x1 /* PC23 periph B with pullup */ |
168 | 2 22 0x2 0x0>; /* PC22 periph B */ | 176 | 2 22 0x2 0x0>; /* PC22 periph B */ |
169 | }; | 177 | }; |
170 | 178 | ||
171 | pinctrl_uart3_rts_cts: uart3_rts_cts-0 { | 179 | pinctrl_usart3_rts: usart3_rts-0 { |
180 | atmel,pins = | ||
181 | <2 24 0x2 0x0>; /* PC24 periph B */ | ||
182 | }; | ||
183 | |||
184 | pinctrl_usart3_cts: usart3_cts-0 { | ||
172 | atmel,pins = | 185 | atmel,pins = |
173 | <2 24 0x2 0x0 /* PC24 periph B */ | 186 | <2 25 0x2 0x0>; /* PC25 periph B */ |
174 | 2 25 0x2 0x0>; /* PC25 periph B */ | ||
175 | }; | 187 | }; |
176 | }; | 188 | }; |
177 | 189 | ||
178 | usart0 { | 190 | uart0 { |
179 | pinctrl_usart0: usart0-0 { | 191 | pinctrl_uart0: uart0-0 { |
180 | atmel,pins = | 192 | atmel,pins = |
181 | <2 9 0x3 0x1 /* PC9 periph C with pullup */ | 193 | <2 9 0x3 0x1 /* PC9 periph C with pullup */ |
182 | 2 8 0x3 0x0>; /* PC8 periph C */ | 194 | 2 8 0x3 0x0>; /* PC8 periph C */ |
183 | }; | 195 | }; |
184 | }; | 196 | }; |
185 | 197 | ||
186 | usart1 { | 198 | uart1 { |
187 | pinctrl_usart1: usart1-0 { | 199 | pinctrl_uart1: uart1-0 { |
188 | atmel,pins = | 200 | atmel,pins = |
189 | <2 16 0x3 0x1 /* PC17 periph C with pullup */ | 201 | <2 16 0x3 0x1 /* PC17 periph C with pullup */ |
190 | 2 17 0x3 0x0>; /* PC16 periph C */ | 202 | 2 17 0x3 0x0>; /* PC16 periph C */ |
@@ -256,7 +268,7 @@ | |||
256 | atmel,use-dma-rx; | 268 | atmel,use-dma-rx; |
257 | atmel,use-dma-tx; | 269 | atmel,use-dma-tx; |
258 | pinctrl-names = "default"; | 270 | pinctrl-names = "default"; |
259 | pinctrl-0 = <&pinctrl_uart0>; | 271 | pinctrl-0 = <&pinctrl_usart0>; |
260 | status = "disabled"; | 272 | status = "disabled"; |
261 | }; | 273 | }; |
262 | 274 | ||
@@ -267,7 +279,7 @@ | |||
267 | atmel,use-dma-rx; | 279 | atmel,use-dma-rx; |
268 | atmel,use-dma-tx; | 280 | atmel,use-dma-tx; |
269 | pinctrl-names = "default"; | 281 | pinctrl-names = "default"; |
270 | pinctrl-0 = <&pinctrl_uart1>; | 282 | pinctrl-0 = <&pinctrl_usart1>; |
271 | status = "disabled"; | 283 | status = "disabled"; |
272 | }; | 284 | }; |
273 | 285 | ||
@@ -278,7 +290,7 @@ | |||
278 | atmel,use-dma-rx; | 290 | atmel,use-dma-rx; |
279 | atmel,use-dma-tx; | 291 | atmel,use-dma-tx; |
280 | pinctrl-names = "default"; | 292 | pinctrl-names = "default"; |
281 | pinctrl-0 = <&pinctrl_uart2>; | 293 | pinctrl-0 = <&pinctrl_usart2>; |
282 | status = "disabled"; | 294 | status = "disabled"; |
283 | }; | 295 | }; |
284 | 296 | ||
@@ -289,7 +301,7 @@ | |||
289 | atmel,use-dma-rx; | 301 | atmel,use-dma-rx; |
290 | atmel,use-dma-tx; | 302 | atmel,use-dma-tx; |
291 | pinctrl-names = "default"; | 303 | pinctrl-names = "default"; |
292 | pinctrl-0 = <&pinctrl_uart3>; | 304 | pinctrl-0 = <&pinctrl_usart3>; |
293 | status = "disabled"; | 305 | status = "disabled"; |
294 | }; | 306 | }; |
295 | 307 | ||
diff --git a/arch/arm/boot/dts/at91sam9x25.dtsi b/arch/arm/boot/dts/at91sam9x25.dtsi index 956c65f7c39f..54eb33ba6d22 100644 --- a/arch/arm/boot/dts/at91sam9x25.dtsi +++ b/arch/arm/boot/dts/at91sam9x25.dtsi | |||
@@ -22,6 +22,27 @@ | |||
22 | 0x80000000 0xfffd0000 0xb83fffff /* pioC */ | 22 | 0x80000000 0xfffd0000 0xb83fffff /* pioC */ |
23 | 0x003fffff 0x003f8000 0x00000000 /* pioD */ | 23 | 0x003fffff 0x003f8000 0x00000000 /* pioD */ |
24 | >; | 24 | >; |
25 | |||
26 | macb1 { | ||
27 | pinctrl_macb1_rmii: macb1_rmii-0 { | ||
28 | atmel,pins = | ||
29 | <2 16 0x2 0x0 /* PC16 periph B */ | ||
30 | 2 18 0x2 0x0 /* PC18 periph B */ | ||
31 | 2 19 0x2 0x0 /* PC19 periph B */ | ||
32 | 2 20 0x2 0x0 /* PC20 periph B */ | ||
33 | 2 21 0x2 0x0 /* PC21 periph B */ | ||
34 | 2 27 0x2 0x0 /* PC27 periph B */ | ||
35 | 2 28 0x2 0x0 /* PC28 periph B */ | ||
36 | 2 29 0x2 0x0 /* PC29 periph B */ | ||
37 | 2 30 0x2 0x0 /* PC30 periph B */ | ||
38 | 2 31 0x2 0x0>; /* PC31 periph B */ | ||
39 | }; | ||
40 | }; | ||
41 | }; | ||
42 | |||
43 | macb1: ethernet@f8030000 { | ||
44 | pinctrl-names = "default"; | ||
45 | pinctrl-0 = <&pinctrl_macb1_rmii>; | ||
25 | }; | 46 | }; |
26 | }; | 47 | }; |
27 | }; | 48 | }; |
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi index 6a40b777ea4c..3642ab1eeaf6 100644 --- a/arch/arm/boot/dts/at91sam9x5.dtsi +++ b/arch/arm/boot/dts/at91sam9x5.dtsi | |||
@@ -126,72 +126,88 @@ | |||
126 | }; | 126 | }; |
127 | }; | 127 | }; |
128 | 128 | ||
129 | uart0 { | 129 | usart0 { |
130 | pinctrl_uart0: uart0-0 { | 130 | pinctrl_usart0: usart0-0 { |
131 | atmel,pins = | 131 | atmel,pins = |
132 | <0 0 0x1 0x1 /* PA0 periph A with pullup */ | 132 | <0 0 0x1 0x1 /* PA0 periph A with pullup */ |
133 | 0 1 0x1 0x0>; /* PA1 periph A */ | 133 | 0 1 0x1 0x0>; /* PA1 periph A */ |
134 | }; | 134 | }; |
135 | 135 | ||
136 | pinctrl_uart0_rts_cts: uart0_rts_cts-0 { | 136 | pinctrl_usart0_rts: usart0_rts-0 { |
137 | atmel,pins = | 137 | atmel,pins = |
138 | <0 2 0x1 0x0 /* PA2 periph A */ | 138 | <0 2 0x1 0x0>; /* PA2 periph A */ |
139 | 0 3 0x1 0x0>; /* PA3 periph A */ | 139 | }; |
140 | |||
141 | pinctrl_usart0_cts: usart0_cts-0 { | ||
142 | atmel,pins = | ||
143 | <0 3 0x1 0x0>; /* PA3 periph A */ | ||
140 | }; | 144 | }; |
141 | }; | 145 | }; |
142 | 146 | ||
143 | uart1 { | 147 | usart1 { |
144 | pinctrl_uart1: uart1-0 { | 148 | pinctrl_usart1: usart1-0 { |
145 | atmel,pins = | 149 | atmel,pins = |
146 | <0 5 0x1 0x1 /* PA5 periph A with pullup */ | 150 | <0 5 0x1 0x1 /* PA5 periph A with pullup */ |
147 | 0 6 0x1 0x0>; /* PA6 periph A */ | 151 | 0 6 0x1 0x0>; /* PA6 periph A */ |
148 | }; | 152 | }; |
149 | 153 | ||
150 | pinctrl_uart1_rts_cts: uart1_rts_cts-0 { | 154 | pinctrl_usart1_rts: usart1_rts-0 { |
155 | atmel,pins = | ||
156 | <3 27 0x3 0x0>; /* PC27 periph C */ | ||
157 | }; | ||
158 | |||
159 | pinctrl_usart1_cts: usart1_cts-0 { | ||
151 | atmel,pins = | 160 | atmel,pins = |
152 | <3 27 0x3 0x0 /* PC27 periph C */ | 161 | <3 28 0x3 0x0>; /* PC28 periph C */ |
153 | 3 28 0x3 0x0>; /* PC28 periph C */ | ||
154 | }; | 162 | }; |
155 | }; | 163 | }; |
156 | 164 | ||
157 | uart2 { | 165 | usart2 { |
158 | pinctrl_uart2: uart2-0 { | 166 | pinctrl_usart2: usart2-0 { |
159 | atmel,pins = | 167 | atmel,pins = |
160 | <0 7 0x1 0x1 /* PA7 periph A with pullup */ | 168 | <0 7 0x1 0x1 /* PA7 periph A with pullup */ |
161 | 0 8 0x1 0x0>; /* PA8 periph A */ | 169 | 0 8 0x1 0x0>; /* PA8 periph A */ |
162 | }; | 170 | }; |
163 | 171 | ||
164 | pinctrl_uart2_rts_cts: uart2_rts_cts-0 { | 172 | pinctrl_uart2_rts: uart2_rts-0 { |
165 | atmel,pins = | 173 | atmel,pins = |
166 | <0 0 0x2 0x0 /* PB0 periph B */ | 174 | <0 0 0x2 0x0>; /* PB0 periph B */ |
167 | 0 1 0x2 0x0>; /* PB1 periph B */ | 175 | }; |
176 | |||
177 | pinctrl_uart2_cts: uart2_cts-0 { | ||
178 | atmel,pins = | ||
179 | <0 1 0x2 0x0>; /* PB1 periph B */ | ||
168 | }; | 180 | }; |
169 | }; | 181 | }; |
170 | 182 | ||
171 | uart3 { | 183 | usart3 { |
172 | pinctrl_uart3: uart3-0 { | 184 | pinctrl_uart3: usart3-0 { |
173 | atmel,pins = | 185 | atmel,pins = |
174 | <3 23 0x2 0x1 /* PC22 periph B with pullup */ | 186 | <3 23 0x2 0x1 /* PC22 periph B with pullup */ |
175 | 3 23 0x2 0x0>; /* PC23 periph B */ | 187 | 3 23 0x2 0x0>; /* PC23 periph B */ |
176 | }; | 188 | }; |
177 | 189 | ||
178 | pinctrl_uart3_rts_cts: uart3_rts_cts-0 { | 190 | pinctrl_usart3_rts: usart3_rts-0 { |
191 | atmel,pins = | ||
192 | <3 24 0x2 0x0>; /* PC24 periph B */ | ||
193 | }; | ||
194 | |||
195 | pinctrl_usart3_cts: usart3_cts-0 { | ||
179 | atmel,pins = | 196 | atmel,pins = |
180 | <3 24 0x2 0x0 /* PC24 periph B */ | 197 | <3 25 0x2 0x0>; /* PC25 periph B */ |
181 | 3 25 0x2 0x0>; /* PC25 periph B */ | ||
182 | }; | 198 | }; |
183 | }; | 199 | }; |
184 | 200 | ||
185 | usart0 { | 201 | uart0 { |
186 | pinctrl_usart0: usart0-0 { | 202 | pinctrl_uart0: uart0-0 { |
187 | atmel,pins = | 203 | atmel,pins = |
188 | <3 8 0x3 0x0 /* PC8 periph C */ | 204 | <3 8 0x3 0x0 /* PC8 periph C */ |
189 | 3 9 0x3 0x1>; /* PC9 periph C with pullup */ | 205 | 3 9 0x3 0x1>; /* PC9 periph C with pullup */ |
190 | }; | 206 | }; |
191 | }; | 207 | }; |
192 | 208 | ||
193 | usart1 { | 209 | uart1 { |
194 | pinctrl_usart1: usart1-0 { | 210 | pinctrl_uart1: uart1-0 { |
195 | atmel,pins = | 211 | atmel,pins = |
196 | <3 16 0x3 0x0 /* PC16 periph C */ | 212 | <3 16 0x3 0x0 /* PC16 periph C */ |
197 | 3 17 0x3 0x1>; /* PC17 periph C with pullup */ | 213 | 3 17 0x3 0x1>; /* PC17 periph C with pullup */ |
@@ -206,6 +222,34 @@ | |||
206 | }; | 222 | }; |
207 | }; | 223 | }; |
208 | 224 | ||
225 | macb0 { | ||
226 | pinctrl_macb0_rmii: macb0_rmii-0 { | ||
227 | atmel,pins = | ||
228 | <1 0 0x1 0x0 /* PB0 periph A */ | ||
229 | 1 1 0x1 0x0 /* PB1 periph A */ | ||
230 | 1 2 0x1 0x0 /* PB2 periph A */ | ||
231 | 1 3 0x1 0x0 /* PB3 periph A */ | ||
232 | 1 4 0x1 0x0 /* PB4 periph A */ | ||
233 | 1 5 0x1 0x0 /* PB5 periph A */ | ||
234 | 1 6 0x1 0x0 /* PB6 periph A */ | ||
235 | 1 7 0x1 0x0 /* PB7 periph A */ | ||
236 | 1 9 0x1 0x0 /* PB9 periph A */ | ||
237 | 1 10 0x1 0x0>; /* PB10 periph A */ | ||
238 | }; | ||
239 | |||
240 | pinctrl_macb0_rmii_mii: macb0_rmii_mii-0 { | ||
241 | atmel,pins = | ||
242 | <1 8 0x1 0x0 /* PA8 periph A */ | ||
243 | 1 11 0x1 0x0 /* PA11 periph A */ | ||
244 | 1 12 0x1 0x0 /* PA12 periph A */ | ||
245 | 1 13 0x1 0x0 /* PA13 periph A */ | ||
246 | 1 14 0x1 0x0 /* PA14 periph A */ | ||
247 | 1 15 0x1 0x0 /* PA15 periph A */ | ||
248 | 1 16 0x1 0x0 /* PA16 periph A */ | ||
249 | 1 17 0x1 0x0>; /* PA17 periph A */ | ||
250 | }; | ||
251 | }; | ||
252 | |||
209 | pioA: gpio@fffff400 { | 253 | pioA: gpio@fffff400 { |
210 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; | 254 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; |
211 | reg = <0xfffff400 0x200>; | 255 | reg = <0xfffff400 0x200>; |
@@ -265,7 +309,7 @@ | |||
265 | atmel,use-dma-rx; | 309 | atmel,use-dma-rx; |
266 | atmel,use-dma-tx; | 310 | atmel,use-dma-tx; |
267 | pinctrl-names = "default"; | 311 | pinctrl-names = "default"; |
268 | pinctrl-0 = <&pinctrl_uart0>; | 312 | pinctrl-0 = <&pinctrl_usart0>; |
269 | status = "disabled"; | 313 | status = "disabled"; |
270 | }; | 314 | }; |
271 | 315 | ||
@@ -276,7 +320,7 @@ | |||
276 | atmel,use-dma-rx; | 320 | atmel,use-dma-rx; |
277 | atmel,use-dma-tx; | 321 | atmel,use-dma-tx; |
278 | pinctrl-names = "default"; | 322 | pinctrl-names = "default"; |
279 | pinctrl-0 = <&pinctrl_uart1>; | 323 | pinctrl-0 = <&pinctrl_usart1>; |
280 | status = "disabled"; | 324 | status = "disabled"; |
281 | }; | 325 | }; |
282 | 326 | ||
@@ -287,7 +331,7 @@ | |||
287 | atmel,use-dma-rx; | 331 | atmel,use-dma-rx; |
288 | atmel,use-dma-tx; | 332 | atmel,use-dma-tx; |
289 | pinctrl-names = "default"; | 333 | pinctrl-names = "default"; |
290 | pinctrl-0 = <&pinctrl_uart2>; | 334 | pinctrl-0 = <&pinctrl_usart2>; |
291 | status = "disabled"; | 335 | status = "disabled"; |
292 | }; | 336 | }; |
293 | 337 | ||
@@ -295,6 +339,8 @@ | |||
295 | compatible = "cdns,at32ap7000-macb", "cdns,macb"; | 339 | compatible = "cdns,at32ap7000-macb", "cdns,macb"; |
296 | reg = <0xf802c000 0x100>; | 340 | reg = <0xf802c000 0x100>; |
297 | interrupts = <24 4 3>; | 341 | interrupts = <24 4 3>; |
342 | pinctrl-names = "default"; | ||
343 | pinctrl-0 = <&pinctrl_macb0_rmii>; | ||
298 | status = "disabled"; | 344 | status = "disabled"; |
299 | }; | 345 | }; |
300 | 346 | ||
diff --git a/arch/arm/boot/dts/pm9g45.dts b/arch/arm/boot/dts/pm9g45.dts new file mode 100644 index 000000000000..b0c258dd19ed --- /dev/null +++ b/arch/arm/boot/dts/pm9g45.dts | |||
@@ -0,0 +1,144 @@ | |||
1 | /* | ||
2 | * pm9g45.dts - Device Tree file for Ronetix pm9g45 board | ||
3 | * | ||
4 | * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | ||
5 | * | ||
6 | * Licensed under GPLv2. | ||
7 | */ | ||
8 | /dts-v1/; | ||
9 | /include/ "at91sam9g45.dtsi" | ||
10 | |||
11 | / { | ||
12 | model = "Ronetix pm9g45"; | ||
13 | compatible = "ronetix,pm9g45", "atmel,at91sam9g45", "atmel,at91sam9"; | ||
14 | |||
15 | chosen { | ||
16 | bootargs = "console=ttyS0,115200"; | ||
17 | }; | ||
18 | |||
19 | memory { | ||
20 | reg = <0x70000000 0x8000000>; | ||
21 | }; | ||
22 | |||
23 | clocks { | ||
24 | #address-cells = <1>; | ||
25 | #size-cells = <1>; | ||
26 | ranges; | ||
27 | |||
28 | main_clock: clock@0 { | ||
29 | compatible = "atmel,osc", "fixed-clock"; | ||
30 | clock-frequency = <12000000>; | ||
31 | }; | ||
32 | }; | ||
33 | |||
34 | ahb { | ||
35 | apb { | ||
36 | dbgu: serial@ffffee00 { | ||
37 | status = "okay"; | ||
38 | }; | ||
39 | |||
40 | pinctrl@fffff200 { | ||
41 | |||
42 | board { | ||
43 | pinctrl_board_nand: nand0-board { | ||
44 | atmel,pins = | ||
45 | <3 3 0x0 0x1 /* PD3 gpio RDY pin pull_up*/ | ||
46 | 2 14 0x0 0x1>; /* PC14 gpio enable pin pull_up */ | ||
47 | }; | ||
48 | }; | ||
49 | }; | ||
50 | |||
51 | macb0: ethernet@fffbc000 { | ||
52 | phy-mode = "rmii"; | ||
53 | status = "okay"; | ||
54 | }; | ||
55 | }; | ||
56 | |||
57 | nand0: nand@40000000 { | ||
58 | nand-bus-width = <8>; | ||
59 | nand-ecc-mode = "soft"; | ||
60 | nand-on-flash-bbt; | ||
61 | pinctrl-0 = <&pinctrl_board_nand>; | ||
62 | |||
63 | gpios = <&pioD 3 0 | ||
64 | &pioC 14 0 | ||
65 | 0 | ||
66 | >; | ||
67 | |||
68 | status = "okay"; | ||
69 | |||
70 | at91bootstrap@0 { | ||
71 | label = "at91bootstrap"; | ||
72 | reg = <0x0 0x20000>; | ||
73 | }; | ||
74 | |||
75 | barebox@20000 { | ||
76 | label = "barebox"; | ||
77 | reg = <0x20000 0x40000>; | ||
78 | }; | ||
79 | |||
80 | bareboxenv@60000 { | ||
81 | label = "bareboxenv"; | ||
82 | reg = <0x60000 0x1A0000>; | ||
83 | }; | ||
84 | |||
85 | kernel@200000 { | ||
86 | label = "bareboxenv2"; | ||
87 | reg = <0x200000 0x300000>; | ||
88 | }; | ||
89 | |||
90 | kernel@500000 { | ||
91 | label = "root"; | ||
92 | reg = <0x500000 0x400000>; | ||
93 | }; | ||
94 | |||
95 | data@900000 { | ||
96 | label = "data"; | ||
97 | reg = <0x900000 0x8340000>; | ||
98 | }; | ||
99 | }; | ||
100 | |||
101 | usb0: ohci@00700000 { | ||
102 | status = "okay"; | ||
103 | num-ports = <2>; | ||
104 | }; | ||
105 | |||
106 | usb1: ehci@00800000 { | ||
107 | status = "okay"; | ||
108 | }; | ||
109 | }; | ||
110 | |||
111 | leds { | ||
112 | compatible = "gpio-leds"; | ||
113 | |||
114 | led0 { | ||
115 | label = "led0"; | ||
116 | gpios = <&pioD 0 1>; | ||
117 | linux,default-trigger = "nand-disk"; | ||
118 | }; | ||
119 | |||
120 | led1 { | ||
121 | label = "led1"; | ||
122 | gpios = <&pioD 31 0>; | ||
123 | linux,default-trigger = "heartbeat"; | ||
124 | }; | ||
125 | }; | ||
126 | |||
127 | gpio_keys { | ||
128 | compatible = "gpio-keys"; | ||
129 | #address-cells = <1>; | ||
130 | #size-cells = <0>; | ||
131 | |||
132 | right { | ||
133 | label = "SW4"; | ||
134 | gpios = <&pioE 7 1>; | ||
135 | linux,code = <106>; | ||
136 | }; | ||
137 | |||
138 | up { | ||
139 | label = "SW3"; | ||
140 | gpios = <&pioE 8 1>; | ||
141 | linux,code = <103>; | ||
142 | }; | ||
143 | }; | ||
144 | }; | ||