1 files changed, 143 insertions, 0 deletions

diff --git a/arch/arm/boot/dts/wm8505.dtsi b/arch/arm/boot/dts/wm8505.dtsi
new file mode 100644
index 000000000000..b459691655ab
--- /dev/null
+++ b/arch/arm/boot/dts/wm8505.dtsi
@@ -0,0 +1,143 @@
+/*
+ * wm8505.dtsi - Device tree file for Wondermedia WM8505 SoC
+ *
+ * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
+ *
+ * Licensed under GPLv2 or later
+ */
+
+/include/ "skeleton.dtsi"
+
+/ {
+        compatible = "wm,wm8505";
+
+        cpus {
+                cpu@0 {
+                        compatible = "arm,arm926ejs";
+                };
+        };
+
+        soc {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "simple-bus";
+                ranges;
+                interrupt-parent = <&intc0>;
+
+                intc0: interrupt-controller@d8140000 {
+                        compatible = "via,vt8500-intc";
+                        interrupt-controller;
+                        reg = <0xd8140000 0x10000>;
+                        #interrupt-cells = <1>;
+                };
+
+                /* Secondary IC cascaded to intc0 */
+                intc1: interrupt-controller@d8150000 {
+                        compatible = "via,vt8500-intc";
+                        interrupt-controller;
+                        #interrupt-cells = <1>;
+                        reg = <0xD8150000 0x10000>;
+                        interrupts = <56 57 58 59 60 61 62 63>;
+                };
+
+                gpio: gpio-controller@d8110000 {
+                        compatible = "wm,wm8505-gpio";
+                        gpio-controller;
+                        reg = <0xd8110000 0x10000>;
+                        #gpio-cells = <3>;
+                };
+
+                pmc@d8130000 {
+                        compatible = "via,vt8500-pmc";
+                        reg = <0xd8130000 0x1000>;
+                        clocks {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+
+                                ref24: ref24M {
+                                        #clock-cells = <0>;
+                                        compatible = "fixed-clock";
+                                        clock-frequency = <24000000>;
+                                };
+                        };
+                };
+
+                timer@d8130100 {
+                        compatible = "via,vt8500-timer";
+                        reg = <0xd8130100 0x28>;
+                        interrupts = <36>;
+                };
+
+                ehci@d8007100 {
+                        compatible = "via,vt8500-ehci";
+                        reg = <0xd8007100 0x200>;
+                        interrupts = <43>;
+                };
+
+                uhci@d8007300 {
+                        compatible = "platform-uhci";
+                        reg = <0xd8007300 0x200>;
+                        interrupts = <43>;
+                };
+
+                fb@d8050800 {
+                        compatible = "wm,wm8505-fb";
+                        reg = <0xd8050800 0x200>;
+                        display = <&display>;
+                        default-mode = <&mode0>;
+                };
+
+                ge_rops@d8050400 {
+                        compatible = "wm,prizm-ge-rops";
+                        reg = <0xd8050400 0x100>;
+                };
+
+                uart@d8200000 {
+                        compatible = "via,vt8500-uart";
+                        reg = <0xd8200000 0x1040>;
+                        interrupts = <32>;
+                        clocks = <&ref24>;
+                };
+
+                uart@d82b0000 {
+                        compatible = "via,vt8500-uart";
+                        reg = <0xd82b0000 0x1040>;
+                        interrupts = <33>;
+                        clocks = <&ref24>;
+                };
+
+                uart@d8210000 {
+                        compatible = "via,vt8500-uart";
+                        reg = <0xd8210000 0x1040>;
+                        interrupts = <47>;
+                        clocks = <&ref24>;
+                };
+
+                uart@d82c0000 {
+                        compatible = "via,vt8500-uart";
+                        reg = <0xd82c0000 0x1040>;
+                        interrupts = <50>;
+                        clocks = <&ref24>;
+                };
+
+                uart@d8370000 {
+                        compatible = "via,vt8500-uart";
+                        reg = <0xd8370000 0x1040>;
+                        interrupts = <31>;
+                        clocks = <&ref24>;
+                };
+
+                uart@d8380000 {
+                        compatible = "via,vt8500-uart";
+                        reg = <0xd8380000 0x1040>;
+                        interrupts = <30>;
+                        clocks = <&ref24>;
+                };
+
+                rtc@d8100000 {
+                        compatible = "via,vt8500-rtc";
+                        reg = <0xd8100000 0x10000>;
+                        interrupts = <48>;
+                };
+        };
+};