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-rw-r--r--arch/arm/boot/dts/tegra20.dtsi139
1 files changed, 139 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
new file mode 100644
index 000000000000..5727595cde61
--- /dev/null
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -0,0 +1,139 @@
1/include/ "skeleton.dtsi"
2
3/ {
4 compatible = "nvidia,tegra20";
5 interrupt-parent = <&intc>;
6
7 intc: interrupt-controller@50041000 {
8 compatible = "nvidia,tegra20-gic";
9 interrupt-controller;
10 #interrupt-cells = <1>;
11 reg = < 0x50041000 0x1000 >,
12 < 0x50040100 0x0100 >;
13 };
14
15 i2c@7000c000 {
16 #address-cells = <1>;
17 #size-cells = <0>;
18 compatible = "nvidia,tegra20-i2c";
19 reg = <0x7000C000 0x100>;
20 interrupts = < 70 >;
21 };
22
23 i2c@7000c400 {
24 #address-cells = <1>;
25 #size-cells = <0>;
26 compatible = "nvidia,tegra20-i2c";
27 reg = <0x7000C400 0x100>;
28 interrupts = < 116 >;
29 };
30
31 i2c@7000c500 {
32 #address-cells = <1>;
33 #size-cells = <0>;
34 compatible = "nvidia,tegra20-i2c";
35 reg = <0x7000C500 0x100>;
36 interrupts = < 124 >;
37 };
38
39 i2c@7000d000 {
40 #address-cells = <1>;
41 #size-cells = <0>;
42 compatible = "nvidia,tegra20-i2c";
43 reg = <0x7000D000 0x200>;
44 interrupts = < 85 >;
45 };
46
47 i2s@70002800 {
48 #address-cells = <1>;
49 #size-cells = <0>;
50 compatible = "nvidia,tegra20-i2s";
51 reg = <0x70002800 0x200>;
52 interrupts = < 45 >;
53 dma-channel = < 2 >;
54 };
55
56 i2s@70002a00 {
57 #address-cells = <1>;
58 #size-cells = <0>;
59 compatible = "nvidia,tegra20-i2s";
60 reg = <0x70002a00 0x200>;
61 interrupts = < 35 >;
62 dma-channel = < 1 >;
63 };
64
65 das@70000c00 {
66 #address-cells = <1>;
67 #size-cells = <0>;
68 compatible = "nvidia,tegra20-das";
69 reg = <0x70000c00 0x80>;
70 };
71
72 gpio: gpio@6000d000 {
73 compatible = "nvidia,tegra20-gpio";
74 reg = < 0x6000d000 0x1000 >;
75 interrupts = < 64 65 66 67 87 119 121 >;
76 #gpio-cells = <2>;
77 gpio-controller;
78 };
79
80 serial@70006000 {
81 compatible = "nvidia,tegra20-uart";
82 reg = <0x70006000 0x40>;
83 reg-shift = <2>;
84 interrupts = < 68 >;
85 };
86
87 serial@70006040 {
88 compatible = "nvidia,tegra20-uart";
89 reg = <0x70006040 0x40>;
90 reg-shift = <2>;
91 interrupts = < 69 >;
92 };
93
94 serial@70006200 {
95 compatible = "nvidia,tegra20-uart";
96 reg = <0x70006200 0x100>;
97 reg-shift = <2>;
98 interrupts = < 78 >;
99 };
100
101 serial@70006300 {
102 compatible = "nvidia,tegra20-uart";
103 reg = <0x70006300 0x100>;
104 reg-shift = <2>;
105 interrupts = < 122 >;
106 };
107
108 serial@70006400 {
109 compatible = "nvidia,tegra20-uart";
110 reg = <0x70006400 0x100>;
111 reg-shift = <2>;
112 interrupts = < 123 >;
113 };
114
115 sdhci@c8000000 {
116 compatible = "nvidia,tegra20-sdhci";
117 reg = <0xc8000000 0x200>;
118 interrupts = < 46 >;
119 };
120
121 sdhci@c8000200 {
122 compatible = "nvidia,tegra20-sdhci";
123 reg = <0xc8000200 0x200>;
124 interrupts = < 47 >;
125 };
126
127 sdhci@c8000400 {
128 compatible = "nvidia,tegra20-sdhci";
129 reg = <0xc8000400 0x200>;
130 interrupts = < 51 >;
131 };
132
133 sdhci@c8000600 {
134 compatible = "nvidia,tegra20-sdhci";
135 reg = <0xc8000600 0x200>;
136 interrupts = < 63 >;
137 };
138};
139