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Diffstat (limited to 'arch/arm/boot/dts/tegra20.dtsi')
-rw-r--r--arch/arm/boot/dts/tegra20.dtsi18
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index df34defe1bbd..c417d67e9027 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -72,6 +72,7 @@
72 reg = <0x70002800 0x200>; 72 reg = <0x70002800 0x200>;
73 interrupts = <0 13 0x04>; 73 interrupts = <0 13 0x04>;
74 nvidia,dma-request-selector = <&apbdma 2>; 74 nvidia,dma-request-selector = <&apbdma 2>;
75 status = "disable";
75 }; 76 };
76 77
77 tegra_i2s2: i2s@70002a00 { 78 tegra_i2s2: i2s@70002a00 {
@@ -79,6 +80,7 @@
79 reg = <0x70002a00 0x200>; 80 reg = <0x70002a00 0x200>;
80 interrupts = <0 3 0x04>; 81 interrupts = <0 3 0x04>;
81 nvidia,dma-request-selector = <&apbdma 1>; 82 nvidia,dma-request-selector = <&apbdma 1>;
83 status = "disable";
82 }; 84 };
83 85
84 serial@70006000 { 86 serial@70006000 {
@@ -86,6 +88,7 @@
86 reg = <0x70006000 0x40>; 88 reg = <0x70006000 0x40>;
87 reg-shift = <2>; 89 reg-shift = <2>;
88 interrupts = <0 36 0x04>; 90 interrupts = <0 36 0x04>;
91 status = "disable";
89 }; 92 };
90 93
91 serial@70006040 { 94 serial@70006040 {
@@ -93,6 +96,7 @@
93 reg = <0x70006040 0x40>; 96 reg = <0x70006040 0x40>;
94 reg-shift = <2>; 97 reg-shift = <2>;
95 interrupts = <0 37 0x04>; 98 interrupts = <0 37 0x04>;
99 status = "disable";
96 }; 100 };
97 101
98 serial@70006200 { 102 serial@70006200 {
@@ -100,6 +104,7 @@
100 reg = <0x70006200 0x100>; 104 reg = <0x70006200 0x100>;
101 reg-shift = <2>; 105 reg-shift = <2>;
102 interrupts = <0 46 0x04>; 106 interrupts = <0 46 0x04>;
107 status = "disable";
103 }; 108 };
104 109
105 serial@70006300 { 110 serial@70006300 {
@@ -107,6 +112,7 @@
107 reg = <0x70006300 0x100>; 112 reg = <0x70006300 0x100>;
108 reg-shift = <2>; 113 reg-shift = <2>;
109 interrupts = <0 90 0x04>; 114 interrupts = <0 90 0x04>;
115 status = "disable";
110 }; 116 };
111 117
112 serial@70006400 { 118 serial@70006400 {
@@ -114,6 +120,7 @@
114 reg = <0x70006400 0x100>; 120 reg = <0x70006400 0x100>;
115 reg-shift = <2>; 121 reg-shift = <2>;
116 interrupts = <0 91 0x04>; 122 interrupts = <0 91 0x04>;
123 status = "disable";
117 }; 124 };
118 125
119 i2c@7000c000 { 126 i2c@7000c000 {
@@ -122,6 +129,7 @@
122 interrupts = <0 38 0x04>; 129 interrupts = <0 38 0x04>;
123 #address-cells = <1>; 130 #address-cells = <1>;
124 #size-cells = <0>; 131 #size-cells = <0>;
132 status = "disable";
125 }; 133 };
126 134
127 i2c@7000c400 { 135 i2c@7000c400 {
@@ -130,6 +138,7 @@
130 interrupts = <0 84 0x04>; 138 interrupts = <0 84 0x04>;
131 #address-cells = <1>; 139 #address-cells = <1>;
132 #size-cells = <0>; 140 #size-cells = <0>;
141 status = "disable";
133 }; 142 };
134 143
135 i2c@7000c500 { 144 i2c@7000c500 {
@@ -138,6 +147,7 @@
138 interrupts = <0 92 0x04>; 147 interrupts = <0 92 0x04>;
139 #address-cells = <1>; 148 #address-cells = <1>;
140 #size-cells = <0>; 149 #size-cells = <0>;
150 status = "disable";
141 }; 151 };
142 152
143 i2c@7000d000 { 153 i2c@7000d000 {
@@ -146,6 +156,7 @@
146 interrupts = <0 53 0x04>; 156 interrupts = <0 53 0x04>;
147 #address-cells = <1>; 157 #address-cells = <1>;
148 #size-cells = <0>; 158 #size-cells = <0>;
159 status = "disable";
149 }; 160 };
150 161
151 pmc { 162 pmc {
@@ -179,6 +190,7 @@
179 interrupts = <0 20 0x04>; 190 interrupts = <0 20 0x04>;
180 phy_type = "utmi"; 191 phy_type = "utmi";
181 nvidia,has-legacy-mode; 192 nvidia,has-legacy-mode;
193 status = "disable";
182 }; 194 };
183 195
184 usb@c5004000 { 196 usb@c5004000 {
@@ -186,6 +198,7 @@
186 reg = <0xc5004000 0x4000>; 198 reg = <0xc5004000 0x4000>;
187 interrupts = <0 21 0x04>; 199 interrupts = <0 21 0x04>;
188 phy_type = "ulpi"; 200 phy_type = "ulpi";
201 status = "disable";
189 }; 202 };
190 203
191 usb@c5008000 { 204 usb@c5008000 {
@@ -193,30 +206,35 @@
193 reg = <0xc5008000 0x4000>; 206 reg = <0xc5008000 0x4000>;
194 interrupts = <0 97 0x04>; 207 interrupts = <0 97 0x04>;
195 phy_type = "utmi"; 208 phy_type = "utmi";
209 status = "disable";
196 }; 210 };
197 211
198 sdhci@c8000000 { 212 sdhci@c8000000 {
199 compatible = "nvidia,tegra20-sdhci"; 213 compatible = "nvidia,tegra20-sdhci";
200 reg = <0xc8000000 0x200>; 214 reg = <0xc8000000 0x200>;
201 interrupts = <0 14 0x04>; 215 interrupts = <0 14 0x04>;
216 status = "disable";
202 }; 217 };
203 218
204 sdhci@c8000200 { 219 sdhci@c8000200 {
205 compatible = "nvidia,tegra20-sdhci"; 220 compatible = "nvidia,tegra20-sdhci";
206 reg = <0xc8000200 0x200>; 221 reg = <0xc8000200 0x200>;
207 interrupts = <0 15 0x04>; 222 interrupts = <0 15 0x04>;
223 status = "disable";
208 }; 224 };
209 225
210 sdhci@c8000400 { 226 sdhci@c8000400 {
211 compatible = "nvidia,tegra20-sdhci"; 227 compatible = "nvidia,tegra20-sdhci";
212 reg = <0xc8000400 0x200>; 228 reg = <0xc8000400 0x200>;
213 interrupts = <0 19 0x04>; 229 interrupts = <0 19 0x04>;
230 status = "disable";
214 }; 231 };
215 232
216 sdhci@c8000600 { 233 sdhci@c8000600 {
217 compatible = "nvidia,tegra20-sdhci"; 234 compatible = "nvidia,tegra20-sdhci";
218 reg = <0xc8000600 0x200>; 235 reg = <0xc8000600 0x200>;
219 interrupts = <0 31 0x04>; 236 interrupts = <0 31 0x04>;
237 status = "disable";
220 }; 238 };
221 239
222 pmu { 240 pmu {