diff options
Diffstat (limited to 'arch/arm/boot/dts/omap4.dtsi')
-rw-r--r-- | arch/arm/boot/dts/omap4.dtsi | 18 |
1 files changed, 14 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi index 87401d9f4d8b..f2091d1c9c36 100644 --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi | |||
@@ -14,7 +14,7 @@ | |||
14 | 14 | ||
15 | / { | 15 | / { |
16 | compatible = "ti,omap4430", "ti,omap4"; | 16 | compatible = "ti,omap4430", "ti,omap4"; |
17 | interrupt-parent = <&gic>; | 17 | interrupt-parent = <&wakeupgen>; |
18 | 18 | ||
19 | aliases { | 19 | aliases { |
20 | i2c0 = &i2c1; | 20 | i2c0 = &i2c1; |
@@ -56,6 +56,7 @@ | |||
56 | #interrupt-cells = <3>; | 56 | #interrupt-cells = <3>; |
57 | reg = <0x48241000 0x1000>, | 57 | reg = <0x48241000 0x1000>, |
58 | <0x48240100 0x0100>; | 58 | <0x48240100 0x0100>; |
59 | interrupt-parent = <&gic>; | ||
59 | }; | 60 | }; |
60 | 61 | ||
61 | L2: l2-cache-controller@48242000 { | 62 | L2: l2-cache-controller@48242000 { |
@@ -70,6 +71,15 @@ | |||
70 | clocks = <&mpu_periphclk>; | 71 | clocks = <&mpu_periphclk>; |
71 | reg = <0x48240600 0x20>; | 72 | reg = <0x48240600 0x20>; |
72 | interrupts = <GIC_PPI 13 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_HIGH)>; | 73 | interrupts = <GIC_PPI 13 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_HIGH)>; |
74 | interrupt-parent = <&gic>; | ||
75 | }; | ||
76 | |||
77 | wakeupgen: interrupt-controller@48281000 { | ||
78 | compatible = "ti,omap4-wugen-mpu"; | ||
79 | interrupt-controller; | ||
80 | #interrupt-cells = <3>; | ||
81 | reg = <0x48281000 0x1000>; | ||
82 | interrupt-parent = <&gic>; | ||
73 | }; | 83 | }; |
74 | 84 | ||
75 | /* | 85 | /* |
@@ -319,7 +329,7 @@ | |||
319 | uart2: serial@4806c000 { | 329 | uart2: serial@4806c000 { |
320 | compatible = "ti,omap4-uart"; | 330 | compatible = "ti,omap4-uart"; |
321 | reg = <0x4806c000 0x100>; | 331 | reg = <0x4806c000 0x100>; |
322 | interrupts-extended = <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; | 332 | interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; |
323 | ti,hwmods = "uart2"; | 333 | ti,hwmods = "uart2"; |
324 | clock-frequency = <48000000>; | 334 | clock-frequency = <48000000>; |
325 | }; | 335 | }; |
@@ -327,7 +337,7 @@ | |||
327 | uart3: serial@48020000 { | 337 | uart3: serial@48020000 { |
328 | compatible = "ti,omap4-uart"; | 338 | compatible = "ti,omap4-uart"; |
329 | reg = <0x48020000 0x100>; | 339 | reg = <0x48020000 0x100>; |
330 | interrupts-extended = <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; | 340 | interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; |
331 | ti,hwmods = "uart3"; | 341 | ti,hwmods = "uart3"; |
332 | clock-frequency = <48000000>; | 342 | clock-frequency = <48000000>; |
333 | }; | 343 | }; |
@@ -335,7 +345,7 @@ | |||
335 | uart4: serial@4806e000 { | 345 | uart4: serial@4806e000 { |
336 | compatible = "ti,omap4-uart"; | 346 | compatible = "ti,omap4-uart"; |
337 | reg = <0x4806e000 0x100>; | 347 | reg = <0x4806e000 0x100>; |
338 | interrupts-extended = <&gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; | 348 | interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; |
339 | ti,hwmods = "uart4"; | 349 | ti,hwmods = "uart4"; |
340 | clock-frequency = <48000000>; | 350 | clock-frequency = <48000000>; |
341 | }; | 351 | }; |