diff options
Diffstat (limited to 'arch/arm/boot/dts/omap3xxx-clocks.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/omap3xxx-clocks.dtsi | 13 |
1 files changed, 7 insertions, 6 deletions
diff --git a/arch/arm/boot/dts/omap3xxx-clocks.dtsi b/arch/arm/boot/dts/omap3xxx-clocks.dtsi index 5c375003bad1..bbba5bdc4bc9 100644 --- a/arch/arm/boot/dts/omap3xxx-clocks.dtsi +++ b/arch/arm/boot/dts/omap3xxx-clocks.dtsi | |||
| @@ -79,13 +79,14 @@ | |||
| 79 | clock-div = <1>; | 79 | clock-div = <1>; |
| 80 | }; | 80 | }; |
| 81 | }; | 81 | }; |
| 82 | &scrm_clocks { | 82 | |
| 83 | &scm_clocks { | ||
| 83 | mcbsp5_mux_fck: mcbsp5_mux_fck { | 84 | mcbsp5_mux_fck: mcbsp5_mux_fck { |
| 84 | #clock-cells = <0>; | 85 | #clock-cells = <0>; |
| 85 | compatible = "ti,composite-mux-clock"; | 86 | compatible = "ti,composite-mux-clock"; |
| 86 | clocks = <&core_96m_fck>, <&mcbsp_clks>; | 87 | clocks = <&core_96m_fck>, <&mcbsp_clks>; |
| 87 | ti,bit-shift = <4>; | 88 | ti,bit-shift = <4>; |
| 88 | reg = <0x02d8>; | 89 | reg = <0x68>; |
| 89 | }; | 90 | }; |
| 90 | 91 | ||
| 91 | mcbsp5_fck: mcbsp5_fck { | 92 | mcbsp5_fck: mcbsp5_fck { |
| @@ -99,7 +100,7 @@ | |||
| 99 | compatible = "ti,composite-mux-clock"; | 100 | compatible = "ti,composite-mux-clock"; |
| 100 | clocks = <&core_96m_fck>, <&mcbsp_clks>; | 101 | clocks = <&core_96m_fck>, <&mcbsp_clks>; |
| 101 | ti,bit-shift = <2>; | 102 | ti,bit-shift = <2>; |
| 102 | reg = <0x0274>; | 103 | reg = <0x04>; |
| 103 | }; | 104 | }; |
| 104 | 105 | ||
| 105 | mcbsp1_fck: mcbsp1_fck { | 106 | mcbsp1_fck: mcbsp1_fck { |
| @@ -113,7 +114,7 @@ | |||
| 113 | compatible = "ti,composite-mux-clock"; | 114 | compatible = "ti,composite-mux-clock"; |
| 114 | clocks = <&per_96m_fck>, <&mcbsp_clks>; | 115 | clocks = <&per_96m_fck>, <&mcbsp_clks>; |
| 115 | ti,bit-shift = <6>; | 116 | ti,bit-shift = <6>; |
| 116 | reg = <0x0274>; | 117 | reg = <0x04>; |
| 117 | }; | 118 | }; |
| 118 | 119 | ||
| 119 | mcbsp2_fck: mcbsp2_fck { | 120 | mcbsp2_fck: mcbsp2_fck { |
| @@ -126,7 +127,7 @@ | |||
| 126 | #clock-cells = <0>; | 127 | #clock-cells = <0>; |
| 127 | compatible = "ti,composite-mux-clock"; | 128 | compatible = "ti,composite-mux-clock"; |
| 128 | clocks = <&per_96m_fck>, <&mcbsp_clks>; | 129 | clocks = <&per_96m_fck>, <&mcbsp_clks>; |
| 129 | reg = <0x02d8>; | 130 | reg = <0x68>; |
| 130 | }; | 131 | }; |
| 131 | 132 | ||
| 132 | mcbsp3_fck: mcbsp3_fck { | 133 | mcbsp3_fck: mcbsp3_fck { |
| @@ -140,7 +141,7 @@ | |||
| 140 | compatible = "ti,composite-mux-clock"; | 141 | compatible = "ti,composite-mux-clock"; |
| 141 | clocks = <&per_96m_fck>, <&mcbsp_clks>; | 142 | clocks = <&per_96m_fck>, <&mcbsp_clks>; |
| 142 | ti,bit-shift = <2>; | 143 | ti,bit-shift = <2>; |
| 143 | reg = <0x02d8>; | 144 | reg = <0x68>; |
| 144 | }; | 145 | }; |
| 145 | 146 | ||
| 146 | mcbsp4_fck: mcbsp4_fck { | 147 | mcbsp4_fck: mcbsp4_fck { |