diff options
Diffstat (limited to 'arch/arm/boot/dts/omap3-overo-base.dtsi')
-rw-r--r-- | arch/arm/boot/dts/omap3-overo-base.dtsi | 72 |
1 files changed, 72 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/omap3-overo-base.dtsi b/arch/arm/boot/dts/omap3-overo-base.dtsi index aea64c09d02b..edac70e9204c 100644 --- a/arch/arm/boot/dts/omap3-overo-base.dtsi +++ b/arch/arm/boot/dts/omap3-overo-base.dtsi | |||
@@ -29,9 +29,50 @@ | |||
29 | ti,mcbsp = <&mcbsp2>; | 29 | ti,mcbsp = <&mcbsp2>; |
30 | ti,codec = <&twl_audio>; | 30 | ti,codec = <&twl_audio>; |
31 | }; | 31 | }; |
32 | |||
33 | /* Regulator to trigger the nPoweron signal of the Wifi module */ | ||
34 | w3cbw003c_npoweron: regulator-w3cbw003c-npoweron { | ||
35 | compatible = "regulator-fixed"; | ||
36 | regulator-name = "regulator-w3cbw003c-npoweron"; | ||
37 | regulator-min-microvolt = <3300000>; | ||
38 | regulator-max-microvolt = <3300000>; | ||
39 | gpio = <&gpio2 22 GPIO_ACTIVE_HIGH>; /* gpio_54: nPoweron */ | ||
40 | enable-active-high; | ||
41 | }; | ||
42 | |||
43 | /* Regulator to trigger the nReset signal of the Wifi module */ | ||
44 | w3cbw003c_wifi_nreset: regulator-w3cbw003c-wifi-nreset { | ||
45 | pinctrl-names = "default"; | ||
46 | pinctrl-0 = <&w3cbw003c_pins &w3cbw003c_2_pins>; | ||
47 | compatible = "regulator-fixed"; | ||
48 | regulator-name = "regulator-w3cbw003c-wifi-nreset"; | ||
49 | regulator-min-microvolt = <3300000>; | ||
50 | regulator-max-microvolt = <3300000>; | ||
51 | gpio = <&gpio1 16 GPIO_ACTIVE_HIGH>; /* gpio_16: WiFi nReset */ | ||
52 | startup-delay-us = <10000>; | ||
53 | }; | ||
54 | |||
55 | /* Regulator to trigger the nReset signal of the Bluetooth module */ | ||
56 | w3cbw003c_bt_nreset: regulator-w3cbw003c-bt-nreset { | ||
57 | compatible = "regulator-fixed"; | ||
58 | regulator-name = "regulator-w3cbw003c-bt-nreset"; | ||
59 | regulator-min-microvolt = <3300000>; | ||
60 | regulator-max-microvolt = <3300000>; | ||
61 | gpio = <&gpio6 4 GPIO_ACTIVE_HIGH>; /* gpio_164: BT nReset */ | ||
62 | startup-delay-us = <10000>; | ||
63 | }; | ||
32 | }; | 64 | }; |
33 | 65 | ||
34 | &omap3_pmx_core { | 66 | &omap3_pmx_core { |
67 | uart2_pins: pinmux_uart2_pins { | ||
68 | pinctrl-single,pins = < | ||
69 | OMAP3_CORE1_IOPAD(0x216c, PIN_INPUT | MUX_MODE1) /* mcbsp3_dx.uart2_cts */ | ||
70 | OMAP3_CORE1_IOPAD(0x216e, PIN_OUTPUT | MUX_MODE1) /* mcbsp3_dr.uart2_rts */ | ||
71 | OMAP3_CORE1_IOPAD(0x2170, PIN_OUTPUT | MUX_MODE1) /* mcbsp3_clk.uart2_tx */ | ||
72 | OMAP3_CORE1_IOPAD(0x2172, PIN_INPUT | MUX_MODE1) /* mcbsp3_fsx.uart2_rx */ | ||
73 | >; | ||
74 | }; | ||
75 | |||
35 | uart3_pins: pinmux_uart3_pins { | 76 | uart3_pins: pinmux_uart3_pins { |
36 | pinctrl-single,pins = < | 77 | pinctrl-single,pins = < |
37 | OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */ | 78 | OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */ |
@@ -56,6 +97,25 @@ | |||
56 | OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */ | 97 | OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */ |
57 | >; | 98 | >; |
58 | }; | 99 | }; |
100 | |||
101 | mmc2_pins: pinmux_mmc2_pins { | ||
102 | pinctrl-single,pins = < | ||
103 | OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */ | ||
104 | OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */ | ||
105 | OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */ | ||
106 | OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */ | ||
107 | OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */ | ||
108 | OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */ | ||
109 | >; | ||
110 | }; | ||
111 | |||
112 | /* WiFi/BT combo */ | ||
113 | w3cbw003c_pins: pinmux_w3cbw003c_pins { | ||
114 | pinctrl-single,pins = < | ||
115 | OMAP3_CORE1_IOPAD(0x20b4, PIN_OUTPUT | MUX_MODE4) /* gpmc_ncs3.gpio_54 */ | ||
116 | OMAP3_CORE1_IOPAD(0x219c, PIN_OUTPUT | MUX_MODE4) /* uart3_rts_sd.gpio_164 */ | ||
117 | >; | ||
118 | }; | ||
59 | }; | 119 | }; |
60 | 120 | ||
61 | &i2c1 { | 121 | &i2c1 { |
@@ -94,7 +154,14 @@ | |||
94 | 154 | ||
95 | /* optional on board WiFi */ | 155 | /* optional on board WiFi */ |
96 | &mmc2 { | 156 | &mmc2 { |
157 | pinctrl-names = "default"; | ||
158 | pinctrl-0 = <&mmc2_pins>; | ||
159 | vmmc-supply = <&w3cbw003c_npoweron>; | ||
160 | vqmmc-supply = <&w3cbw003c_bt_nreset>; | ||
161 | vmmc_aux-supply = <&w3cbw003c_wifi_nreset>; | ||
97 | bus-width = <4>; | 162 | bus-width = <4>; |
163 | cap-sdio-irq; | ||
164 | non-removable; | ||
98 | }; | 165 | }; |
99 | 166 | ||
100 | &twl_gpio { | 167 | &twl_gpio { |
@@ -110,6 +177,11 @@ | |||
110 | power = <50>; | 177 | power = <50>; |
111 | }; | 178 | }; |
112 | 179 | ||
180 | &uart2 { | ||
181 | pinctrl-names = "default"; | ||
182 | pinctrl-0 = <&uart2_pins>; | ||
183 | }; | ||
184 | |||
113 | &uart3 { | 185 | &uart3 { |
114 | pinctrl-names = "default"; | 186 | pinctrl-names = "default"; |
115 | pinctrl-0 = <&uart3_pins>; | 187 | pinctrl-0 = <&uart3_pins>; |