diff options
Diffstat (limited to 'arch/arm/boot/dts/imx51.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/imx51.dtsi | 53 |
1 files changed, 53 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi index 1f5d45eff45e..fcf035bf7c5a 100644 --- a/arch/arm/boot/dts/imx51.dtsi +++ b/arch/arm/boot/dts/imx51.dtsi | |||
| @@ -221,6 +221,14 @@ | |||
| 221 | #interrupt-cells = <2>; | 221 | #interrupt-cells = <2>; |
| 222 | }; | 222 | }; |
| 223 | 223 | ||
| 224 | kpp: kpp@73f94000 { | ||
| 225 | compatible = "fsl,imx51-kpp", "fsl,imx21-kpp"; | ||
| 226 | reg = <0x73f94000 0x4000>; | ||
| 227 | interrupts = <60>; | ||
| 228 | clocks = <&clks 0>; | ||
| 229 | status = "disabled"; | ||
| 230 | }; | ||
| 231 | |||
| 224 | wdog1: wdog@73f98000 { | 232 | wdog1: wdog@73f98000 { |
| 225 | compatible = "fsl,imx51-wdt", "fsl,imx21-wdt"; | 233 | compatible = "fsl,imx51-wdt", "fsl,imx21-wdt"; |
| 226 | reg = <0x73f98000 0x4000>; | 234 | reg = <0x73f98000 0x4000>; |
| @@ -273,6 +281,29 @@ | |||
| 273 | 260 0x80000000 /* MX51_PAD_NANDF_RDY_INT__FEC_TX_CLK */ | 281 | 260 0x80000000 /* MX51_PAD_NANDF_RDY_INT__FEC_TX_CLK */ |
| 274 | >; | 282 | >; |
| 275 | }; | 283 | }; |
| 284 | |||
| 285 | pinctrl_fec_2: fecgrp-2 { | ||
| 286 | fsl,pins = < | ||
| 287 | 589 0x80000000 /* MX51_PAD_DI_GP3__FEC_TX_ER */ | ||
| 288 | 592 0x80000000 /* MX51_PAD_DI2_PIN4__FEC_CRS */ | ||
| 289 | 594 0x80000000 /* MX51_PAD_DI2_PIN2__FEC_MDC */ | ||
| 290 | 596 0x80000000 /* MX51_PAD_DI2_PIN3__FEC_MDIO */ | ||
| 291 | 598 0x80000000 /* MX51_PAD_DI2_DISP_CLK__FEC_RDATA1 */ | ||
| 292 | 602 0x80000000 /* MX51_PAD_DI_GP4__FEC_RDATA2 */ | ||
| 293 | 604 0x80000000 /* MX51_PAD_DISP2_DAT0__FEC_RDATA3 */ | ||
| 294 | 609 0x80000000 /* MX51_PAD_DISP2_DAT1__FEC_RX_ER */ | ||
| 295 | 618 0x80000000 /* MX51_PAD_DISP2_DAT6__FEC_TDATA1 */ | ||
| 296 | 623 0x80000000 /* MX51_PAD_DISP2_DAT7__FEC_TDATA2 */ | ||
| 297 | 628 0x80000000 /* MX51_PAD_DISP2_DAT8__FEC_TDATA3 */ | ||
| 298 | 634 0x80000000 /* MX51_PAD_DISP2_DAT9__FEC_TX_EN */ | ||
| 299 | 639 0x80000000 /* MX51_PAD_DISP2_DAT10__FEC_COL */ | ||
| 300 | 644 0x80000000 /* MX51_PAD_DISP2_DAT11__FEC_RX_CLK */ | ||
| 301 | 649 0x80000000 /* MX51_PAD_DISP2_DAT12__FEC_RX_DV */ | ||
| 302 | 653 0x80000000 /* MX51_PAD_DISP2_DAT13__FEC_TX_CLK */ | ||
| 303 | 657 0x80000000 /* MX51_PAD_DISP2_DAT14__FEC_RDATA0 */ | ||
| 304 | 662 0x80000000 /* MX51_PAD_DISP2_DAT15__FEC_TDATA0 */ | ||
| 305 | >; | ||
| 306 | }; | ||
| 276 | }; | 307 | }; |
| 277 | 308 | ||
| 278 | ecspi1 { | 309 | ecspi1 { |
| @@ -409,6 +440,28 @@ | |||
| 409 | 49 0x1c5 /* MX51_PAD_EIM_D24__UART3_CTS */ | 440 | 49 0x1c5 /* MX51_PAD_EIM_D24__UART3_CTS */ |
| 410 | >; | 441 | >; |
| 411 | }; | 442 | }; |
| 443 | |||
| 444 | pinctrl_uart3_2: uart3grp-2 { | ||
| 445 | fsl,pins = < | ||
| 446 | 434 0x1c5 /* MX51_PAD_UART3_RXD__UART3_RXD */ | ||
| 447 | 430 0x1c5 /* MX51_PAD_UART3_TXD__UART3_TXD */ | ||
| 448 | >; | ||
| 449 | }; | ||
| 450 | }; | ||
| 451 | |||
| 452 | kpp { | ||
| 453 | pinctrl_kpp_1: kppgrp-1 { | ||
| 454 | fsl,pins = < | ||
| 455 | 438 0xe0 /* MX51_PAD_KEY_ROW0__KEY_ROW0 */ | ||
| 456 | 439 0xe0 /* MX51_PAD_KEY_ROW1__KEY_ROW1 */ | ||
| 457 | 440 0xe0 /* MX51_PAD_KEY_ROW2__KEY_ROW2 */ | ||
| 458 | 441 0xe0 /* MX51_PAD_KEY_ROW3__KEY_ROW3 */ | ||
| 459 | 442 0xe8 /* MX51_PAD_KEY_COL0__KEY_COL0 */ | ||
| 460 | 444 0xe8 /* MX51_PAD_KEY_COL1__KEY_COL1 */ | ||
| 461 | 446 0xe8 /* MX51_PAD_KEY_COL2__KEY_COL2 */ | ||
| 462 | 448 0xe8 /* MX51_PAD_KEY_COL3__KEY_COL3 */ | ||
| 463 | >; | ||
| 464 | }; | ||
| 412 | }; | 465 | }; |
| 413 | }; | 466 | }; |
| 414 | 467 | ||