diff options
Diffstat (limited to 'arch/arm/boot/dts/imx27-pdk.dts')
-rw-r--r-- | arch/arm/boot/dts/imx27-pdk.dts | 170 |
1 files changed, 168 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/imx27-pdk.dts b/arch/arm/boot/dts/imx27-pdk.dts index 5ce89aa275df..4c317716b510 100644 --- a/arch/arm/boot/dts/imx27-pdk.dts +++ b/arch/arm/boot/dts/imx27-pdk.dts | |||
@@ -17,15 +17,181 @@ | |||
17 | compatible = "fsl,imx27-pdk", "fsl,imx27"; | 17 | compatible = "fsl,imx27-pdk", "fsl,imx27"; |
18 | 18 | ||
19 | memory { | 19 | memory { |
20 | reg = <0x0 0x0>; | 20 | reg = <0xa0000000 0x08000000>; |
21 | }; | 21 | }; |
22 | |||
23 | usbphy { | ||
24 | compatible = "simple-bus"; | ||
25 | #address-cells = <1>; | ||
26 | #size-cells = <0>; | ||
27 | |||
28 | usbphy0: usbphy@0 { | ||
29 | compatible = "usb-nop-xceiv"; | ||
30 | reg = <0>; | ||
31 | clocks = <&clks 0>; | ||
32 | clock-names = "main_clk"; | ||
33 | }; | ||
34 | }; | ||
35 | }; | ||
36 | |||
37 | &cspi2 { | ||
38 | pinctrl-names = "default"; | ||
39 | pinctrl-0 = <&pinctrl_cspi2>; | ||
40 | fsl,spi-num-chipselects = <1>; | ||
41 | cs-gpios = <&gpio4 21 GPIO_ACTIVE_HIGH>; | ||
42 | status = "okay"; | ||
43 | |||
44 | pmic: mc13783@0 { | ||
45 | compatible = "fsl,mc13783"; | ||
46 | reg = <0>; | ||
47 | spi-cs-high; | ||
48 | spi-max-frequency = <1000000>; | ||
49 | interrupt-parent = <&gpio3>; | ||
50 | interrupts = <14 IRQ_TYPE_LEVEL_HIGH>; | ||
51 | |||
52 | regulators { | ||
53 | vgen_reg: vgen { | ||
54 | regulator-min-microvolt = <1500000>; | ||
55 | regulator-max-microvolt = <1500000>; | ||
56 | regulator-always-on; | ||
57 | regulator-boot-on; | ||
58 | }; | ||
59 | |||
60 | vmmc1_reg: vmmc1 { | ||
61 | regulator-min-microvolt = <1600000>; | ||
62 | regulator-max-microvolt = <3000000>; | ||
63 | }; | ||
64 | |||
65 | gpo1_reg: gpo1 { | ||
66 | regulator-always-on; | ||
67 | regulator-boot-on; | ||
68 | }; | ||
69 | |||
70 | gpo3_reg: gpo3 { | ||
71 | regulator-always-on; | ||
72 | regulator-boot-on; | ||
73 | }; | ||
74 | }; | ||
75 | }; | ||
76 | }; | ||
77 | |||
78 | &fec { | ||
79 | phy-mode = "mii"; | ||
80 | pinctrl-names = "default"; | ||
81 | pinctrl-0 = <&pinctrl_fec>; | ||
82 | status = "okay"; | ||
83 | }; | ||
84 | |||
85 | &kpp { | ||
86 | linux,keymap = < | ||
87 | MATRIX_KEY(0, 0, KEY_UP) | ||
88 | MATRIX_KEY(0, 1, KEY_DOWN) | ||
89 | MATRIX_KEY(1, 0, KEY_RIGHT) | ||
90 | MATRIX_KEY(1, 1, KEY_LEFT) | ||
91 | MATRIX_KEY(1, 2, KEY_ENTER) | ||
92 | MATRIX_KEY(2, 0, KEY_F6) | ||
93 | MATRIX_KEY(2, 1, KEY_F8) | ||
94 | MATRIX_KEY(2, 2, KEY_F9) | ||
95 | MATRIX_KEY(2, 3, KEY_F10) | ||
96 | >; | ||
97 | status = "okay"; | ||
98 | }; | ||
99 | |||
100 | &nfc { | ||
101 | pinctrl-names = "default"; | ||
102 | pinctrl-0 = <&pinctrl_nand>; | ||
103 | nand-ecc-mode = "hw"; | ||
104 | nand-on-flash-bbt; | ||
105 | status = "okay"; | ||
22 | }; | 106 | }; |
23 | 107 | ||
24 | &uart1 { | 108 | &uart1 { |
25 | fsl,uart-has-rtscts; | 109 | fsl,uart-has-rtscts; |
110 | pinctrl-names = "default"; | ||
111 | pinctrl-0 = <&pinctrl_uart1>; | ||
26 | status = "okay"; | 112 | status = "okay"; |
27 | }; | 113 | }; |
28 | 114 | ||
29 | &fec { | 115 | &usbotg { |
116 | pinctrl-names = "default"; | ||
117 | pinctrl-0 = <&pinctrl_usbotg>; | ||
118 | dr_mode = "otg"; | ||
119 | fsl,usbphy = <&usbphy0>; | ||
120 | phy_type = "ulpi"; | ||
30 | status = "okay"; | 121 | status = "okay"; |
31 | }; | 122 | }; |
123 | |||
124 | &iomuxc { | ||
125 | imx27-pdk { | ||
126 | pinctrl_cspi2: cspi2grp { | ||
127 | fsl,pins = < | ||
128 | MX27_PAD_CSPI2_MISO__CSPI2_MISO 0x0 | ||
129 | MX27_PAD_CSPI2_MOSI__CSPI2_MOSI 0x0 | ||
130 | MX27_PAD_CSPI2_SCLK__CSPI2_SCLK 0x0 | ||
131 | MX27_PAD_CSPI2_SS0__GPIO4_21 0x0 /* SPI2 CS0 */ | ||
132 | MX27_PAD_TOUT__GPIO3_14 0x0 /* PMIC IRQ */ | ||
133 | >; | ||
134 | }; | ||
135 | |||
136 | pinctrl_fec: fecgrp { | ||
137 | fsl,pins = < | ||
138 | MX27_PAD_SD3_CMD__FEC_TXD0 0x0 | ||
139 | MX27_PAD_SD3_CLK__FEC_TXD1 0x0 | ||
140 | MX27_PAD_ATA_DATA0__FEC_TXD2 0x0 | ||
141 | MX27_PAD_ATA_DATA1__FEC_TXD3 0x0 | ||
142 | MX27_PAD_ATA_DATA2__FEC_RX_ER 0x0 | ||
143 | MX27_PAD_ATA_DATA3__FEC_RXD1 0x0 | ||
144 | MX27_PAD_ATA_DATA4__FEC_RXD2 0x0 | ||
145 | MX27_PAD_ATA_DATA5__FEC_RXD3 0x0 | ||
146 | MX27_PAD_ATA_DATA6__FEC_MDIO 0x0 | ||
147 | MX27_PAD_ATA_DATA7__FEC_MDC 0x0 | ||
148 | MX27_PAD_ATA_DATA8__FEC_CRS 0x0 | ||
149 | MX27_PAD_ATA_DATA9__FEC_TX_CLK 0x0 | ||
150 | MX27_PAD_ATA_DATA10__FEC_RXD0 0x0 | ||
151 | MX27_PAD_ATA_DATA11__FEC_RX_DV 0x0 | ||
152 | MX27_PAD_ATA_DATA12__FEC_RX_CLK 0x0 | ||
153 | MX27_PAD_ATA_DATA13__FEC_COL 0x0 | ||
154 | MX27_PAD_ATA_DATA14__FEC_TX_ER 0x0 | ||
155 | MX27_PAD_ATA_DATA15__FEC_TX_EN 0x0 | ||
156 | >; | ||
157 | }; | ||
158 | |||
159 | pinctrl_nand: nandgrp { | ||
160 | fsl,pins = < | ||
161 | MX27_PAD_NFRB__NFRB 0x0 | ||
162 | MX27_PAD_NFCLE__NFCLE 0x0 | ||
163 | MX27_PAD_NFWP_B__NFWP_B 0x0 | ||
164 | MX27_PAD_NFCE_B__NFCE_B 0x0 | ||
165 | MX27_PAD_NFALE__NFALE 0x0 | ||
166 | MX27_PAD_NFRE_B__NFRE_B 0x0 | ||
167 | MX27_PAD_NFWE_B__NFWE_B 0x0 | ||
168 | >; | ||
169 | }; | ||
170 | |||
171 | pinctrl_uart1: uart1grp { | ||
172 | fsl,pins = < | ||
173 | MX27_PAD_UART1_TXD__UART1_TXD 0x0 | ||
174 | MX27_PAD_UART1_RXD__UART1_RXD 0x0 | ||
175 | MX27_PAD_UART1_CTS__UART1_CTS 0x0 | ||
176 | MX27_PAD_UART1_RTS__UART1_RTS 0x0 | ||
177 | >; | ||
178 | }; | ||
179 | |||
180 | pinctrl_usbotg: usbotggrp { | ||
181 | fsl,pins = < | ||
182 | MX27_PAD_USBOTG_NXT__USBOTG_NXT 0x0 | ||
183 | MX27_PAD_USBOTG_STP__USBOTG_STP 0x0 | ||
184 | MX27_PAD_USBOTG_DIR__USBOTG_DIR 0x0 | ||
185 | MX27_PAD_USBOTG_CLK__USBOTG_CLK 0x0 | ||
186 | MX27_PAD_USBOTG_DATA0__USBOTG_DATA0 0x0 | ||
187 | MX27_PAD_USBOTG_DATA1__USBOTG_DATA1 0x0 | ||
188 | MX27_PAD_USBOTG_DATA2__USBOTG_DATA2 0x0 | ||
189 | MX27_PAD_USBOTG_DATA3__USBOTG_DATA3 0x0 | ||
190 | MX27_PAD_USBOTG_DATA4__USBOTG_DATA4 0x0 | ||
191 | MX27_PAD_USBOTG_DATA5__USBOTG_DATA5 0x0 | ||
192 | MX27_PAD_USBOTG_DATA6__USBOTG_DATA6 0x0 | ||
193 | MX27_PAD_USBOTG_DATA7__USBOTG_DATA7 0x0 | ||
194 | >; | ||
195 | }; | ||
196 | }; | ||
197 | }; | ||