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-rw-r--r--arch/arm/boot/dts/exynos5250.dtsi78
1 files changed, 15 insertions, 63 deletions
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index 964158c1844f..41cd625b6020 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -17,14 +17,13 @@
17 * published by the Free Software Foundation. 17 * published by the Free Software Foundation.
18*/ 18*/
19 19
20#include "skeleton.dtsi" 20#include "exynos5.dtsi"
21#include "exynos5250-pinctrl.dtsi" 21#include "exynos5250-pinctrl.dtsi"
22 22
23#include <dt-bindings/clk/exynos-audss-clk.h> 23#include <dt-bindings/clk/exynos-audss-clk.h>
24 24
25/ { 25/ {
26 compatible = "samsung,exynos5250"; 26 compatible = "samsung,exynos5250";
27 interrupt-parent = <&gic>;
28 27
29 aliases { 28 aliases {
30 spi0 = &spi_0; 29 spi0 = &spi_0;
@@ -53,9 +52,20 @@
53 pinctrl3 = &pinctrl_3; 52 pinctrl3 = &pinctrl_3;
54 }; 53 };
55 54
56 chipid@10000000 { 55 cpus {
57 compatible = "samsung,exynos4210-chipid"; 56 #address-cells = <1>;
58 reg = <0x10000000 0x100>; 57 #size-cells = <0>;
58
59 cpu@0 {
60 device_type = "cpu";
61 compatible = "arm,cortex-a15";
62 reg = <0>;
63 };
64 cpu@1 {
65 device_type = "cpu";
66 compatible = "arm,cortex-a15";
67 reg = <1>;
68 };
59 }; 69 };
60 70
61 pd_gsc: gsc-power-domain@0x10044000 { 71 pd_gsc: gsc-power-domain@0x10044000 {
@@ -80,17 +90,6 @@
80 #clock-cells = <1>; 90 #clock-cells = <1>;
81 }; 91 };
82 92
83 gic:interrupt-controller@10481000 {
84 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
85 #interrupt-cells = <3>;
86 interrupt-controller;
87 reg = <0x10481000 0x1000>,
88 <0x10482000 0x1000>,
89 <0x10484000 0x2000>,
90 <0x10486000 0x2000>;
91 interrupts = <1 9 0xf04>;
92 };
93
94 timer { 93 timer {
95 compatible = "arm,armv7-timer"; 94 compatible = "arm,armv7-timer";
96 interrupts = <1 13 0xf08>, 95 interrupts = <1 13 0xf08>,
@@ -99,22 +98,6 @@
99 <1 10 0xf08>; 98 <1 10 0xf08>;
100 }; 99 };
101 100
102 combiner:interrupt-controller@10440000 {
103 compatible = "samsung,exynos4210-combiner";
104 #interrupt-cells = <2>;
105 interrupt-controller;
106 samsung,combiner-nr = <32>;
107 reg = <0x10440000 0x1000>;
108 interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
109 <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
110 <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
111 <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>,
112 <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
113 <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>,
114 <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>,
115 <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>;
116 };
117
118 mct@101C0000 { 101 mct@101C0000 {
119 compatible = "samsung,exynos4210-mct"; 102 compatible = "samsung,exynos4210-mct";
120 reg = <0x101C0000 0x800>; 103 reg = <0x101C0000 0x800>;
@@ -176,9 +159,6 @@
176 }; 159 };
177 160
178 watchdog { 161 watchdog {
179 compatible = "samsung,s3c2410-wdt";
180 reg = <0x101D0000 0x100>;
181 interrupts = <0 42 0>;
182 clocks = <&clock 336>; 162 clocks = <&clock 336>;
183 clock-names = "watchdog"; 163 clock-names = "watchdog";
184 }; 164 };
@@ -191,12 +171,8 @@
191 }; 171 };
192 172
193 rtc { 173 rtc {
194 compatible = "samsung,s3c6410-rtc";
195 reg = <0x101E0000 0x100>;
196 interrupts = <0 43 0>, <0 44 0>;
197 clocks = <&clock 337>; 174 clocks = <&clock 337>;
198 clock-names = "rtc"; 175 clock-names = "rtc";
199 status = "disabled";
200 }; 176 };
201 177
202 tmu@10060000 { 178 tmu@10060000 {
@@ -208,33 +184,21 @@
208 }; 184 };
209 185
210 serial@12C00000 { 186 serial@12C00000 {
211 compatible = "samsung,exynos4210-uart";
212 reg = <0x12C00000 0x100>;
213 interrupts = <0 51 0>;
214 clocks = <&clock 289>, <&clock 146>; 187 clocks = <&clock 289>, <&clock 146>;
215 clock-names = "uart", "clk_uart_baud0"; 188 clock-names = "uart", "clk_uart_baud0";
216 }; 189 };
217 190
218 serial@12C10000 { 191 serial@12C10000 {
219 compatible = "samsung,exynos4210-uart";
220 reg = <0x12C10000 0x100>;
221 interrupts = <0 52 0>;
222 clocks = <&clock 290>, <&clock 147>; 192 clocks = <&clock 290>, <&clock 147>;
223 clock-names = "uart", "clk_uart_baud0"; 193 clock-names = "uart", "clk_uart_baud0";
224 }; 194 };
225 195
226 serial@12C20000 { 196 serial@12C20000 {
227 compatible = "samsung,exynos4210-uart";
228 reg = <0x12C20000 0x100>;
229 interrupts = <0 53 0>;
230 clocks = <&clock 291>, <&clock 148>; 197 clocks = <&clock 291>, <&clock 148>;
231 clock-names = "uart", "clk_uart_baud0"; 198 clock-names = "uart", "clk_uart_baud0";
232 }; 199 };
233 200
234 serial@12C30000 { 201 serial@12C30000 {
235 compatible = "samsung,exynos4210-uart";
236 reg = <0x12C30000 0x100>;
237 interrupts = <0 54 0>;
238 clocks = <&clock 292>, <&clock 149>; 202 clocks = <&clock 292>, <&clock 149>;
239 clock-names = "uart", "clk_uart_baud0"; 203 clock-names = "uart", "clk_uart_baud0";
240 }; 204 };
@@ -413,31 +377,19 @@
413 }; 377 };
414 378
415 dwmmc_0: dwmmc0@12200000 { 379 dwmmc_0: dwmmc0@12200000 {
416 compatible = "samsung,exynos5250-dw-mshc";
417 reg = <0x12200000 0x1000>; 380 reg = <0x12200000 0x1000>;
418 interrupts = <0 75 0>;
419 #address-cells = <1>;
420 #size-cells = <0>;
421 clocks = <&clock 280>, <&clock 139>; 381 clocks = <&clock 280>, <&clock 139>;
422 clock-names = "biu", "ciu"; 382 clock-names = "biu", "ciu";
423 }; 383 };
424 384
425 dwmmc_1: dwmmc1@12210000 { 385 dwmmc_1: dwmmc1@12210000 {
426 compatible = "samsung,exynos5250-dw-mshc";
427 reg = <0x12210000 0x1000>; 386 reg = <0x12210000 0x1000>;
428 interrupts = <0 76 0>;
429 #address-cells = <1>;
430 #size-cells = <0>;
431 clocks = <&clock 281>, <&clock 140>; 387 clocks = <&clock 281>, <&clock 140>;
432 clock-names = "biu", "ciu"; 388 clock-names = "biu", "ciu";
433 }; 389 };
434 390
435 dwmmc_2: dwmmc2@12220000 { 391 dwmmc_2: dwmmc2@12220000 {
436 compatible = "samsung,exynos5250-dw-mshc";
437 reg = <0x12220000 0x1000>; 392 reg = <0x12220000 0x1000>;
438 interrupts = <0 77 0>;
439 #address-cells = <1>;
440 #size-cells = <0>;
441 clocks = <&clock 282>, <&clock 141>; 393 clocks = <&clock 282>, <&clock 141>;
442 clock-names = "biu", "ciu"; 394 clock-names = "biu", "ciu";
443 }; 395 };