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-rw-r--r--arch/arm/boot/dts/dra7.dtsi167
1 files changed, 144 insertions, 23 deletions
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 9cc98436a982..9cd99b931302 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -34,6 +34,12 @@
34 serial3 = &uart4; 34 serial3 = &uart4;
35 serial4 = &uart5; 35 serial4 = &uart5;
36 serial5 = &uart6; 36 serial5 = &uart6;
37 serial6 = &uart7;
38 serial7 = &uart8;
39 serial8 = &uart9;
40 serial9 = &uart10;
41 ethernet0 = &cpsw_emac0;
42 ethernet1 = &cpsw_emac1;
37 }; 43 };
38 44
39 timer { 45 timer {
@@ -335,6 +341,8 @@
335 ti,hwmods = "uart1"; 341 ti,hwmods = "uart1";
336 clock-frequency = <48000000>; 342 clock-frequency = <48000000>;
337 status = "disabled"; 343 status = "disabled";
344 dmas = <&sdma 49>, <&sdma 50>;
345 dma-names = "tx", "rx";
338 }; 346 };
339 347
340 uart2: serial@4806c000 { 348 uart2: serial@4806c000 {
@@ -344,6 +352,8 @@
344 ti,hwmods = "uart2"; 352 ti,hwmods = "uart2";
345 clock-frequency = <48000000>; 353 clock-frequency = <48000000>;
346 status = "disabled"; 354 status = "disabled";
355 dmas = <&sdma 51>, <&sdma 52>;
356 dma-names = "tx", "rx";
347 }; 357 };
348 358
349 uart3: serial@48020000 { 359 uart3: serial@48020000 {
@@ -353,6 +363,8 @@
353 ti,hwmods = "uart3"; 363 ti,hwmods = "uart3";
354 clock-frequency = <48000000>; 364 clock-frequency = <48000000>;
355 status = "disabled"; 365 status = "disabled";
366 dmas = <&sdma 53>, <&sdma 54>;
367 dma-names = "tx", "rx";
356 }; 368 };
357 369
358 uart4: serial@4806e000 { 370 uart4: serial@4806e000 {
@@ -362,6 +374,8 @@
362 ti,hwmods = "uart4"; 374 ti,hwmods = "uart4";
363 clock-frequency = <48000000>; 375 clock-frequency = <48000000>;
364 status = "disabled"; 376 status = "disabled";
377 dmas = <&sdma 55>, <&sdma 56>;
378 dma-names = "tx", "rx";
365 }; 379 };
366 380
367 uart5: serial@48066000 { 381 uart5: serial@48066000 {
@@ -371,6 +385,8 @@
371 ti,hwmods = "uart5"; 385 ti,hwmods = "uart5";
372 clock-frequency = <48000000>; 386 clock-frequency = <48000000>;
373 status = "disabled"; 387 status = "disabled";
388 dmas = <&sdma 63>, <&sdma 64>;
389 dma-names = "tx", "rx";
374 }; 390 };
375 391
376 uart6: serial@48068000 { 392 uart6: serial@48068000 {
@@ -380,6 +396,8 @@
380 ti,hwmods = "uart6"; 396 ti,hwmods = "uart6";
381 clock-frequency = <48000000>; 397 clock-frequency = <48000000>;
382 status = "disabled"; 398 status = "disabled";
399 dmas = <&sdma 79>, <&sdma 80>;
400 dma-names = "tx", "rx";
383 }; 401 };
384 402
385 uart7: serial@48420000 { 403 uart7: serial@48420000 {
@@ -421,7 +439,11 @@
421 mailbox1: mailbox@4a0f4000 { 439 mailbox1: mailbox@4a0f4000 {
422 compatible = "ti,omap4-mailbox"; 440 compatible = "ti,omap4-mailbox";
423 reg = <0x4a0f4000 0x200>; 441 reg = <0x4a0f4000 0x200>;
442 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
443 <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
444 <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
424 ti,hwmods = "mailbox1"; 445 ti,hwmods = "mailbox1";
446 #mbox-cells = <1>;
425 ti,mbox-num-users = <3>; 447 ti,mbox-num-users = <3>;
426 ti,mbox-num-fifos = <8>; 448 ti,mbox-num-fifos = <8>;
427 status = "disabled"; 449 status = "disabled";
@@ -430,7 +452,12 @@
430 mailbox2: mailbox@4883a000 { 452 mailbox2: mailbox@4883a000 {
431 compatible = "ti,omap4-mailbox"; 453 compatible = "ti,omap4-mailbox";
432 reg = <0x4883a000 0x200>; 454 reg = <0x4883a000 0x200>;
455 interrupts = <GIC_SPI 237 IRQ_TYPE_LEVEL_HIGH>,
456 <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>,
457 <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>,
458 <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>;
433 ti,hwmods = "mailbox2"; 459 ti,hwmods = "mailbox2";
460 #mbox-cells = <1>;
434 ti,mbox-num-users = <4>; 461 ti,mbox-num-users = <4>;
435 ti,mbox-num-fifos = <12>; 462 ti,mbox-num-fifos = <12>;
436 status = "disabled"; 463 status = "disabled";
@@ -439,7 +466,12 @@
439 mailbox3: mailbox@4883c000 { 466 mailbox3: mailbox@4883c000 {
440 compatible = "ti,omap4-mailbox"; 467 compatible = "ti,omap4-mailbox";
441 reg = <0x4883c000 0x200>; 468 reg = <0x4883c000 0x200>;
469 interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>,
470 <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>,
471 <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>,
472 <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>;
442 ti,hwmods = "mailbox3"; 473 ti,hwmods = "mailbox3";
474 #mbox-cells = <1>;
443 ti,mbox-num-users = <4>; 475 ti,mbox-num-users = <4>;
444 ti,mbox-num-fifos = <12>; 476 ti,mbox-num-fifos = <12>;
445 status = "disabled"; 477 status = "disabled";
@@ -448,7 +480,12 @@
448 mailbox4: mailbox@4883e000 { 480 mailbox4: mailbox@4883e000 {
449 compatible = "ti,omap4-mailbox"; 481 compatible = "ti,omap4-mailbox";
450 reg = <0x4883e000 0x200>; 482 reg = <0x4883e000 0x200>;
483 interrupts = <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>,
484 <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>,
485 <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>,
486 <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>;
451 ti,hwmods = "mailbox4"; 487 ti,hwmods = "mailbox4";
488 #mbox-cells = <1>;
452 ti,mbox-num-users = <4>; 489 ti,mbox-num-users = <4>;
453 ti,mbox-num-fifos = <12>; 490 ti,mbox-num-fifos = <12>;
454 status = "disabled"; 491 status = "disabled";
@@ -457,7 +494,12 @@
457 mailbox5: mailbox@48840000 { 494 mailbox5: mailbox@48840000 {
458 compatible = "ti,omap4-mailbox"; 495 compatible = "ti,omap4-mailbox";
459 reg = <0x48840000 0x200>; 496 reg = <0x48840000 0x200>;
497 interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>,
498 <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>,
499 <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>,
500 <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>;
460 ti,hwmods = "mailbox5"; 501 ti,hwmods = "mailbox5";
502 #mbox-cells = <1>;
461 ti,mbox-num-users = <4>; 503 ti,mbox-num-users = <4>;
462 ti,mbox-num-fifos = <12>; 504 ti,mbox-num-fifos = <12>;
463 status = "disabled"; 505 status = "disabled";
@@ -466,7 +508,12 @@
466 mailbox6: mailbox@48842000 { 508 mailbox6: mailbox@48842000 {
467 compatible = "ti,omap4-mailbox"; 509 compatible = "ti,omap4-mailbox";
468 reg = <0x48842000 0x200>; 510 reg = <0x48842000 0x200>;
511 interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>,
512 <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>,
513 <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>,
514 <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>;
469 ti,hwmods = "mailbox6"; 515 ti,hwmods = "mailbox6";
516 #mbox-cells = <1>;
470 ti,mbox-num-users = <4>; 517 ti,mbox-num-users = <4>;
471 ti,mbox-num-fifos = <12>; 518 ti,mbox-num-fifos = <12>;
472 status = "disabled"; 519 status = "disabled";
@@ -475,7 +522,12 @@
475 mailbox7: mailbox@48844000 { 522 mailbox7: mailbox@48844000 {
476 compatible = "ti,omap4-mailbox"; 523 compatible = "ti,omap4-mailbox";
477 reg = <0x48844000 0x200>; 524 reg = <0x48844000 0x200>;
525 interrupts = <GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH>,
526 <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>,
527 <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>,
528 <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>;
478 ti,hwmods = "mailbox7"; 529 ti,hwmods = "mailbox7";
530 #mbox-cells = <1>;
479 ti,mbox-num-users = <4>; 531 ti,mbox-num-users = <4>;
480 ti,mbox-num-fifos = <12>; 532 ti,mbox-num-fifos = <12>;
481 status = "disabled"; 533 status = "disabled";
@@ -484,7 +536,12 @@
484 mailbox8: mailbox@48846000 { 536 mailbox8: mailbox@48846000 {
485 compatible = "ti,omap4-mailbox"; 537 compatible = "ti,omap4-mailbox";
486 reg = <0x48846000 0x200>; 538 reg = <0x48846000 0x200>;
539 interrupts = <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>,
540 <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>,
541 <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>,
542 <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>;
487 ti,hwmods = "mailbox8"; 543 ti,hwmods = "mailbox8";
544 #mbox-cells = <1>;
488 ti,mbox-num-users = <4>; 545 ti,mbox-num-users = <4>;
489 ti,mbox-num-fifos = <12>; 546 ti,mbox-num-fifos = <12>;
490 status = "disabled"; 547 status = "disabled";
@@ -493,7 +550,12 @@
493 mailbox9: mailbox@4885e000 { 550 mailbox9: mailbox@4885e000 {
494 compatible = "ti,omap4-mailbox"; 551 compatible = "ti,omap4-mailbox";
495 reg = <0x4885e000 0x200>; 552 reg = <0x4885e000 0x200>;
553 interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>,
554 <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>,
555 <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>,
556 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
496 ti,hwmods = "mailbox9"; 557 ti,hwmods = "mailbox9";
558 #mbox-cells = <1>;
497 ti,mbox-num-users = <4>; 559 ti,mbox-num-users = <4>;
498 ti,mbox-num-fifos = <12>; 560 ti,mbox-num-fifos = <12>;
499 status = "disabled"; 561 status = "disabled";
@@ -502,7 +564,12 @@
502 mailbox10: mailbox@48860000 { 564 mailbox10: mailbox@48860000 {
503 compatible = "ti,omap4-mailbox"; 565 compatible = "ti,omap4-mailbox";
504 reg = <0x48860000 0x200>; 566 reg = <0x48860000 0x200>;
567 interrupts = <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
568 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>,
569 <GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>,
570 <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
505 ti,hwmods = "mailbox10"; 571 ti,hwmods = "mailbox10";
572 #mbox-cells = <1>;
506 ti,mbox-num-users = <4>; 573 ti,mbox-num-users = <4>;
507 ti,mbox-num-fifos = <12>; 574 ti,mbox-num-fifos = <12>;
508 status = "disabled"; 575 status = "disabled";
@@ -511,7 +578,12 @@
511 mailbox11: mailbox@48862000 { 578 mailbox11: mailbox@48862000 {
512 compatible = "ti,omap4-mailbox"; 579 compatible = "ti,omap4-mailbox";
513 reg = <0x48862000 0x200>; 580 reg = <0x48862000 0x200>;
581 interrupts = <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>,
582 <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>,
583 <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>,
584 <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>;
514 ti,hwmods = "mailbox11"; 585 ti,hwmods = "mailbox11";
586 #mbox-cells = <1>;
515 ti,mbox-num-users = <4>; 587 ti,mbox-num-users = <4>;
516 ti,mbox-num-fifos = <12>; 588 ti,mbox-num-fifos = <12>;
517 status = "disabled"; 589 status = "disabled";
@@ -520,7 +592,12 @@
520 mailbox12: mailbox@48864000 { 592 mailbox12: mailbox@48864000 {
521 compatible = "ti,omap4-mailbox"; 593 compatible = "ti,omap4-mailbox";
522 reg = <0x48864000 0x200>; 594 reg = <0x48864000 0x200>;
595 interrupts = <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>,
596 <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>,
597 <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>,
598 <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>;
523 ti,hwmods = "mailbox12"; 599 ti,hwmods = "mailbox12";
600 #mbox-cells = <1>;
524 ti,mbox-num-users = <4>; 601 ti,mbox-num-users = <4>;
525 ti,mbox-num-fifos = <12>; 602 ti,mbox-num-fifos = <12>;
526 status = "disabled"; 603 status = "disabled";
@@ -529,7 +606,12 @@
529 mailbox13: mailbox@48802000 { 606 mailbox13: mailbox@48802000 {
530 compatible = "ti,omap4-mailbox"; 607 compatible = "ti,omap4-mailbox";
531 reg = <0x48802000 0x200>; 608 reg = <0x48802000 0x200>;
609 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>,
610 <GIC_SPI 380 IRQ_TYPE_LEVEL_HIGH>,
611 <GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH>,
612 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>;
532 ti,hwmods = "mailbox13"; 613 ti,hwmods = "mailbox13";
614 #mbox-cells = <1>;
533 ti,mbox-num-users = <4>; 615 ti,mbox-num-users = <4>;
534 ti,mbox-num-fifos = <12>; 616 ti,mbox-num-fifos = <12>;
535 status = "disabled"; 617 status = "disabled";
@@ -1141,7 +1223,7 @@
1141 }; 1223 };
1142 }; 1224 };
1143 1225
1144 omap_dwc3_1@48880000 { 1226 omap_dwc3_1: omap_dwc3_1@48880000 {
1145 compatible = "ti,dwc3"; 1227 compatible = "ti,dwc3";
1146 ti,hwmods = "usb_otg_ss1"; 1228 ti,hwmods = "usb_otg_ss1";
1147 reg = <0x48880000 0x10000>; 1229 reg = <0x48880000 0x10000>;
@@ -1162,7 +1244,7 @@
1162 }; 1244 };
1163 }; 1245 };
1164 1246
1165 omap_dwc3_2@488c0000 { 1247 omap_dwc3_2: omap_dwc3_2@488c0000 {
1166 compatible = "ti,dwc3"; 1248 compatible = "ti,dwc3";
1167 ti,hwmods = "usb_otg_ss2"; 1249 ti,hwmods = "usb_otg_ss2";
1168 reg = <0x488c0000 0x10000>; 1250 reg = <0x488c0000 0x10000>;
@@ -1184,7 +1266,7 @@
1184 }; 1266 };
1185 1267
1186 /* IRQ for DWC3_3 and DWC3_4 need IRQ crossbar */ 1268 /* IRQ for DWC3_3 and DWC3_4 need IRQ crossbar */
1187 omap_dwc3_3@48900000 { 1269 omap_dwc3_3: omap_dwc3_3@48900000 {
1188 compatible = "ti,dwc3"; 1270 compatible = "ti,dwc3";
1189 ti,hwmods = "usb_otg_ss3"; 1271 ti,hwmods = "usb_otg_ss3";
1190 reg = <0x48900000 0x10000>; 1272 reg = <0x48900000 0x10000>;
@@ -1204,26 +1286,6 @@
1204 }; 1286 };
1205 }; 1287 };
1206 1288
1207 omap_dwc3_4@48940000 {
1208 compatible = "ti,dwc3";
1209 ti,hwmods = "usb_otg_ss4";
1210 reg = <0x48940000 0x10000>;
1211 interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>;
1212 #address-cells = <1>;
1213 #size-cells = <1>;
1214 utmi-mode = <2>;
1215 ranges;
1216 status = "disabled";
1217 usb4: usb@48950000 {
1218 compatible = "snps,dwc3";
1219 reg = <0x48950000 0x17000>;
1220 interrupts = <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
1221 tx-fifo-resize;
1222 maximum-speed = "high-speed";
1223 dr_mode = "otg";
1224 };
1225 };
1226
1227 elm: elm@48078000 { 1289 elm: elm@48078000 {
1228 compatible = "ti,am3352-elm"; 1290 compatible = "ti,am3352-elm";
1229 reg = <0x48078000 0xfc0>; /* device IO registers */ 1291 reg = <0x48078000 0xfc0>; /* device IO registers */
@@ -1265,6 +1327,65 @@
1265 ti,irqs-skip = <10 133 139 140>; 1327 ti,irqs-skip = <10 133 139 140>;
1266 ti,irqs-safe-map = <0>; 1328 ti,irqs-safe-map = <0>;
1267 }; 1329 };
1330
1331 mac: ethernet@4a100000 {
1332 compatible = "ti,cpsw";
1333 ti,hwmods = "gmac";
1334 clocks = <&dpll_gmac_ck>, <&gmac_gmii_ref_clk_div>;
1335 clock-names = "fck", "cpts";
1336 cpdma_channels = <8>;
1337 ale_entries = <1024>;
1338 bd_ram_size = <0x2000>;
1339 no_bd_ram = <0>;
1340 rx_descs = <64>;
1341 mac_control = <0x20>;
1342 slaves = <2>;
1343 active_slave = <0>;
1344 cpts_clock_mult = <0x80000000>;
1345 cpts_clock_shift = <29>;
1346 reg = <0x48484000 0x1000
1347 0x48485200 0x2E00>;
1348 #address-cells = <1>;
1349 #size-cells = <1>;
1350 /*
1351 * rx_thresh_pend
1352 * rx_pend
1353 * tx_pend
1354 * misc_pend
1355 */
1356 interrupts = <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
1357 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
1358 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
1359 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>;
1360 ranges;
1361 status = "disabled";
1362
1363 davinci_mdio: mdio@48485000 {
1364 compatible = "ti,davinci_mdio";
1365 #address-cells = <1>;
1366 #size-cells = <0>;
1367 ti,hwmods = "davinci_mdio";
1368 bus_freq = <1000000>;
1369 reg = <0x48485000 0x100>;
1370 };
1371
1372 cpsw_emac0: slave@48480200 {
1373 /* Filled in by U-Boot */
1374 mac-address = [ 00 00 00 00 00 00 ];
1375 };
1376
1377 cpsw_emac1: slave@48480300 {
1378 /* Filled in by U-Boot */
1379 mac-address = [ 00 00 00 00 00 00 ];
1380 };
1381
1382 phy_sel: cpsw-phy-sel@4a002554 {
1383 compatible = "ti,dra7xx-cpsw-phy-sel";
1384 reg= <0x4a002554 0x4>;
1385 reg-names = "gmii-sel";
1386 };
1387 };
1388
1268 }; 1389 };
1269}; 1390};
1270 1391
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-19 12:08:28 -0500